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50 lines
2.0 KiB
Diff
50 lines
2.0 KiB
Diff
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Author: Joseph Myers <joseph@codesourcery.com>
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Date: 2016-10-24
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Building glibc for powerpc64 with recent (2.27.51.20161012) binutils,
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with multi-arch enabled, I get the error:
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../sysdeps/powerpc/powerpc64/power6/memset.S: Assembler messages:
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../sysdeps/powerpc/powerpc64/power6/memset.S:254: Error: operand out of range (5 is not between 0 and 1)
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../sysdeps/powerpc/powerpc64/power6/memset.S:254: Error: operand out of range (128 is not between 0 and 31)
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../sysdeps/powerpc/powerpc64/power6/memset.S:254: Error: missing operand
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Indeed, cmpli is documented as a four-operand instruction, and looking
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at nearby code it seems likely cmpldi was intended. This patch fixes
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this powerpc64 code accordingly, and makes a corresponding change to
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the powerpc32 code.
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Note: this patch is not tested beyond verifying that the powerpc64
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code builds where it failed to build before the patch. In particular,
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I have not done execution testing (the systems I usually use for
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testing powerpc are pre-power6 so wouldn't use this code) or tested
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the powerpc32 change.
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---
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sysdeps/powerpc/powerpc32/power6/memset.S (memset): Use cmplwi instead of cmpli.
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sysdeps/powerpc/powerpc64/power6/memset.S (memset): Use cmpldi instead of cmpli.
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--- a/sysdeps/powerpc/powerpc32/power6/memset.S
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+++ b/sysdeps/powerpc/powerpc32/power6/memset.S
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@@ -394,7 +394,7 @@ L(cacheAlignedx):
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/* A simple loop for the longer (>640 bytes) lengths. This form limits
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the branch miss-predicted to exactly 1 at loop exit.*/
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L(cacheAligned512):
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- cmpli cr1,rLEN,128
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+ cmplwi cr1,rLEN,128
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blt cr1,L(cacheAligned1)
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dcbz 0,rMEMP
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addi rLEN,rLEN,-128
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--- a/sysdeps/powerpc/powerpc64/power6/memset.S
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+++ b/sysdeps/powerpc/powerpc64/power6/memset.S
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@@ -251,7 +251,7 @@ L(cacheAlignedx):
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/* A simple loop for the longer (>640 bytes) lengths. This form limits
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the branch miss-predicted to exactly 1 at loop exit.*/
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L(cacheAligned512):
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- cmpli cr1,rLEN,128
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+ cmpldi cr1,rLEN,128
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blt cr1,L(cacheAligned1)
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dcbz 0,rMEMP
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addi rLEN,rLEN,-128
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