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47 lines
1.6 KiB
Diff
47 lines
1.6 KiB
Diff
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From 5468439a1f987b7d801c6c76d6c989e57af8916a Mon Sep 17 00:00:00 2001
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From: Richard Sandiford <richard.sandiford@arm.com>
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Date: Tue, 25 Jun 2024 09:41:21 +0100
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Subject: [PATCH 16/16] Revert one of the force_subreg changes
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One of the changes in g:d4047da6a070175aae7121c739d1cad6b08ff4b2
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caused a regression in ft32-elf; see:
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https://gcc.gnu.org/pipermail/gcc-patches/2024-June/655418.html
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for details. This change was different from the others in that the
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original call was to simplify_subreg rather than simplify_lowpart_subreg.
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The old code would therefore go on to do the force_reg for more cases
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than the new code would.
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gcc/
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* expmed.cc (store_bit_field_using_insv): Revert earlier change
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to use force_subreg instead of simplify_gen_subreg.
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(cherry picked from commit b694bf417cdd7d0a4d78e9927bab6bc202b7df6c)
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---
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gcc/expmed.cc | 8 +++++++-
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1 file changed, 7 insertions(+), 1 deletion(-)
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diff --git a/gcc/expmed.cc b/gcc/expmed.cc
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index bd190722de6..85ec2614a3f 100644
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--- a/gcc/expmed.cc
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+++ b/gcc/expmed.cc
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@@ -695,7 +695,13 @@ store_bit_field_using_insv (const extraction_insn *insv, rtx op0,
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if we must narrow it, be sure we do it correctly. */
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if (GET_MODE_SIZE (value_mode) < GET_MODE_SIZE (op_mode))
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- tmp = force_subreg (op_mode, value1, value_mode, 0);
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+ {
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+ tmp = simplify_subreg (op_mode, value1, value_mode, 0);
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+ if (! tmp)
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+ tmp = simplify_gen_subreg (op_mode,
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+ force_reg (value_mode, value1),
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+ value_mode, 0);
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+ }
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else
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{
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tmp = gen_lowpart_if_possible (op_mode, value1);
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--
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2.44.2
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