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https://github.com/crosstool-ng/crosstool-ng.git
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139 lines
3.8 KiB
Diff
139 lines
3.8 KiB
Diff
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Fixes
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In file included from include/asm/thread_info.h:16,
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from include/linux/thread_info.h:21,
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from include/linux/spinlock.h:12,
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from include/linux/capability.h:45,
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from include/linux/sched.h:7,
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from arch/i386/kernel/asm-offsets.c:7:
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include/asm/processor.h:87: error: array type has incomplete element type
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make[1]: *** [arch/i386/kernel/asm-offsets.asm] Error 1
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--- linux-2.6.8/include/asm-i386/processor.h.old Tue Mar 15 00:14:42 2005
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+++ linux-2.6.8/include/asm-i386/processor.h Tue Mar 15 00:18:45 2005
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@@ -79,6 +79,58 @@
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#define X86_VENDOR_UNKNOWN 0xff
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/*
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+ * Size of io_bitmap.
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+ */
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+#define IO_BITMAP_BITS 65536
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+#define IO_BITMAP_BYTES (IO_BITMAP_BITS/8)
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+#define IO_BITMAP_LONGS (IO_BITMAP_BYTES/sizeof(long))
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+#define IO_BITMAP_OFFSET offsetof(struct tss_struct,io_bitmap)
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+#define INVALID_IO_BITMAP_OFFSET 0x8000
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+
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+struct tss_struct {
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+ unsigned short back_link,__blh;
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+ unsigned long esp0;
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+ unsigned short ss0,__ss0h;
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+ unsigned long esp1;
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+ unsigned short ss1,__ss1h; /* ss1 is used to cache MSR_IA32_SYSENTER_CS */
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+ unsigned long esp2;
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+ unsigned short ss2,__ss2h;
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+ unsigned long __cr3;
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+ unsigned long eip;
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+ unsigned long eflags;
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+ unsigned long eax,ecx,edx,ebx;
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+ unsigned long esp;
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+ unsigned long ebp;
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+ unsigned long esi;
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+ unsigned long edi;
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+ unsigned short es, __esh;
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+ unsigned short cs, __csh;
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+ unsigned short ss, __ssh;
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+ unsigned short ds, __dsh;
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+ unsigned short fs, __fsh;
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+ unsigned short gs, __gsh;
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+ unsigned short ldt, __ldth;
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+ unsigned short trace, io_bitmap_base;
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+ /*
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+ * The extra 1 is there because the CPU will access an
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+ * additional byte beyond the end of the IO permission
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+ * bitmap. The extra byte must be all 1 bits, and must
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+ * be within the limit.
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+ */
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+ unsigned long io_bitmap[IO_BITMAP_LONGS + 1];
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+ /*
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+ * pads the TSS to be cacheline-aligned (size is 0x100)
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+ */
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+ unsigned long __cacheline_filler[37];
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+ /*
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+ * .. and then another 0x100 bytes for emergency kernel stack
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+ */
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+ unsigned long stack[64];
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+} __attribute__((packed));
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+
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+#define ARCH_MIN_TASKALIGN 16
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+
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+/*
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* capabilities of CPUs
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*/
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@@ -296,15 +348,6 @@
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*/
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#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
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-/*
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- * Size of io_bitmap.
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- */
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-#define IO_BITMAP_BITS 65536
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-#define IO_BITMAP_BYTES (IO_BITMAP_BITS/8)
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-#define IO_BITMAP_LONGS (IO_BITMAP_BYTES/sizeof(long))
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-#define IO_BITMAP_OFFSET offsetof(struct tss_struct,io_bitmap)
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-#define INVALID_IO_BITMAP_OFFSET 0x8000
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-
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struct i387_fsave_struct {
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long cwd;
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long swd;
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@@ -356,49 +399,6 @@
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typedef struct {
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unsigned long seg;
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} mm_segment_t;
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-
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-struct tss_struct {
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- unsigned short back_link,__blh;
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- unsigned long esp0;
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- unsigned short ss0,__ss0h;
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- unsigned long esp1;
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- unsigned short ss1,__ss1h; /* ss1 is used to cache MSR_IA32_SYSENTER_CS */
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- unsigned long esp2;
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- unsigned short ss2,__ss2h;
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- unsigned long __cr3;
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- unsigned long eip;
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- unsigned long eflags;
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- unsigned long eax,ecx,edx,ebx;
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- unsigned long esp;
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- unsigned long ebp;
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- unsigned long esi;
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- unsigned long edi;
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- unsigned short es, __esh;
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- unsigned short cs, __csh;
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- unsigned short ss, __ssh;
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- unsigned short ds, __dsh;
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- unsigned short fs, __fsh;
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- unsigned short gs, __gsh;
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- unsigned short ldt, __ldth;
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- unsigned short trace, io_bitmap_base;
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- /*
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- * The extra 1 is there because the CPU will access an
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- * additional byte beyond the end of the IO permission
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- * bitmap. The extra byte must be all 1 bits, and must
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- * be within the limit.
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- */
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- unsigned long io_bitmap[IO_BITMAP_LONGS + 1];
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- /*
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- * pads the TSS to be cacheline-aligned (size is 0x100)
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- */
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- unsigned long __cacheline_filler[37];
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- /*
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- * .. and then another 0x100 bytes for emergency kernel stack
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- */
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- unsigned long stack[64];
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-} __attribute__((packed));
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-
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-#define ARCH_MIN_TASKALIGN 16
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struct thread_struct {
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/* cached TLS descriptors. */
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