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143 lines
5.2 KiB
C++
143 lines
5.2 KiB
C++
/*
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* Copyright (C) 2011-2016 Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include "sgx_tcrypto.h"
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#include "ippcp.h"
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#include "ippcore.h"
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#include "se_cpu_feature.h"
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#include "se_cdefs.h"
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// add a version to tcrypto.
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SGX_ACCESS_VERSION(tcrypto, 1)
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#ifdef SGX_USE_OPT_LIB
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/* Crypto Library Initialization
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* Parameters:
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* Return: sgx_status_t - SGX_SUCCESS or failure as defined sgx_error.h
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* Inputs: uint64_t cpu_feature_indicator - Bit array of host CPU feature bits */
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extern "C" sgx_status_t sgx_init_crypto_lib(uint64_t cpu_feature_indicator)
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{
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IppStatus error_code = ippStsNoOperation;
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// Use cpu_feature_indicator to determine the host CPU and specify that CPU type
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// in the initialization of the IPP dispatcher.
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// NOTE: Only 2 ISA Optimized Algorithms are utilized:
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// 1. AVX2
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// 2. SSE4.1
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// We set SSE4.1 as the baseline.
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// Set the IPP feature bits based on host attributes that have been collected
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// NOTE: Some sanity check
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Ipp64u ippCpuFeatures = 0;
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if ((cpu_feature_indicator & CPU_FEATURE_SSE4_1) == CPU_FEATURE_SSE4_1)
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{
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// Some sanity checking has been performed when setting the feature mask
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// If SSE4.1 is set, then all earlier SSE/MMX ISA enhancements are available
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ippCpuFeatures |= (ippCPUID_SSE41 | ippCPUID_MMX | ippCPUID_SSE |
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ippCPUID_SSE2 | ippCPUID_SSE3 | ippCPUID_SSSE3);
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if ((cpu_feature_indicator & CPU_FEATURE_MOVBE) == CPU_FEATURE_MOVBE)
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{
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ippCpuFeatures |= ippCPUID_MOVBE;
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}
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if ((cpu_feature_indicator & CPU_FEATURE_SSE4_2) == CPU_FEATURE_SSE4_2)
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{
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ippCpuFeatures |= ippCPUID_SSE42;
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}
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if ((cpu_feature_indicator & CPU_FEATURE_AVX) == CPU_FEATURE_AVX)
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{
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ippCpuFeatures |= ippCPUID_AVX;
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ippCpuFeatures |= ippAVX_ENABLEDBYOS;
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}
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if ((cpu_feature_indicator & CPU_FEATURE_AES) == CPU_FEATURE_AES)
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{
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ippCpuFeatures |= ippCPUID_AES;
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}
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if ((cpu_feature_indicator & CPU_FEATURE_PCLMULQDQ) == CPU_FEATURE_PCLMULQDQ)
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{
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ippCpuFeatures |= ippCPUID_CLMUL;
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}
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if ((cpu_feature_indicator & CPU_FEATURE_RDRND) == CPU_FEATURE_RDRND)
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{
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ippCpuFeatures |= ippCPUID_RDRAND;
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}
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if ((cpu_feature_indicator & CPU_FEATURE_F16C) == CPU_FEATURE_F16C)
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{
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ippCpuFeatures |= ippCPUID_F16C;
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}
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if ((cpu_feature_indicator & CPU_FEATURE_AVX2) == CPU_FEATURE_AVX2)
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{
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ippCpuFeatures |= ippCPUID_AVX2;
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}
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if ((cpu_feature_indicator & CPU_FEATURE_ADCOX) == CPU_FEATURE_ADCOX)
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{
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ippCpuFeatures |= ippCPUID_ADCOX;
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}
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if ((cpu_feature_indicator & CPU_FEATURE_RDSEED) == CPU_FEATURE_RDSEED)
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{
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ippCpuFeatures |= ippCPUID_RDSEED;
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}
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if ((cpu_feature_indicator & CPU_FEATURE_PREFETCHW) == CPU_FEATURE_PREFETCHW)
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{
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ippCpuFeatures |= ippCPUID_PREFETCHW;
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}
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if ((cpu_feature_indicator & CPU_FEATURE_PCLMULQDQ) == CPU_FEATURE_PCLMULQDQ)
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{
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ippCpuFeatures |= ippCPUID_CLMUL;
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}
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}
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else
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{
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// Return error if the old platoform has no SSE4.1
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return SGX_ERROR_INVALID_PARAMETER;
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}
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// Call SetCpuFeatures() to set the IPP library with the collected CPU features
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ippCpuFeatures |= ippCPUID_NOCHECK; /* Force ippSetCpuFeatures to set CPU features without check */
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error_code = ippSetCpuFeatures(ippCpuFeatures);
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if (error_code != ippStsNoErr)
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{
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return SGX_ERROR_INVALID_PARAMETER;
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}
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return SGX_SUCCESS;
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}
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#else
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extern "C" sgx_status_t sgx_init_crypto_lib(uint64_t cpu_feature_indicator)
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{
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(void) cpu_feature_indicator;
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return SGX_SUCCESS;
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}
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#endif
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