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https://github.com/corda/corda.git
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9441de4c38
This release is used in conjunction with the linux-sgx-driver Intial release: https://github.com/01org/linux-sgx-driver commit-id: 0e865ce5e6b297a787bcdc12d98bada8174be6d7 Intel-id: 33399 Signed-off-by: Angie Chinchilla <angie.v.chinchilla@intel.com>
127 lines
4.8 KiB
C++
127 lines
4.8 KiB
C++
/*
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* Copyright (C) 2011-2016 Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include "init_optimized_lib.h"
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#include <stdint.h>
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#include "se_cpu_feature.h"
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#include "sgx_trts.h"
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#include "sgx_attributes.h"
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#include "global_data.h"
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extern "C" int sgx_init_string_lib(uint64_t cpu_feature_indicator);
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extern "C" sgx_status_t sgx_init_crypto_lib(uint64_t cpu_feature_indicator);
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static int set_global_feature_indicator(uint64_t feature_bit_array, uint64_t xfrm)
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{
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// Confirm the reserved bits and the unset bits by uRTS must be 0.
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if(feature_bit_array & (RESERVED_CPU_FEATURE_BIT))
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{
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// clear the reserved bits
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feature_bit_array = feature_bit_array & (~(RESERVED_CPU_FEATURE_BIT));
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}
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;
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#ifdef SE_SIM
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// Simulation mode - requires SSE for x86 and SSE2 for x64.
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#ifdef SE_32
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if(!(feature_bit_array & ~(CPU_FEATURE_SSE - 1)))
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{
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return -1;
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}
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#else
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if(!(feature_bit_array & ~(CPU_FEATURE_SSE2 - 1)))
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{
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return -1;
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}
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#endif
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#else
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// HW mode - requires SSE4.2. Take SSE4.2 as the baseline.
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if(!(feature_bit_array & ~(CPU_FEATURE_SSE4_2 - 1)))
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{
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return -1;
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}
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#endif
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// Check for inconsistencies in the CPUID feature mask.
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if ( (((feature_bit_array & CPU_FEATURE_SSE) == CPU_FEATURE_SSE) &&((feature_bit_array & (CPU_FEATURE_SSE - 1)) != (CPU_FEATURE_SSE - 1))) ||
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(((feature_bit_array & CPU_FEATURE_SSE2) == CPU_FEATURE_SSE2) &&((feature_bit_array & (CPU_FEATURE_SSE2 - 1)) != (CPU_FEATURE_SSE2 - 1))) ||
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(((feature_bit_array & CPU_FEATURE_SSE3) == CPU_FEATURE_SSE3) &&((feature_bit_array & (CPU_FEATURE_SSE3 - 1)) != (CPU_FEATURE_SSE3 - 1))) ||
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(((feature_bit_array & CPU_FEATURE_SSSE3) == CPU_FEATURE_SSSE3) && ((feature_bit_array & (CPU_FEATURE_SSSE3 - 1)) != (CPU_FEATURE_SSSE3 - 1))) ||
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(((feature_bit_array & CPU_FEATURE_SSE4_1) == CPU_FEATURE_SSE4_1) && ((feature_bit_array & (CPU_FEATURE_SSE4_1 - 1)) != (CPU_FEATURE_SSE4_1 - 1))) ||
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(((feature_bit_array & CPU_FEATURE_SSE4_2) == CPU_FEATURE_SSE4_2) && ((feature_bit_array & (CPU_FEATURE_SSE4_2 - 1)) != (CPU_FEATURE_SSE4_2 - 1))) )
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{
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return -1;
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}
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// Determine whether the OS & ENCLAVE support SAVE/RESTORE of the AVX register set
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// IF NOT, clear the advanced feature set bits corresponding to AVX and beyond
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if(!XFEATURE_ENABLED_AVX(xfrm))
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{
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// AVX is disabled by OS, so clear the AVX related feature bits
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feature_bit_array &= (~(CPU_FEATURE_AVX | CPU_FEATURE_F16C | CPU_FEATURE_AVX2 |
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CPU_FEATURE_FMA | CPU_FEATURE_RTM | CPU_FEATURE_HLE | CPU_FEATURE_BMI |
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CPU_FEATURE_PREFETCHW | CPU_FEATURE_RDSEED | CPU_FEATURE_ADCOX));
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}
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g_cpu_feature_indicator = feature_bit_array;
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return 0;
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}
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extern "C" int init_optimized_libs(const uint64_t feature_bit_array, uint64_t xfrm)
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{
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if (g_enclave_state != ENCLAVE_INIT_IN_PROGRESS)
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{
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return -1;
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}
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// set the global feature indicator
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if(set_global_feature_indicator(feature_bit_array, xfrm))
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{
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return -1;
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}
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// Init string library with the global feature indicator
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if(sgx_init_string_lib(g_cpu_feature_indicator) != 0)
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{
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return -1;
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}
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// Init IPP crypto library with the global feature indicator
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if(sgx_init_crypto_lib(g_cpu_feature_indicator) != 0)
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{
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return -1;
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}
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return 0;
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}
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