Commit Graph

17 Commits

Author SHA1 Message Date
Joel Dice
c680dd4215 use ldmneia on Clang < 4 and GCC, ldmiane on Clang >= 4
I don't know why this instruction was renamed, but we have to deal
with it.
2012-10-03 17:01:00 -06:00
Joel Dice
16c526b775 fix OS X 10.8 and iOS 6.0 builds
This also adds support for Clang ARM builds, which involved removing
unused functions from arm.cpp to avoid link-time warnings.
2012-10-03 13:36:51 -06:00
Xerxes Rånby
2a15201b18 gcc define __ARM_PCS_VFP for -mfloat-abi=hard, use it to detect armhf builds.
Signed-off-by: Xerxes Rånby <xerxes@zafena.se>
2012-10-01 13:39:18 +02:00
Xerxes Rånby
23ea8f7d76 Fix missing armv4 blx and bkpt compile errors.
Signed-off-by: Xerxes Rånby <xerxes@zafena.se>
2012-09-25 15:54:32 +02:00
Joel Dice
ebd7f69c41 fix a couple of QNX/ARM issues
On QNX, we need to use msync to sync the instruction cache.  Also,
even though the compiler doesn't define __SOFTFP__, QNX uses the
softfp ABI on ARM.
2012-08-03 20:02:33 -06:00
Joel Dice
f03e5e8e55 clean up binary format code
Linux, FreeBSD, and QNX all use ELF, so no need to distinguish between
them when generating object files.  To avoid confusion, I've switch
from using operating system names to using binary format names where
applicable.
2012-08-02 12:39:24 -06:00
Joel Dice
4ffe2d58bf load arguments into the first 8 VFP registers, not the first 9 2012-08-01 19:59:34 +00:00
Joel Dice
a97c5728bb add support for the ARM hardware floating point ABI
This ABI's calling convention passes arguments and returns results
using VFP registers, so we need to tweak vmNativeCall to match it.

Thanks to Damjan Jovanovic for pointing this out and providing an
initial patch.
2012-07-31 16:36:59 +00:00
Joel Dice
222b357089 specify 4-byte alignment of functions defined in ARM assembly code
Apple's assembler, at least, won't automatically align these properly
for us, so we need to explicitly specify the required alignment.
2012-01-19 16:42:35 -07:00
Joel Dice
e5a8d5c824 add support for Apple iOS on ARM
Most tests are passing, but not all, so this still needs more work.
2011-08-10 19:21:48 -06:00
Joel Dice
e3662f13a9 update copyright years and increment version number 2011-07-13 08:25:21 -06:00
Joel Dice
b2268143f5 preserve statck alignment in arm.S's vmRun 2011-02-20 02:48:56 +00:00
Joel Dice
43cbfd3f3a support stack unwinding without using a frame pointer
Previously, we unwound the stack by following the chain of frame
pointers for normal returns, stack trace creation, and exception
unwinding.  On x86, this required reserving EBP/RBP for frame pointer
duties, making it unavailable for general computation and requiring
that it be explicitly saved and restored on entry and exit,
respectively.

On PowerPC, we use an ABI that makes the stack pointer double as a
frame pointer, so it doesn't cost us anything.  We've been using the
same convention on ARM, but it doesn't match the native calling
convention, which makes it unusable when we want to call native code
from Java and pass arguments on the stack.

So far, the ARM calling convention mismatch hasn't been an issue
because we've never passed more arguments from Java to native code
than would fit in registers.  However, we must now pass an extra
argument (the thread pointer) to e.g. divideLong so it can throw an
exception on divide by zero, which means the last argument must be
passed on the stack.  This will clobber the linkage area we've been
using to hold the frame pointer, so we need to stop using it.

One solution would be to use the same convention on ARM as we do on
x86, but this would introduce the same overhead of making a register
unavailable for general use and extra code at method entry and exit.

Instead, this commit removes the need for a frame pointer.  Unwinding
involves consulting a map of instruction offsets to frame sizes which
is generated at compile time.  This is necessary because stack trace
creation can happen at any time due to Thread.getStackTrace being
called by another thread, and the frame size varies during the
execution of a method.

So far, only x86(_64) is working, and continuations and tail call
optimization are probably broken.  More to come.
2011-01-16 19:05:05 -07:00
Joel Dice
a5742f5985 update copyright years 2010-12-05 20:21:09 -07:00
jet
f740570ff6 Further debugging of ARM "Hello World!" JIT functionality. 2010-08-27 18:52:33 -06:00
jet
d9aac52b3d First version; interpreted mode works and JIT mode compiles. 2010-07-12 14:18:36 -06:00
jet
1ffe46a545 added ARM interpreted mode supported 2009-08-06 11:52:36 -06:00