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ENT-1187 - Update Intel SGX SDK (#165)

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* Remove diverged copy of 'linux-sgx'

* Squashed 'sgx-jvm/linux-sgx/' content from commit 3699ffd5e

git-subtree-dir: sgx-jvm/linux-sgx
git-subtree-split: 3699ffd5ebd8e79d599301fa2e5814e2386cad2d

* ENT-1194 - Executable heap

* ENT-1194 - Placeholder for passing of enclave context to create_thread
This commit is contained in:
Tommy Lillehagen 2017-12-14 12:33:15 +00:00 committed by GitHub
parent 205663d37f
commit f21f8e7142
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
829 changed files with 32308 additions and 123810 deletions
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2
sgx-jvm/jvm-enclave/common/rpc/start_thread.edl
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@ -4,6 +4,6 @@ enclave {
public void create_new_thread(unsigned int nonce);
};
untrusted {
void request_new_thread([enclave_id] uint64_t enclave_id, uint32_t nonce);
void request_new_thread(uint64_t enclave_id, uint32_t nonce);
};
};

6
sgx-jvm/jvm-enclave/enclave/enclave_start_thread.cpp
View File

@ -35,7 +35,11 @@ thread_data_t *start_thread(void (*routine)(void *), void *param) {
aex_assert(new_thread_map.find(nonce) == new_thread_map.end());
new_thread_map[nonce] = thread_init_data;
}
request_new_thread(nonce);
// TODO use MRENCLAVE instead of enclave_id (this is currently not used)
uint64_t enclave_id = 0L;
request_new_thread(enclave_id, nonce);
sgx_thread_cond_wait(&thread_started, &thread_started_mutex);
sgx_thread_mutex_guard started_thread_data_map_guard(&started_thread_data_map_mutex);
auto thread_data_iter = started_thread_data_map.find(nonce);

2
sgx-jvm/linux-sgx/Linux_SGXEclipsePlugin/build_config/buildUpdateSite.xml
View File

@ -1,4 +1,4 @@
<project name="update site">
<project name="update site">
<!-- ========================================================================= -->
<!-- Extracts feature zip for update site -->
<!-- expected properties: -->

41
sgx-jvm/linux-sgx/README.md
View File

@ -11,8 +11,6 @@ The Linux\* Intel(R) SGX software stack is comprised of the Intel(R) SGX driver,
The [linux-sgx-driver](https://github.com/01org/linux-sgx-driver) project hosts the out-of-tree driver for the Linux\* Intel(R) SGX software stack, which will be used until the driver upstreaming process is complete.
**Note** This repository includes a subset of the Intel(R) Integrated Performance Primitives (IPP) Cryptography library under [external/crypto_px](external/crypto_px). It is provided as reference implementation for the cryptographic primitives used in SDK and PSW. The primitives are written in pure C and are not optimized for performance. Instructions are provided below for building the SDK and PSW with both precompiled optimized IPP binaries and the non-optimized source code version.
License
-------
See [License.txt](License.txt) for details.
@ -30,12 +28,14 @@ Build and Install the Intel(R) SGX Driver
-----------------------------------------
Follow the instructions in the [linux-sgx-driver](https://github.com/01org/linux-sgx-driver) project to build and install the Intel(R) SGX driver.
**Note:** **SGX 2.0** feature support in the SDK and PSW depends on processor and driver support for the SGX 2.0 instruction set. Please consult the README in the driver for instructions on building the SGX 2.0 Linux Driver. Upcoming CPU releases will include hardware support for SGX 2.0.
Build the Intel(R) SGX SDK and Intel(R) SGX PSW Package
-------------------------------------------------------
### Prerequisites:
- Ensure that you have one of the following required operating systems:
* Ubuntu\* Desktop-16.04-LTS 64bits
* Red Hat Enterprise Linux Server release 7.3 64bits
* Red Hat Enterprise Linux Server release 7.4 64bits
* CentOS 7.3.1611 64bits
- Use the following command(s) to install the required tools to build the Intel(R) SGX SDK:
@ -43,7 +43,7 @@ Build the Intel(R) SGX SDK and Intel(R) SGX PSW Package
```
$ sudo apt-get install build-essential ocaml automake autoconf libtool wget python
```
* On Red Hat Enterprise Linux 7.3 and CentOS 7.3:
* On Red Hat Enterprise Linux 7.4 and CentOS 7.3:
```
$ sudo yum groupinstall 'Development Tools'
$ sudo yum install ocaml wget python
@ -53,9 +53,9 @@ Build the Intel(R) SGX SDK and Intel(R) SGX PSW Package
```
$ sudo apt-get install libssl-dev libcurl4-openssl-dev protobuf-compiler libprotobuf-dev
```
* On Red Hat Enterprise Linux 7.3 and CentOS 7.3:
* On Red Hat Enterprise Linux 7.4 and CentOS 7.3:
```
$ sudo yum install openssl-devel libcurl-devel protobuf-compiler protobuf-devel
$ sudo yum install openssl-devel libcurl-devel protobuf-devel
```
- Use the script ``download_prebuilt.sh`` inside source code package to download prebuilt binaries to prebuilt folder
You may need set an https proxy for the `wget` tool used by the script (such as ``export https_proxy=http://test-proxy:test-port``)
@ -72,11 +72,14 @@ The following steps describe how to build the Intel(R) SGX SDK and PSW. You can
You can find the tools and libraries generated in the `build/linux` directory.
**Note**: You can also go to the `sdk` folder and use the `make` command to build the Intel(R) SGX SDK component only. However, building the PSW component is dependent on the result of building the Intel(R) SGX SDK.
- The default build uses precompiled optimized libraries, which are downloaded by the script ``./download_prebuilt.sh``.
You can also use the non-optimized source code version implementation instead by entering the following command:
- This repository supports to build the Intel(R) SGX SDK based on either precompiled optimized IPP/string/math libraries or open sourced version of SGXSSL/string/math libraries.
The default build uses precompiled optimized libraries, which are downloaded by the script ``./download_prebuilt.sh``.
You can also use the open sourced version implementation instead by entering the following command:
```
$ make USE_OPT_LIBS=0
```
**Note**: Building the Intel(R) SGX PSW with open sourced SGXSSL/string/math libraries is not supported. The above command builds Intel(R) SGX SDK only and the build of PSW part will be skipped.
- To build Intel(R) SGX SDK and PSW with debug information, enter the following command:
```
$ make DEBUG=1
@ -123,14 +126,14 @@ Install the Intel(R) SGX SDK
### Prerequisites
- Ensure that you have one of the following operating systems:
* Ubuntu\* Desktop-16.04-LTS 64bits
* Red Hat Enterprise Linux Server release 7.3 64bits
* Red Hat Enterprise Linux Server release 7.4 64bits
* CentOS 7.3.1611 64bits
- Use the following command to install the required tool to use Intel(R) SGX SDK:
* On Ubuntu 16.04:
```
$ sudo apt-get install build-essential python
```
* On Red Hat Enterprise Linux 7.3 and CentOS 7.3:
* On Red Hat Enterprise Linux 7.4 and CentOS 7.3:
```
$ sudo yum groupinstall 'Development Tools'
$ sudo yum install python
@ -142,6 +145,10 @@ To install the Intel(R) SGX SDK, invoke the installer, as follows:
$ cd linux/installer/bin
$ ./sgx_linux_x64_sdk_${version}.bin
```
NOTE: You need to set up the needed environment variables before compiling your code. To do so, run:
```
$ source ${sgx-sdk-install-path}/environment
```
### Test the Intel(R) SGX SDK Package with the Code Samples
- Compile and run each code sample in Simulation mode to make sure the package works well:
```
@ -150,12 +157,13 @@ $ ./sgx_linux_x64_sdk_${version}.bin
$ ./app
```
Use similar commands for other sample codes.
### Compile and Run the Code Samples in the Hardware Mode
If you use an Intel SGX hardware enabled machine, you can run the code samples in Hardware mode.
Ensure that you install Intel(R) SGX driver and Intel(R) SGX PSW installer on the machine.
See the earlier topic, *Build and Install the Intel(R) SGX Driver*, for information on how to install the Intel(R) SGX driver.
See the later topic, *Install Intel(R) SGX PSW*, for information on how to install the PSW package.
- Compile and run each code sample in Hardware mode, debug build, as follows:
- Compile and run each code sample in Hardware mode, Debug build, as follows:
```
$ cd SampleCode/LocalAttestation
$ make
@ -163,13 +171,12 @@ See the later topic, *Install Intel(R) SGX PSW*, for information on how to insta
```
Use similar commands for other code samples.
Install the Intel(R) SGX PSW
------------------------
----------------------------
### Prerequisites
- Ensure that you have one of the following operating systems:
* Ubuntu\* Desktop-16.04-LTS 64bits
* Red Hat Enterprise Linux Server release 7.3 64bits
* Red Hat Enterprise Linux Server release 7.4 64bits
* CentOS 7.3.1611 64bits
- Ensure that you have a system with the following required hardware:
* 6th Generation Intel(R) Core(TM) Processor or newer
@ -180,7 +187,7 @@ Install the Intel(R) SGX PSW
```
$ sudo apt-get install libssl-dev libcurl4-openssl-dev libprotobuf-dev
```
* On Red Hat Enterprise Linux 7.3 and CentOS 7.3:
* On Red Hat Enterprise Linux 7.4 and CentOS 7.3:
```
$ sudo yum install openssl-devel libcurl-devel protobuf-devel
```
@ -193,7 +200,7 @@ Install the Intel(R) SGX PSW
$ sudo alien --scripts iclsClient-1.45.449.12-1.x86_64.rpm
$ sudo dpkg -i iclsclient_1.45.449.12-2_amd64.deb
```
* On Red Hat Enterprise Linux 7.3 and CentOS 7.3:
* On Red Hat Enterprise Linux 7.4 and CentOS 7.3:
```
$ sudo yum install iclsClient-1.45.449.12-1.x86_64.rpm
```
@ -203,7 +210,7 @@ Install the Intel(R) SGX PSW
$ sudo apt-get install uuid-dev libxml2-dev cmake pkg-config
$ cmake .;make;sudo make install;sudo systemctl enable jhi
```
* On Red Hat Enterprise Linux 7.3 and CentOS 7.3:
* On Red Hat Enterprise Linux 7.4 and CentOS 7.3:
```
$ sudo yum install libuuid-devel libxml2-devel cmake pkgconfig
$ cmake .;make;sudo make install;sudo ldconfig;sudo systemctl enable jhi

2
sgx-jvm/linux-sgx/SampleCode/Cxx11SGXDemo/Enclave/Enclave.edl
View File

@ -41,7 +41,7 @@ enclave {
*/
from "TrustedLibrary/Libcxx.edl" import *;
from "sgx_tstdc.edl" import sgx_thread_wait_untrusted_event_ocall, sgx_thread_set_untrusted_event_ocall, sgx_thread_setwait_untrusted_events_ocall, sgx_thread_set_multiple_untrusted_events_ocall;
from "sgx_tstdc.edl" import *;
/*
* ocall_print_string - invokes OCALL to display string buffer inside the enclave.

6
sgx-jvm/linux-sgx/SampleCode/Cxx11SGXDemo/Enclave/TrustedLibrary/Libcxx.cpp
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@ -330,7 +330,7 @@ void ecall_cxx11_algorithms_demo()
printf("[cxx11_algorithms] Some elements in { 0 1 2 3 4 5 } are even is %s. \n", are_any_of ? "true" : "false");
bool are_none_of = none_of(begin(v), end(v), [](int e) { return e % 2 == 0; });
printf("[cxx11_algorithms] Some elements in { 0 1 2 3 4 5 } are even is %s. \n", are_none_of ? "true" : "false");
printf("[cxx11_algorithms] None elements in { 0 1 2 3 4 5 } are even is %s. \n", are_none_of ? "true" : "false");
printf("\n"); // end of demo
}
@ -594,10 +594,10 @@ void ecall_new_container_classes_demo()
const int searchVal = 3;
std::unordered_set<int>::const_iterator got = set_of_numbers.find(searchVal);
if (got == set_of_numbers.end())
if (got != set_of_numbers.end())
printf("[new_container_classes] unordered_set { 0, 1, 2, 3, 4, 5} has value 3.\n");
else
printf("[new_container_classes] unordered_set { 0, 1, 2, 3, 4, 5} it does not have value 3.\n");
printf("[new_container_classes] unordered_set { 0, 1, 2, 3, 4, 5} does not have value 3.\n");
// unordered_multiset
// container used for fast acces that groups non unique elements in buckets based on their hash

8
sgx-jvm/linux-sgx/SampleCode/Cxx11SGXDemo/README.txt
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@ -26,7 +26,9 @@ The project demonstrates serveral C++11 features inside the Enclave:
How to Build/Execute the C++11 sample program
---------------------------------------------
1. Install Intel(R) Software Guard Extensions (Intel(R) SGX) SDK for Linux* OS
2. Build the project with the prepared Makefile:
2. Make sure your environment is set:
$ source ${sgx-sdk-install-path}/environment
3. Build the project with the prepared Makefile:
a. Hardware Mode, Debug build:
$ make
b. Hardware Mode, Pre-release build:
@ -39,6 +41,6 @@ How to Build/Execute the C++11 sample program
$ make SGX_MODE=SIM SGX_PRERELEASE=1 SGX_DEBUG=0
f. Simulation Mode, Release build:
$ make SGX_MODE=SIM SGX_DEBUG=0
3. Execute the binary directly:
4. Execute the binary directly:
$ ./app
4. Remember to "make clean" before switching build mode
5. Remember to "make clean" before switching build mode

2
sgx-jvm/linux-sgx/SampleCode/LocalAttestation/App/App.cpp
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@ -118,7 +118,7 @@ int _tmain(int argc, _TCHAR* argv[])
printf("\nLoad Enclave Failure");
}
printf("\nAvaliable Enclaves");
printf("\nAvailable Enclaves");
printf("\nEnclave1 - EnclaveID %" PRIx64, e1_enclave_id);
printf("\nEnclave2 - EnclaveID %" PRIx64, e2_enclave_id);
printf("\nEnclave3 - EnclaveID %" PRIx64, e3_enclave_id);

8
sgx-jvm/linux-sgx/SampleCode/LocalAttestation/README.txt
View File

@ -9,7 +9,9 @@ The project demonstrates:
How to Build/Execute the Sample Code
------------------------------------
1. Install Intel(R) Software Guard Extensions (Intel(R) SGX) SDK for Linux* OS
2. Build the project with the prepared Makefile:
2. Make sure your environment is set:
$ source ${sgx-sdk-install-path}/environment
3. Build the project with the prepared Makefile:
a. Hardware Mode, Debug build:
$ make
b. Hardware Mode, Pre-release build:
@ -22,6 +24,6 @@ How to Build/Execute the Sample Code
$ make SGX_MODE=SIM SGX_PRERELEASE=1 SGX_DEBUG=0
f. Simulation Mode, Release build:
$ make SGX_MODE=SIM SGX_DEBUG=0
3. Execute the binary directly:
4. Execute the binary directly:
$ ./app
4. Remember to "make clean" before switching build mode
5. Remember to "make clean" before switching build mode

2
sgx-jvm/linux-sgx/SampleCode/PowerTransition/Makefile
View File

@ -90,7 +90,7 @@ else
App_Compile_CFlags += -DNDEBUG -UEDEBUG -UDEBUG
endif
App_Compile_CXXFlags := -std=c++0x $(App_Compile_CFlags)
App_Compile_CXXFlags := -std=c++11 $(App_Compile_CFlags)
App_Link_Flags := -L$(SGX_LIBRARY_PATH) -l$(Urts_Library_Name) -lpthread
ifneq ($(SGX_MODE), HW)

8
sgx-jvm/linux-sgx/SampleCode/PowerTransition/README.txt
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@ -8,7 +8,9 @@ Software Guard Extensions projects development.
How to Build/Execute the Sample Code
------------------------------------
1. Install Intel(R) Software Guard Extensions (Intel(R) SGX) SDK for Linux* OS
2. Build the project with the prepared Makefile:
2. Make sure your environment is set:
$ source ${sgx-sdk-install-path}/environment
3. Build the project with the prepared Makefile:
a. Hardware Mode, Debug build:
$ make
b. Hardware Mode, Pre-release build:
@ -21,6 +23,6 @@ How to Build/Execute the Sample Code
$ make SGX_MODE=SIM SGX_PRERELEASE=1 SGX_DEBUG=0
f. Simulation Mode, Release build:
$ make SGX_MODE=SIM SGX_DEBUG=0
3. Execute the binary directly:
4. Execute the binary directly:
$ ./app
4. Remember to "make clean" before switching build mode
5. Remember to "make clean" before switching build mode

8
sgx-jvm/linux-sgx/SampleCode/RemoteAttestation/README.txt
View File

@ -9,7 +9,9 @@ The project demonstrates:
How to Build/Execute the Sample Code
------------------------------------
1. Install Intel(R) Software Guard Extensions (Intel(R) SGX) SDK for Linux* OS
2. Build the project with the prepared Makefile:
2. Make sure your environment is set:
$ source ${sgx-sdk-install-path}/environment
3. Build the project with the prepared Makefile:
a. Hardware Mode, Debug build:
$ make
b. Hardware Mode, Pre-release build:
@ -22,6 +24,6 @@ How to Build/Execute the Sample Code
$ make SGX_MODE=SIM SGX_PRERELEASE=1 SGX_DEBUG=0
f. Simulation Mode, Release build:
$ make SGX_MODE=SIM SGX_DEBUG=0
3. Execute the binary directly:
4. Execute the binary directly:
$ ./app
4. Remember to "make clean" before switching build mode
5. Remember to "make clean" before switching build mode

2
sgx-jvm/linux-sgx/SampleCode/SampleEnclave/App/App.cpp
View File

@ -146,7 +146,7 @@ void print_error_message(sgx_status_t ret)
}
if (idx == ttl)
printf("Error: Unexpected error occurred.\n");
printf("Error code is 0x%X. Please refer to the \"Intel SGX SDK Developer Reference\" for more details.\n", ret);
}
/* Initialize the enclave:

2
sgx-jvm/linux-sgx/SampleCode/SampleEnclave/App/TrustedLibrary/Libc.cpp
View File

@ -44,7 +44,7 @@ void ecall_libc_functions(void)
if (ret != SGX_SUCCESS)
abort();
int cpuid[4] = {0x1, 0x0, 0x0, 0x0};
int cpuid[4] = {0x0, 0x0, 0x0, 0x0};
ret = ecall_sgx_cpuid(global_eid, cpuid, 0x0);
if (ret != SGX_SUCCESS)
abort();

2
sgx-jvm/linux-sgx/SampleCode/SampleEnclave/Enclave/TrustedLibrary/Libc.edl
View File

@ -50,6 +50,6 @@ enclave {
/*
* Utilize SGX version __cpuid() in enclave.
*/
public void ecall_sgx_cpuid([in, out] int cpuinfo[4], int leaf);
public void ecall_sgx_cpuid([out] int cpuinfo[4], int leaf);
};
};

28
sgx-jvm/linux-sgx/SampleCode/SampleEnclave/Enclave/config.01.xml Normal file
View File

@ -0,0 +1,28 @@
<EnclaveConfiguration>
<ProdID>0</ProdID>
<ISVSVN>0</ISVSVN>
<!-- If TCSMaxNum == TCSNum == TCSMinPool, there is no dynamic thread -->
<!-- If TCSMaxNum is omitted, it defaults to TCSNum -->
<!-- According to this setting, there are 10 static threads available -->
<TCSMaxNum>10</TCSMaxNum>
<TCSNum>10</TCSNum>
<TCSMinPool>10</TCSMinPool>
<TCSPolicy>1</TCSPolicy>
<!-- Since there's no dynamic thread, only StackMaxSize is relevant here -->
<StackMaxSize>0x40000</StackMaxSize>
<!-- When there's no gap between HeapMinSize and HeapInitSize, or between
HeapInitSize and HeapMaxSize, no dynamic heap expansion will occur. -->
<!-- In this case, the total available heap is 1 MB-->
<HeapMaxSize>0x100000</HeapMaxSize>
<HeapInitSize>0x100000</HeapInitSize>
<HeapMinSize>0x100000</HeapMinSize>
<!-- Recommend changing 'DisableDebug' to 1 to make the enclave undebuggable for enclave release -->
<DisableDebug>0</DisableDebug>
<MiscSelect>0</MiscSelect>
<MiscMask>0xFFFFFFFF</MiscMask>
</EnclaveConfiguration>

25
sgx-jvm/linux-sgx/SampleCode/SampleEnclave/Enclave/config.02.xml Normal file
View File

@ -0,0 +1,25 @@
<EnclaveConfiguration>
<ProdID>0</ProdID>
<ISVSVN>0</ISVSVN>
<StackMaxSize>0x40000</StackMaxSize>
<!-- On a system with SGX EDMM, the amount of available heap once the enclave
is initialized is HeapMinSize (0x1000 bytes). The gap between HeapMinSize
and HeapMaxSize will be expanded as necessary.
On a system without SGX EDMM, the amount of available heap once the enclave
is initialized is HeapInitSize (0x40000 bytes), and there is no heap expansion.
-->
<HeapMaxSize>0x100000</HeapMaxSize>
<HeapInitSize>0x40000</HeapInitSize>
<HeapMinSize>0x1000</HeapMinSize>
<TCSMaxNum>10</TCSMaxNum>
<TCSNum>10</TCSNum>
<TCSMinPool>10</TCSMinPool>
<TCSPolicy>1</TCSPolicy>
<!-- Recommend changing 'DisableDebug' to 1 to make the enclave undebuggable for enclave release -->
<DisableDebug>0</DisableDebug>
<MiscSelect>0</MiscSelect>
<MiscMask>0xFFFFFFFF</MiscMask>
</EnclaveConfiguration>

27
sgx-jvm/linux-sgx/SampleCode/SampleEnclave/Enclave/config.03.xml Normal file
View File

@ -0,0 +1,27 @@
<EnclaveConfiguration>
<ProdID>0</ProdID>
<ISVSVN>0</ISVSVN>
<!--In this case, there will be 3 static threads available and up to 7 threads
can be created dynamically as necessary.
-->
<TCSNum>10</TCSNum>
<TCSMinPool>3</TCSMinPool>
<TCSPolicy>1</TCSPolicy>
<!-- For a static thread, total stack available is 0x40000 bytes. -->
<!-- For a dynamic thread, once it is created, total stack available is
0x40000 bytes and no stack expansion will occur.
-->
<StackMaxSize>0x40000</StackMaxSize>
<StackMinSize>0x40000</StackMinSize>
<!-- HeapMinSize is omitted, defaults to 0x1000 -->
<!-- HeapInitSize is omitted, defaults to HeapMaxSize -->
<HeapMaxSize>0x100000</HeapMaxSize>
<!-- Recommend changing 'DisableDebug' to 1 to make the enclave undebuggable for enclave release -->
<DisableDebug>0</DisableDebug>
<MiscSelect>0</MiscSelect>
<MiscMask>0xFFFFFFFF</MiscMask>
</EnclaveConfiguration>

23
sgx-jvm/linux-sgx/SampleCode/SampleEnclave/Enclave/config.04.xml Normal file
View File

@ -0,0 +1,23 @@
<EnclaveConfiguration>
<ProdID>0</ProdID>
<ISVSVN>0</ISVSVN>
<TCSNum>10</TCSNum>
<TCSMinPool>3</TCSMinPool>
<TCSPolicy>1</TCSPolicy>
<!-- For a static thread, total available stack is 0x40000 -->
<!-- For a dynamic thread, once it is creted, available stack is
0x2000, the gap, that is 0x40000 - 0x2000, can be dynamically
expanded as necessary.
-->
<StackMaxSize>0x40000</StackMaxSize>
<StackMinSize>0x2000</StackMinSize>
<HeapMaxSize>0x100000</HeapMaxSize>
<!-- Recommend changing 'DisableDebug' to 1 to make the enclave undebuggable for enclave release -->
<DisableDebug>0</DisableDebug>
<MiscSelect>0</MiscSelect>
<MiscMask>0xFFFFFFFF</MiscMask>
</EnclaveConfiguration>

45
sgx-jvm/linux-sgx/SampleCode/SampleEnclave/README.txt
View File

@ -11,7 +11,9 @@ Extensions (Intel(R) SGX) SDK:
How to Build/Execute the Sample Code
------------------------------------
1. Install Intel(R) SGX SDK for Linux* OS
2. Build the project with the prepared Makefile:
2. Make sure your environment is set:
$ source ${sgx-sdk-install-path}/environment
3. Build the project with the prepared Makefile:
a. Hardware Mode, Debug build:
$ make
b. Hardware Mode, Pre-release build:
@ -24,7 +26,44 @@ How to Build/Execute the Sample Code
$ make SGX_MODE=SIM SGX_PRERELEASE=1 SGX_DEBUG=0
f. Simulation Mode, Release build:
$ make SGX_MODE=SIM SGX_DEBUG=0
3. Execute the binary directly:
4. Execute the binary directly:
$ ./app
4. Remember to "make clean" before switching build mode
5. Remember to "make clean" before switching build mode
------------------------------------------
Explanation about Configuration Parameters
------------------------------------------
TCSMaxNum, TCSNum, TCSMinPool
These three parameters will determine whether a thread will be created
dynamically when there is no available thread to do the work.
StackMaxSize, StackMinSize
For a dynamically created thread, StackMinSize is the amount of stack available
once the thread is created and StackMaxSize is the total amount of stack that
thread can use. The gap between StackMinSize and StackMaxSize is the stack
dynamically expanded as necessary at runtime.
For a static thread, only StackMaxSize is relevant which specifies the total
amount of stack available to the thread.
HeapMaxSize, HeapInitSize, HeapMinSize
HeapMinSize is the amount of heap available once the enclave is initialized.
HeapMaxSize is the total amount of heap an enclave can use. The gap between
HeapMinSize and HeapMaxSize is the heap dynamically expanded as necessary
at runtime.
HeapInitSize is here for compatibility.
-------------------------------------------------
Sample configuration files for the Sample Enclave
-------------------------------------------------
config.01.xml: There is no dynamic thread, no dynamic heap expansion.
config.02.xml: There is no dynamic thread. But dynamic heap expansion can happen.
config.03.xml: There are dynamic threads. For a dynamic thread, there's no stack expansion.
config.04.xml: There are dynamic threads. For a dynamic thread, stack will expanded as necessary.

8
sgx-jvm/linux-sgx/SampleCode/SealedData/DRM_enclave/DRM_enclave.cpp
View File

@ -114,11 +114,11 @@ static uint32_t verify_sealed_data(
break;
case SGX_ERROR_INVALID_ISVSVN:
/* Indicates isv_svn field of the sealed data is greater than
the enclave’s ISVSVN. This is a downgraded enclave.*/
the enclave's ISVSVN. This is a downgraded enclave.*/
break;
case SGX_ERROR_INVALID_CPUSVN:
/* Indicates cpu_svn field of the sealed data is greater than
the platform’s cpu_svn. enclave is on a downgraded platform.*/
the platform's cpu_svn. enclave is on a downgraded platform.*/
break;
case SGX_ERROR_INVALID_KEYNAME:
/*Indicates key_name field of the sealed data is incorrect.*/
@ -504,11 +504,11 @@ uint32_t perform_time_based_policy(const uint8_t* sealed_log,
break;
case SGX_ERROR_INVALID_ISVSVN:
/* Indicates isv_svn field of the sealed data is greater than the
enclave’s ISVSVN. This is a downgraded enclave.*/
enclave's ISVSVN. This is a downgraded enclave.*/
break;
case SGX_ERROR_INVALID_CPUSVN:
/* Indicates cpu_svn field of the sealed data is greater than the
platform’s cpu_svn. enclave is on a downgraded platform.*/
platform's cpu_svn. enclave is on a downgraded platform.*/
break;
case SGX_ERROR_INVALID_KEYNAME:
/*Indicates key_name field of the sealed data is incorrect.*/

8
sgx-jvm/linux-sgx/SampleCode/SealedData/README.txt
View File

@ -11,7 +11,9 @@ replay-protected policy, and Trusted Time to enforce time based policy
How to Build/Execute the Sample Code
------------------------------------
1. Install Intel(R) Software Guard Extensions (Intel(R) SGX) SDK for Linux* OS
2. Build the project with the prepared Makefile:
2. Make sure your environment is set:
$ source ${sgx-sdk-install-path}/environment
3. Build the project with the prepared Makefile:
a. Hardware Mode, Debug build:
$ make
b. Hardware Mode, Pre-release build:
@ -24,6 +26,6 @@ How to Build/Execute the Sample Code
$ make SGX_MODE=SIM SGX_PRERELEASE=1 SGX_DEBUG=0
f. Simulation Mode, Release build:
$ make SGX_MODE=SIM SGX_DEBUG=0
3. Execute the binary directly:
4. Execute the binary directly:
$ ./app
4. Remember to "make clean" before switching build mode
5. Remember to "make clean" before switching build mode

35
sgx-jvm/linux-sgx/buildenv.mk
View File

@ -75,10 +75,10 @@ else
endif
ifdef DEBUG
COMMON_FLAGS += -ggdb -DDEBUG -UNDEBUG
COMMON_FLAGS += -O0 -ggdb -DDEBUG -UNDEBUG
COMMON_FLAGS += -DSE_DEBUG_LEVEL=SE_TRACE_DEBUG
else
COMMON_FLAGS += -O2 -UDEBUG -DNDEBUG
COMMON_FLAGS += -O2 -D_FORTIFY_SOURCE=2 -UDEBUG -DNDEBUG
endif
ifdef SE_SIM
@ -99,13 +99,7 @@ CFLAGS += -Wjump-misses-init -Wstrict-prototypes -Wunsuffixed-float-constants
# additional warnings flags for C++
CXXFLAGS += -Wnon-virtual-dtor
# for static_assert()
CXXFLAGS += -std=c++0x
# Disable cxx11 abi
CXXFLAGS += -D_GLIBCXX_USE_CXX11_ABI=0
CXXFLAGS += $(EXTRA_CXXFLAGS)
CXXFLAGS += -std=c++11
.DEFAULT_GOAL := all
# this turns off the RCS / SCCS implicit rules of GNU Make
@ -153,6 +147,9 @@ endif
CFLAGS += $(COMMON_FLAGS)
CXXFLAGS += $(COMMON_FLAGS)
# Enable the security flags
COMMON_LDFLAGS := -Wl,-z,relro,-z,now,-z,noexecstack
# Compiler and linker options for an Enclave
#
# We are using '--export-dynamic' so that `g_global_data_sim' etc.
@ -163,31 +160,25 @@ CXXFLAGS += $(COMMON_FLAGS)
# as `global' in the LD version script.
ENCLAVE_CFLAGS = -ffreestanding -nostdinc -fvisibility=hidden -fpie
ENCLAVE_CXXFLAGS = $(ENCLAVE_CFLAGS) -nostdinc++
ENCLAVE_LDFLAGS = -Wl,-Bstatic -Wl,-Bsymbolic -Wl,--no-undefined \
ENCLAVE_LDFLAGS = $(COMMON_LDFLAGS) -Wl,-Bstatic -Wl,-Bsymbolic -Wl,--no-undefined \
-Wl,-pie,-eenclave_entry -Wl,--export-dynamic \
-Wl,--defsym,__ImageBase=0
# Choose to use the optimized libraries (IPP/String/Math) by default.
# Users could also use the non-optimized source code version by
# Users could also use the source code version (SGXSSL/String/Math) by
# explicitly specifying 'USE_OPT_LIBS=0'
USE_OPT_LIBS ?= 1
ifeq ($(ARCH), x86_64)
IPP_SUBDIR = intel64
else
IPP_SUBDIR = ia32
endif
ifneq ($(USE_OPT_LIBS), 0)
SGX_IPP_DIR := $(ROOT_DIR)/external/ippcp_internal
SGX_IPP_INC := $(SGX_IPP_DIR)/inc
IPP_LIBS_DIR := $(SGX_IPP_DIR)/lib/linux/$(IPP_SUBDIR)
LD_IPP := -lippcp -lippcore
else
SGX_IPP_DIR := $(ROOT_DIR)/external/crypto_px
SGX_IPP_INC := $(SGX_IPP_DIR)/include
IPP_LIBS_DIR := $(SGX_IPP_DIR)
LD_IPP := -lcrypto_px
endif
SGX_IPP_DIR := $(ROOT_DIR)/external/ippcp_internal
SGX_IPP_INC := $(SGX_IPP_DIR)/inc
IPP_LIBS_DIR := $(SGX_IPP_DIR)/lib/linux/$(IPP_SUBDIR)
LD_IPP := -lippcp -lippcore

5
sgx-jvm/linux-sgx/common/inc/internal/arch.h
View File

@ -158,6 +158,10 @@ typedef uint64_t si_flags_t;
#define SI_FLAG_SECS (0x00<<SI_FLAG_PT_LOW_BIT) /* SECS */
#define SI_FLAG_TCS (0x01<<SI_FLAG_PT_LOW_BIT) /* TCS */
#define SI_FLAG_REG (0x02<<SI_FLAG_PT_LOW_BIT) /* Regular Page */
#define SI_FLAG_TRIM (0x04<<SI_FLAG_PT_LOW_BIT) /* Trim Page */
#define SI_FLAG_PENDING 0x8
#define SI_FLAG_MODIFIED 0x10
#define SI_FLAG_PR 0x20
#define SI_FLAGS_EXTERNAL (SI_FLAG_PT_MASK | SI_FLAG_R | SI_FLAG_W | SI_FLAG_X) /* Flags visible/usable by instructions */
#define SI_FLAGS_R (SI_FLAG_R|SI_FLAG_REG)
@ -190,6 +194,7 @@ typedef struct _page_info_t
#define SE_KEY_SIZE 384 /* in bytes */
#define SE_EXPONENT_SIZE 4 /* RSA public key exponent size in bytes */
typedef struct _css_header_t { /* 128 bytes */
uint8_t header[12]; /* (0) must be (06000000E100000000000100H) */
uint32_t type; /* (12) bit 31: 0 = prod, 1 = debug; Bit 30-0: Must be zero */

52
sgx-jvm/linux-sgx/common/inc/internal/crypto_wrapper.h Normal file
View File

@ -0,0 +1,52 @@
/*
* Copyright (C) 2011-2017 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef _CRYPTO_WRAPPER_H
#define _CRYPTO_WRAPPER_H
#include <openssl/evp.h>
#include "sgx_report.h"
#include "sgx_error.h"
#ifdef __cplusplus
extern "C" {
#endif
sgx_status_t sgx_EVP_Digest(const EVP_MD *type, const uint8_t *p_src, unsigned int src_len, uint8_t *digest, unsigned int *digest_len);
sgx_status_t sgx_cmac128_msg(const sgx_key_128bit_t key, const uint8_t *p_src, unsigned int src_len, sgx_mac_t *p_mac);
#ifdef __cplusplus
}
#endif
#endif

9
sgx-jvm/linux-sgx/common/inc/internal/enclave_creator.h
View File

@ -49,6 +49,8 @@
#include "uncopyable.h"
#include <string.h>
#include "file.h"
#include "isgx_user.h"
// this is the interface to both hardware, simulation and signing mode
class EnclaveCreator : private Uncopyable
@ -68,12 +70,19 @@ public:
virtual int destroy_enclave(sgx_enclave_id_t enclave_id, uint64_t enclave_size = 0) = 0;
virtual int initialize(sgx_enclave_id_t enclave_id) = 0;
virtual bool use_se_hw() const = 0;
virtual bool is_EDMM_supported(sgx_enclave_id_t enclave_id) = 0;
virtual bool is_driver_compatible() = 0;
virtual int get_misc_attr(sgx_misc_attribute_t *sgx_misc_attr, metadata_t *metadata, SGXLaunchToken * const lc, uint32_t flag) = 0;
virtual bool get_plat_cap(sgx_misc_attribute_t *se_attr) = 0;
#ifdef SE_1P5_VERTICAL
virtual uint32_t handle_page_fault(uint64_t pf_address) { UNUSED(pf_address); return (uint32_t)SGX_ERROR_UNEXPECTED; }
#endif
virtual int emodpr(uint64_t addr, uint64_t size, uint64_t flag) = 0;
virtual int mktcs(uint64_t tcs_addr) = 0;
virtual int trim_range(uint64_t fromaddr, uint64_t toaddr) = 0;
virtual int trim_accept(uint64_t addr) = 0;
virtual int remove_range(uint64_t fromaddr, uint64_t numpages) = 0;
// destructor
virtual ~EnclaveCreator() {};
};

14
sgx-jvm/linux-sgx/common/inc/internal/global_data.h
View File

@ -41,15 +41,21 @@
#include "se_types.h"
#include "thread_data.h"
#include "metadata.h"
#include "rts.h"
#define LAYOUT_ENTRY_NUM 38
typedef struct _global_data_t
{
sys_word_t enclave_size;
sys_word_t heap_offset;
sys_word_t heap_size;
uint32_t thread_policy;
uint32_t reserved;
sys_word_t thread_policy;
thread_data_t td_template;
uint8_t tcs_template[TCS_TEMPLATE_SIZE];
uint32_t layout_entry_num;
uint32_t reserved;
layout_t layout_table[LAYOUT_ENTRY_NUM];
} global_data_t;
#define ENCLAVE_INIT_NOT_STARTED 0
@ -62,7 +68,11 @@ extern "C" {
#endif
extern SE_DECLSPEC_EXPORT global_data_t const volatile g_global_data;
extern uint32_t g_enclave_state;
extern sdk_version_t g_sdk_version;
extern int EDMM_supported;
extern uint8_t __ImageBase;
extern int g_xsave_enabled;
#ifdef __cplusplus
}

1
sgx-jvm/linux-sgx/common/inc/internal/global_init.h
View File

@ -40,6 +40,7 @@ extern "C" {
#endif
void init_global_object(void);
void uninit_global_object(void);
#ifdef __cplusplus
}

1
sgx-jvm/linux-sgx/common/inc/internal/inst.h
View File

@ -45,6 +45,7 @@ typedef enum {
SE_EENTER,
SE_ERESUME,
SE_EEXIT,
SE_EACCEPT,
SE_LAST_RING3,
SE_ECREATE = 0x0,

3
sgx-jvm/linux-sgx/common/inc/internal/linux/linux-regs.h
View File

@ -85,6 +85,9 @@
#define SE_EGETKEY 1
#define SE_EENTER 2
#define SE_EEXIT 4
#define SE_EACCEPT 5
#define SE_EMODPE 6
#define SE_ECREATE 0
#define SE_EADD 1

48
sgx-jvm/linux-sgx/common/inc/internal/metadata.h
View File

@ -37,16 +37,22 @@
#pragma pack(1)
/* version of metadata */
#define MAJOR_VERSION 1 /* MAJOR_VERSION should not larger than 0ffffffff */
#define MINOR_VERSION 4 /* MINOR_VERSION should not larger than 0ffffffff */
#define MAJOR_VERSION 2 //MAJOR_VERSION should not larger than 0ffffffff
#define MINOR_VERSION 1 //MINOR_VERSION should not larger than 0ffffffff
#define SGX_1_9_MAJOR_VERSION 1 //MAJOR_VERSION should not larger than 0ffffffff
#define SGX_1_9_MINOR_VERSION 4 //MINOR_VERSION should not larger than 0ffffffff
#define SGX_1_5_MAJOR_VERSION 1 //MAJOR_VERSION should not larger than 0ffffffff
#define SGX_1_5_MINOR_VERSION 3 //MINOR_VERSION should not larger than 0ffffffff
#define META_DATA_MAKE_VERSION(major, minor) (((uint64_t)major)<<32 | minor)
#define METADATA_MAGIC 0x86A80294635D0E4CULL
#define METADATA_SIZE 0x1000
#define METADATA_SIZE 0x3000
#define TCS_TEMPLATE_SIZE 72
/* TCS Policy bit masks */
#define TCS_POLICY_BIND 0x00000000 /* If set, the TCS is bound to the application thread */
#define TCS_POLICY_UNBIND 0x00000001
@ -58,7 +64,9 @@
#define SSA_FRAME_SIZE_MIN 1
#define SSA_FRAME_SIZE_MAX 2
#define STACK_SIZE_MIN 0x1000
#define HEAP_SIZE_MIN 0
#define STACK_SIZE_MAX 0x40000
#define HEAP_SIZE_MIN 0x1000
#define HEAP_SIZE_MAX 0x1000000
#define DEFAULT_MISC_SELECT 0
#define DEFAULT_MISC_MASK 0xFFFFFFFF
@ -78,13 +86,27 @@ typedef enum
#define GROUP_FLAG (1<<12)
#define GROUP_ID(x) (GROUP_FLAG | x)
#define IS_GROUP_ID(x) !!((x) & GROUP_FLAG)
#define LAYOUT_ID_HEAP 1
#define LAYOUT_ID_TCS 2
#define LAYOUT_ID_TD 3
#define LAYOUT_ID_SSA 4
#define LAYOUT_ID_STACK 5
#define LAYOUT_ID_THREAD_GROUP GROUP_ID(6)
#define LAYOUT_ID_GUARD 7
#define LAYOUT_ID_HEAP_MIN 1
#define LAYOUT_ID_HEAP_INIT 2
#define LAYOUT_ID_HEAP_MAX 3
#define LAYOUT_ID_TCS 4
#define LAYOUT_ID_TD 5
#define LAYOUT_ID_SSA 6
#define LAYOUT_ID_STACK_MAX 7
#define LAYOUT_ID_STACK_MIN 8
#define LAYOUT_ID_THREAD_GROUP GROUP_ID(9)
#define LAYOUT_ID_GUARD 10
#define LAYOUT_ID_HEAP_DYN_MIN 11
#define LAYOUT_ID_HEAP_DYN_INIT 12
#define LAYOUT_ID_HEAP_DYN_MAX 13
#define LAYOUT_ID_TCS_DYN 14
#define LAYOUT_ID_TD_DYN 15
#define LAYOUT_ID_SSA_DYN 16
#define LAYOUT_ID_STACK_DYN_MAX 17
#define LAYOUT_ID_STACK_DYN_MIN 18
#define LAYOUT_ID_THREAD_GROUP_DYN GROUP_ID(19)
/*
** layout table example
@ -138,12 +160,12 @@ typedef struct _metadata_t
uint32_t ssa_frame_size; /* The size of SSA frame in page */
uint32_t max_save_buffer_size; /* Max buffer size is 2632 */
uint32_t desired_misc_select;
uint32_t reserved;
uint32_t tcs_min_pool; /* TCS min pool*/
uint64_t enclave_size; /* enclave virtual size */
sgx_attributes_t attributes; /* XFeatureMask to be set in SECS. */
enclave_css_t enclave_css; /* The enclave signature */
data_directory_t dirs[DIR_NUM];
uint8_t data[2208];
uint8_t data[10400];
}metadata_t;
se_static_assert(sizeof(metadata_t) == METADATA_SIZE);

21
sgx-jvm/linux-sgx/common/inc/internal/rts.h
View File

@ -63,12 +63,29 @@ typedef enum
SDK_VERSION_2_0
} sdk_version_t;
typedef struct _cpu_feature_sdk_version
typedef struct _system_features
{
uint64_t cpu_features;
sdk_version_t version;
}cpu_sdk_info_t;
/* system feature set array. MSb of each element indicates whether this is
* the last element. This will help tRTS to know when it can stop walking
* through the array searching for certain features.
*/
uint64_t system_feature_set[1];
}system_features_t;
// current system_feature_set only contains one element of type uint64_t, the highest
// bit is bit 63
#define SYS_FEATURE_MSb 63
#define OCALL_FLAG 0x4F434944
typedef enum
{
EDMM_TRIM = -2,
EDMM_TRIM_COMMIT = -3,
EDMM_MODPR = -4,
}edmm_ocall_t;
#endif

2
sgx-jvm/linux-sgx/common/inc/internal/rts_cmd.h
View File

@ -34,6 +34,8 @@
#define ECMD_INIT_ENCLAVE -1
#define ECMD_ORET -2
#define ECMD_EXCEPT -3
#define ECMD_MKTCS -4
#define ECMD_UNINIT_ENCLAVE -5
/* OCALL command */
#define OCMD_ERET -1

15
sgx-jvm/linux-sgx/common/inc/internal/se_lock.hpp
View File

@ -49,6 +49,21 @@ private:
se_mutex_t m_mutex;
};
class Cond: private Uncopyable
{
public:
Cond(){se_mutex_init(&m_mutex); se_thread_cond_init(&m_cond);}
~Cond(){se_mutex_destroy(&m_mutex); se_thread_cond_destroy(&m_cond);}
void lock(){se_mutex_lock(&m_mutex);}
void unlock(){se_mutex_unlock(&m_mutex);}
void wait(){se_thread_cond_wait(&m_cond, &m_mutex);}
void signal(){se_thread_cond_signal(&m_cond);}
void broadcast(){se_thread_cond_broadcast(&m_cond);}
private:
se_mutex_t m_mutex;
se_cond_t m_cond;
};
class LockGuard: private Uncopyable
{
public:

23
sgx-jvm/linux-sgx/common/inc/internal/se_page_attr.h
View File

@ -32,16 +32,29 @@
#ifndef _SE_PAGE_ATTR_H_
#define _SE_PAGE_ATTR_H_
// layout.entry.attribute is 16-bit length
typedef enum
{
DoEADD = 0,
DoEEXTEND,
DoEREMOVE,
DoPostADD,
DoPostREMOVE,
DynTHREAD,
GrowDOWN,
} ATTRIBUTE_BITS_t;
typedef enum
{
ADD_PAGE_ONLY = 1<<DoEADD,
ADD_EXTEND_PAGE = 1<<DoEADD|1<<DoEEXTEND,
} EADD_BUFFER_IN_ATTRIBUTE_t;
#define PAGE_ATTR_EADD (1<<DoEADD)
#define PAGE_ATTR_EEXTEND (1<<DoEEXTEND)
#define PAGE_ATTR_EREMOVE (1<<DoEREMOVE)
#define PAGE_ATTR_POST_ADD (1<<DoPostADD)
#define PAGE_ATTR_POST_REMOVE (1<<DoPostREMOVE)
#define PAGE_ATTR_DYN_THREAD (1<<DynTHREAD)
#define PAGE_DIR_GROW_DOWN (1<<GrowDOWN)
#define ADD_PAGE_ONLY PAGE_ATTR_EADD
#define ADD_EXTEND_PAGE (PAGE_ATTR_EADD | PAGE_ATTR_EEXTEND)
#define PAGE_ATTR_MASK ~(PAGE_ATTR_EADD | PAGE_ATTR_EEXTEND | PAGE_ATTR_EREMOVE | PAGE_ATTR_POST_ADD | PAGE_ATTR_POST_REMOVE | PAGE_ATTR_DYN_THREAD | PAGE_DIR_GROW_DOWN)
#endif

58
sgx-jvm/linux-sgx/common/inc/internal/se_tcrypto_common.h Normal file
View File

@ -0,0 +1,58 @@
/*
* Copyright (C) 2011-2017 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef _SE_TCRYPTO_COMMON_H_
#define _SE_TCRYPTO_COMMON_H_
#ifdef USE_SGXSSL
#ifdef DEBUG
extern unsigned long openssl_last_err;
#define CLEAR_OPENSSL_ERROR_QUEUE while ((openssl_last_err = ERR_get_error())) { } \
openssl_last_err = 0
#define GET_LAST_OPENSSL_ERROR openssl_last_err = ERR_get_error()
#else
#define CLEAR_OPENSSL_ERROR_QUEUE {}
#define GET_LAST_OPENSSL_ERROR {}
#endif //DEBUG
#endif //USE_SGXSSL
#endif //_SE_TCRYPTO_COMMON_H_

7
sgx-jvm/linux-sgx/common/inc/internal/se_thread.h
View File

@ -43,6 +43,7 @@
#include <sys/syscall.h>
#include <pthread.h>
typedef pthread_mutex_t se_mutex_t;
typedef pthread_cond_t se_cond_t;
typedef pid_t se_thread_id_t;
typedef pthread_key_t se_tls_index_t;
@ -58,6 +59,12 @@ int se_mutex_lock(se_mutex_t* mutex);
int se_mutex_unlock(se_mutex_t* mutex);
int se_mutex_destroy(se_mutex_t* mutex);
void se_thread_cond_init(se_cond_t* cond);
int se_thread_cond_wait(se_cond_t *cond, se_mutex_t *mutex);
int se_thread_cond_signal(se_cond_t *cond);
int se_thread_cond_broadcast(se_cond_t *cond);
int se_thread_cond_destroy(se_cond_t* cond);
unsigned int se_get_threadid(void);
/* tls functions */

2
sgx-jvm/linux-sgx/common/inc/internal/se_version.h
View File

@ -28,5 +28,5 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#define STRFILEVER "1.9.100.39124"
#define STRFILEVER "2.0.40950"

63
sgx-jvm/linux-sgx/common/inc/internal/sgx_ecc256_internal.h Normal file
View File

@ -0,0 +1,63 @@
/*
* Copyright (C) 2011-2017 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef _SGX_ECC256_INTERNAL_H
#define _SGX_ECC256_INTERNAL_H
#include "sgx_tcrypto.h"
typedef struct _sgx_ec256_shared_point_t
{
uint8_t x[SGX_ECP256_KEY_SIZE];
uint8_t y[SGX_ECP256_KEY_SIZE];
} sgx_ec256_shared_point_t;
#ifdef __cplusplus
extern "C"
#endif
/* NOTE: The function is for internal use ONLY
*
* Computes a point with scalar multiplication based on private B key (local) and remote public Ga Key
* Parameters:
* Return: sgx_status_t - SGX_SUCCESS or failure as defined in sgx_error.h
* Inputs: sgx_ecc_state_handle_t ecc_handle - Handle to the ECC crypto system
* sgx_ec256_private_t *p_private_b - Pointer to the local private key
* sgx_ec256_public_t *p_public_ga - Pointer to the remote public key
* Output: sgx_ec256_shared_point_t *p_shared_key - Pointer to the target shared point
*/
sgx_status_t SGXAPI sgx_ecc256_compute_shared_point(sgx_ec256_private_t *p_private_b,
sgx_ec256_public_t *p_public_ga,
sgx_ec256_shared_point_t *p_shared_key,
sgx_ecc_state_handle_t ecc_handle);
#endif

3
sgx-jvm/linux-sgx/common/inc/internal/thread_data.h
View File

@ -94,7 +94,7 @@ typedef struct _thread_data_t
sys_word_t stack_guard; /* GCC expects start_guard at 0x14 on x86 and 0x28 on x64 */
sys_word_t reserved;
sys_word_t ssa_frame_size; /* set by urts, in pages (se_ptrace.c needs to know its offset). */
sys_word_t xsave_size; /* in bytes (se_ptrace.c needs to know its offset).*/
sys_word_t last_error; /* init to be 0. Used by trts. */
#ifdef TD_SUPPORT_MULTI_PLATFORM
@ -110,6 +110,7 @@ typedef struct _thread_data_t
intptr_t exception_flag;
#endif
sys_word_t cxx_thread_info[6];
sys_word_t stack_commit_addr;
} thread_data_t;
#ifdef __cplusplus

17
sgx-jvm/linux-sgx/common/inc/internal/trts_inst.h
View File

@ -33,6 +33,7 @@
#define _TRTS_INST_H_
#include "sgx.h"
#include "arch.h"
/* Attention:
* if the following alignment requirement changes, go to selib to
@ -55,14 +56,28 @@ typedef enum _egetkey_status_t
EGETKEY_INVALID_KEYNAME = BIT_ERROR(8),
} egetkey_status_t;
struct ms_tcs
{
void * ptcs;
};
#ifdef __cplusplus
extern "C" {
#endif
int sgx_accept_forward(si_flags_t sfl, size_t lo, size_t hi);
void do_ereport(const sgx_target_info_t *target_info, const sgx_report_data_t *report_data, sgx_report_t *report);
int do_egetkey(const sgx_key_request_t *key_request, sgx_key_128bit_t *key);
uint32_t do_rdrand(uint32_t *rand);
int do_eaccept(const sec_info_t *, size_t);
int do_emodpe(const sec_info_t*, size_t);
int apply_EPC_pages(void *start_address, size_t page_number);
int apply_pages_within_exception(void *start_address, size_t page_count);
int trim_EPC_pages(void *start_address, size_t page_number);
sgx_status_t SGXAPI sgx_trts_mprotect(size_t start, size_t size, uint64_t perms);
sgx_status_t do_add_thread(void *ms);
int is_dynamic_thread(void *tcs);
uint32_t get_dynamic_stack_max_page(void);
#ifdef __cplusplus
}
#endif

4
sgx-jvm/linux-sgx/common/inc/internal/util.h
View File

@ -52,8 +52,8 @@
#define SE_BULK_PAGE_FRAME_MASK (SE_BULK_PAGE_FRAME_SIZE-1)
#define SE_BULK_PAGE_SHIFT (SE_PAGE_SHIFT + SE_BULK_PAGE_FRAME_SHIFT)
#define SE_BULK_PAGE_SIZE (1 << SE_BULK_PAGE_SHIFT)
#define SE_GUARD_PAGE_SHIFT SE_PAGE_SHIFT
#define SE_GUARD_PAGE_SIZE SE_PAGE_SIZE
#define SE_GUARD_PAGE_SHIFT 16
#define SE_GUARD_PAGE_SIZE (1 << SE_GUARD_PAGE_SHIFT)
#define ROUND_TO(x, align) (((x) + ((align)-1)) & ~((align)-1))
#define ROUND_TO_PAGE(x) ROUND_TO(x, SE_PAGE_SIZE)

5
sgx-jvm/linux-sgx/common/inc/internal/xsave.h
View File

@ -46,11 +46,8 @@
extern "C" {
#endif
#include "linux/xsave_gnu.h"
void init_xsave_info();
/* implemented in urts_xsave.cpp/trts_xsave.cpp */
void save_and_clean_xfeature_regs(uint8_t *buffer);
void restore_xfeature_regs(const uint8_t *buffer);
/* trts_xsave.cpp */
uint64_t get_xfeature_state();

63
sgx-jvm/linux-sgx/common/inc/sgx_capable.h
View File

@ -1,33 +1,33 @@
/*
* Copyright 2011-2017 Intel Corporation
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
* Copyright (C) 2011-2017 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#pragma once
@ -37,10 +37,6 @@
#include "sgx_error.h"
#include "sgx_defs.h"
#if defined(_MSC_VER)
#include <Windows.h>
#endif
typedef enum _sgx_device_status_t {
SGX_ENABLED,
SGX_DISABLED_REBOOT_REQUIRED, /* A reboot is required to finish enabling SGX */
@ -87,4 +83,3 @@ sgx_status_t SGXAPI sgx_cap_get_status(sgx_device_status_t* sgx_device_status);
#endif
#endif

1
sgx-jvm/linux-sgx/common/inc/sgx_error.h
View File

@ -65,6 +65,7 @@ typedef enum _status_t
SGX_ERROR_MODE_INCOMPATIBLE = SGX_MK_ERROR(0x200e), /* The target enclave 32/64 bit mode or sim/hw mode is incompatible with the mode of current uRTS. */
SGX_ERROR_ENCLAVE_FILE_ACCESS = SGX_MK_ERROR(0x200f), /* Can't open enclave file. */
SGX_ERROR_INVALID_MISC = SGX_MK_ERROR(0x2010), /* The MiscSelct/MiscMask settings are not correct.*/
SGX_ERROR_INVALID_LAUNCH_TOKEN = SGX_MK_ERROR(0x2011), /* The launch token is not correct.*/
SGX_ERROR_MAC_MISMATCH = SGX_MK_ERROR(0x3001), /* Indicates verification error for reports, sealed datas, etc */
SGX_ERROR_INVALID_ATTRIBUTE = SGX_MK_ERROR(0x3002), /* The enclave is not authorized */

43
sgx-jvm/linux-sgx/common/inc/sgx_tcrypto.h
View File

@ -61,12 +61,6 @@ typedef struct _sgx_ec256_dh_shared_t
uint8_t s[SGX_ECP256_KEY_SIZE];
} sgx_ec256_dh_shared_t;
typedef struct _sgx_ec256_dh_shared512_t
{
uint8_t x[SGX_ECP256_KEY_SIZE];
uint8_t y[SGX_ECP256_KEY_SIZE];
} sgx_ec256_dh_shared512_t;
typedef struct _sgx_ec256_private_t
{
uint8_t r[SGX_ECP256_KEY_SIZE];
@ -90,11 +84,12 @@ typedef struct _sgx_rsa3072_public_key_t
uint8_t exp[SGX_RSA3072_PUB_EXP_SIZE];
} sgx_rsa3072_public_key_t;
typedef struct _sgx_rsa3072_private_key_t
typedef struct _sgx_rsa3072_key_t
{
uint8_t mod[SGX_RSA3072_KEY_SIZE];
uint8_t exp[SGX_RSA3072_PRI_EXP_SIZE];
} sgx_rsa3072_private_key_t;
uint8_t d[SGX_RSA3072_PRI_EXP_SIZE];
uint8_t e[SGX_RSA3072_PUB_EXP_SIZE];
} sgx_rsa3072_key_t;
typedef uint8_t sgx_rsa3072_signature_t[SGX_RSA3072_KEY_SIZE];
@ -310,8 +305,8 @@ extern "C" {
* Parameters:
* Return: sgx_status_t - SGX_SUCCESS or failure as defined in sgx_error.h
* Inputs: sgx_cmac_128bit_key_t *p_key - Pointer to the key used in encryption/decryption operation
* uint8_t *p_src - Pointer to the input stream to be MAC’d
* uint32_t src_len - Length of the input stream to be MAC’d
* uint8_t *p_src - Pointer to the input stream to be MAC'd
* uint32_t src_len - Length of the input stream to be MAC'd
* Output: sgx_cmac_gcm_128bit_tag_t *p_mac - Pointer to the resultant MAC
*/
sgx_status_t SGXAPI sgx_rijndael128_cmac_msg(const sgx_cmac_128bit_key_t *p_key,
@ -354,16 +349,17 @@ extern "C" {
*/
sgx_status_t SGXAPI sgx_cmac128_close(sgx_cmac_state_handle_t cmac_handle);
/** AES-CTR 128-bit - Only 128-bit key size is supported.
*
* These functions encrypt/decrypt the input data stream of a variable length according
* to the CTR mode as specified in [NIST SP 800-38A]. The counter can be thought of as
* an IV which increments on successive encryption or decrytion calls. For a given
* an IV which increments on successive encryption or decryption calls. For a given
* dataset or data stream the incremented counter block should be used on successive
* calls of the encryption/decryption process for that given stream. However for
* new or different datasets/streams, the same counter should not be reused, instead
* intialize the counter for the new data set.
* Note: SGXSSL based version doesn't support user given ctr_inc_bits. It use OpenSSL's implementation
* which divide the counter block into two parts ([IV][counter])
*
* sgx_aes_ctr_encrypt
* Return: If source, key, counter, or destination pointer is NULL,
@ -401,6 +397,7 @@ extern "C" {
uint8_t *p_ctr,
const uint32_t ctr_inc_bits,
uint8_t *p_dst);
sgx_status_t SGXAPI sgx_aes_ctr_decrypt(
const sgx_aes_ctr_128bit_key_t *p_key,
const uint8_t *p_src,
@ -410,6 +407,7 @@ extern "C" {
uint8_t *p_dst);
/**
* Elliptic Curve Cryptography based on GF(p), 256 bit.
*
@ -479,6 +477,7 @@ extern "C" {
sgx_ec256_public_t *p_public,
sgx_ecc_state_handle_t ecc_handle);
/** Checks whether the input point is a valid point on the given elliptic curve.
* Parameters:
* Return: sgx_status_t - SGX_SUCCESS or failure as defined sgx_error.h
@ -490,6 +489,7 @@ extern "C" {
const sgx_ecc_state_handle_t ecc_handle,
int *p_valid);
/** Computes DH shared key based on own (local) private key and remote public Ga Key.
* NOTE: Caller code allocates memory for Shared key pointer to be populated
*
@ -543,18 +543,6 @@ extern "C" {
sgx_ec256_dh_shared_t *p_shared_key,
sgx_ecc_state_handle_t ecc_handle);
/* Computes 512-bit DH shared key based on private B key (local) and remote public Ga Key
* Parameters:
* Return: sgx_status_t - SGX_SUCCESS or failure as defined in sgx_error.h
* Inputs: sgx_ecc_state_handle_t ecc_handle - Handle to the ECC crypto system
* sgx_ec256_private_t *p_private_b - Pointer to the local private key
* sgx_ec256_public_t *p_public_ga - Pointer to the remote public key
* Output: sgx_ec256_dh_shared512_t *p_shared_key - Pointer to the 512-bit shared DH key
*/
sgx_status_t SGXAPI sgx_ecc256_compute_shared_dhkey512(sgx_ec256_private_t *p_private_b,
sgx_ec256_public_t *p_public_ga,
sgx_ec256_dh_shared512_t *p_shared_key,
sgx_ecc_state_handle_t ecc_handle);
/** Computes signature for data based on private key.
*
@ -634,12 +622,13 @@ extern "C" {
* Return: sgx_status_t - SGX_SUCCESS or failure as defined in sgx_error.h
* Inputs: uint8_t *p_data - Pointer to the data to be signed
* uint32_t data_size - Size of the data to be signed
* sgx_rsa3072_private_key_t *p_private - Pointer to the private key
* sgx_rsa3072_key_t *p_key - Pointer to the RSA key.
* Note: In IPP based version p_key->e is unused, hence it can be NULL.
* Output: sgx_rsa3072_signature_t *p_signature - Pointer to the signature output
*/
sgx_status_t sgx_rsa3072_sign(const uint8_t *p_data,
uint32_t data_size,
const sgx_rsa3072_private_key_t *p_private,
const sgx_rsa3072_key_t *p_key,
sgx_rsa3072_signature_t *p_signature);
/** Verifies the signature for the given data based on the RSA 3072 public key.

2
sgx-jvm/linux-sgx/common/inc/sgx_tstdc.edl
View File

@ -31,7 +31,7 @@
enclave {
untrusted {
[cdecl] void sgx_oc_cpuidex([in, out] int cpuinfo[4], int leaf, int subleaf);
[cdecl] void sgx_oc_cpuidex([out] int cpuinfo[4], int leaf, int subleaf);
/* Go outside and wait on my untrusted event */
[cdecl] int sgx_thread_wait_untrusted_event_ocall([user_check] const void *self);

2
sgx-jvm/linux-sgx/common/inc/stdc++/new
View File

@ -59,7 +59,7 @@ void* SGXAPI operator new (size_t, void*);
void* SGXAPI operator new[] (size_t, const std::nothrow_t&);
void* SGXAPI operator new[] (size_t, void*);
void SGXAPI operator delete (void*) throw ();
void SGXAPI operator delete (void*);
void SGXAPI operator delete (void*, const std::nothrow_t&);
void SGXAPI operator delete (void*, void*);
void SGXAPI operator delete[] (void*);

83
sgx-jvm/linux-sgx/common/inc/tlibc/mbusafecrt.h Normal file
View File

@ -0,0 +1,83 @@
//
// Copyright (c) Microsoft. All rights reserved.
// Licensed under the MIT license. See LICENSE file in the project root for full license information.
//
/***
* mbusafecrt.h - public declarations for SafeCRT lib
*
*
* Purpose:
* This file contains the public declarations SafeCRT
* functions ported to MacOS. These are the safe versions of
* functions standard functions banned by SWI
*
****/
/* shields! */
#ifndef MBUSAFECRT_H
#define MBUSAFECRT_H
#include <string.h>
#include <stdarg.h>
#include <wchar.h>
typedef wchar_t WCHAR;
#ifdef __cplusplus
extern "C" {
#endif
extern errno_t strcat_s( char* ioDest, size_t inDestBufferSize, const char* inSrc );
extern errno_t wcscat_s( WCHAR* ioDest, size_t inDestBufferSize, const WCHAR* inSrc );
extern errno_t strncat_s( char* ioDest, size_t inDestBufferSize, const char* inSrc, size_t inCount );
extern errno_t wcsncat_s( WCHAR* ioDest, size_t inDestBufferSize, const WCHAR* inSrc, size_t inCount );
extern errno_t strcpy_s( char* outDest, size_t inDestBufferSize, const char* inSrc );
extern errno_t wcscpy_s( WCHAR* outDest, size_t inDestBufferSize, const WCHAR* inSrc );
extern errno_t strncpy_s( char* outDest, size_t inDestBufferSize, const char* inSrc, size_t inCount );
extern errno_t wcsncpy_s( WCHAR* outDest, size_t inDestBufferSize, const WCHAR* inSrc, size_t inCount );
extern char* strtok_s( char* inString, const char* inControl, char** ioContext );
extern WCHAR* wcstok_s( WCHAR* inString, const WCHAR* inControl, WCHAR** ioContext );
extern size_t wcsnlen( const WCHAR* inString, size_t inMaxSize );
extern errno_t _itoa_s( int inValue, char* outBuffer, size_t inDestBufferSize, int inRadix );
extern errno_t _itow_s( int inValue, WCHAR* outBuffer, size_t inDestBufferSize, int inRadix );
extern errno_t _ltoa_s( long inValue, char* outBuffer, size_t inDestBufferSize, int inRadix );
extern errno_t _ltow_s( long inValue, WCHAR* outBuffer, size_t inDestBufferSize, int inRadix );
extern errno_t _ultoa_s( unsigned long inValue, char* outBuffer, size_t inDestBufferSize, int inRadix );
extern errno_t _ultow_s( unsigned long inValue, WCHAR* outBuffer, size_t inDestBufferSize, int inRadix );
extern errno_t _i64toa_s( long long inValue, char* outBuffer, size_t inDestBufferSize, int inRadix );
extern errno_t _i64tow_s( long long inValue, WCHAR* outBuffer, size_t inDestBufferSize, int inRadix );
extern errno_t _ui64toa_s( unsigned long long inValue, char* outBuffer, size_t inDestBufferSize, int inRadix );
extern errno_t _ui64tow_s( unsigned long long inValue, WCHAR* outBuffer, size_t inDestBufferSize, int inRadix );
extern int sprintf_s( char *string, size_t sizeInBytes, const char *format, ... );
extern int swprintf_s( WCHAR *string, size_t sizeInWords, const WCHAR *format, ... );
extern int _snprintf_s( char *string, size_t sizeInBytes, size_t count, const char *format, ... );
extern int _snwprintf_s( WCHAR *string, size_t sizeInWords, size_t count, const WCHAR *format, ... );
extern int _vsprintf_s( char* string, size_t sizeInBytes, const char* format, va_list arglist );
extern int _vsnprintf_s( char* string, size_t sizeInBytes, size_t count, const char* format, va_list arglist );
extern int _vswprintf_s( WCHAR* string, size_t sizeInWords, const WCHAR* format, va_list arglist );
extern int _vsnwprintf_s( WCHAR* string, size_t sizeInWords, size_t count, const WCHAR* format, va_list arglist );
extern errno_t memcpy_s( void * dst, size_t sizeInBytes, const void * src, size_t count );
extern errno_t memmove_s( void * dst, size_t sizeInBytes, const void * src, size_t count );
#ifdef __cplusplus
}
#endif
#endif /* MBUSAFECRT_H */

14
sgx-jvm/linux-sgx/common/inc/tlibc/stdlib.h
View File

@ -93,25 +93,21 @@ typedef struct {
__BEGIN_DECLS
_TLIBC_NORETURN_ void _TLIBC_CDECL_ abort(void);
int _TLIBC_CDECL_ atexit(void (*)(void));
int _TLIBC_CDECL_ abs(int);
double _TLIBC_CDECL_ atof(const char *);
int _TLIBC_CDECL_ atoi(const char *);
long _TLIBC_CDECL_ atol(const char *);
void * _TLIBC_CDECL_ bsearch(const void *, const void *, size_t, size_t, int (*)(const void *, const void *));
div_t _TLIBC_CDECL_ div(int, int);
void * _TLIBC_CDECL_ calloc(size_t, size_t);
div_t _TLIBC_CDECL_ div(int, int);
void _TLIBC_CDECL_ free(void *);
void * _TLIBC_CDECL_ malloc(size_t);
void * _TLIBC_CDECL_ memalign(size_t, size_t);
void * _TLIBC_CDECL_ realloc(void *, size_t);
void * _TLIBC_CDECL_ __tlibc_calloc(size_t, size_t);
void _TLIBC_CDECL_ __tlibc_free(void *);
void * _TLIBC_CDECL_ __tlibc_malloc(size_t);
void * _TLIBC_CDECL_ __tlibc_memalign(size_t, size_t);
void * _TLIBC_CDECL_ __tlibc_realloc(void *, size_t);
long _TLIBC_CDECL_ labs(long);
ldiv_t _TLIBC_CDECL_ ldiv(long, long);
void * _TLIBC_CDECL_ malloc(size_t);
void * _TLIBC_CDECL_ memalign(size_t, size_t);
void _TLIBC_CDECL_ qsort(void *, size_t, size_t, int (*)(const void *, const void *));
void * _TLIBC_CDECL_ realloc(void *, size_t);
double _TLIBC_CDECL_ strtod(const char *, char **);
long _TLIBC_CDECL_ strtol(const char *, char **, int);
float _TLIBC_CDECL_ strtof(const char *, char **);

71
sgx-jvm/linux-sgx/common/src/crypto_cmac_128.cpp Normal file
View File

@ -0,0 +1,71 @@
/*
* Copyright (C) 2011-2017 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "crypto_wrapper.h"
#include <openssl/cmac.h>
#include <openssl/evp.h>
#include <stdint.h>
#include <assert.h>
#include <se_memcpy.h>
sgx_status_t sgx_cmac128_msg(const sgx_key_128bit_t key, const uint8_t *p_src, unsigned int src_len, sgx_mac_t *p_mac)
{
if(!key || !p_src || src_len == 0 || !p_mac)
{
return SGX_ERROR_INVALID_PARAMETER;
}
CMAC_CTX *cmac_ctx = NULL;
size_t mac_len;
if(!(cmac_ctx = CMAC_CTX_new()))
{
return SGX_ERROR_OUT_OF_MEMORY;
}
if(!CMAC_Init(cmac_ctx, key, sizeof(sgx_key_128bit_t), EVP_aes_128_cbc(), NULL))
{
CMAC_CTX_free(cmac_ctx);
return SGX_ERROR_UNEXPECTED;
}
if(!CMAC_Update(cmac_ctx, p_src, src_len))
{
CMAC_CTX_free(cmac_ctx);
return SGX_ERROR_UNEXPECTED;
}
if(!CMAC_Final(cmac_ctx, (uint8_t *)p_mac, &mac_len))
{
CMAC_CTX_free(cmac_ctx);
return SGX_ERROR_UNEXPECTED;
}
CMAC_CTX_free(cmac_ctx);
assert(mac_len == sizeof(sgx_mac_t));
return SGX_SUCCESS;
}

79
sgx-jvm/linux-sgx/common/src/crypto_evp_digest.cpp Normal file
View File

@ -0,0 +1,79 @@
/*
* Copyright (C) 2011-2017 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include <openssl/evp.h>
#include <stdint.h>
#include <se_memcpy.h>
#include "crypto_wrapper.h"
sgx_status_t sgx_EVP_Digest(const EVP_MD *type, const uint8_t *p_src, unsigned int src_len, uint8_t *digest, unsigned int *digest_len)
{
if(!type || !p_src || src_len == 0 || !digest || digest_len == 0)
return SGX_ERROR_INVALID_PARAMETER;
uint8_t tmp_digest[EVP_MAX_MD_SIZE];
memset(tmp_digest, 0, EVP_MAX_MD_SIZE);
unsigned int tmp_digest_len;
unsigned int digest_buf_len = *digest_len;
EVP_MD_CTX *ctx;
if(NULL == (ctx = EVP_MD_CTX_create()))
return SGX_ERROR_OUT_OF_MEMORY;
if(!EVP_DigestInit_ex(ctx, type, NULL))
{
EVP_MD_CTX_destroy(ctx);
return SGX_ERROR_UNEXPECTED;
}
if(!EVP_DigestUpdate(ctx, p_src, src_len))
{
EVP_MD_CTX_destroy(ctx);
return SGX_ERROR_UNEXPECTED;
}
if(!EVP_DigestFinal_ex(ctx, tmp_digest, &tmp_digest_len))
{
EVP_MD_CTX_destroy(ctx);
return SGX_ERROR_UNEXPECTED;
}
EVP_MD_CTX_destroy(ctx);
if(tmp_digest_len > digest_buf_len)
{
return SGX_ERROR_UNEXPECTED;
}
if(memcpy_s(digest, digest_buf_len, tmp_digest, tmp_digest_len))
return SGX_ERROR_UNEXPECTED;
*digest_len = tmp_digest_len;
return SGX_SUCCESS;
}

111
sgx-jvm/linux-sgx/common/src/linux/xsave_gnu.S Normal file
View File

@ -0,0 +1,111 @@
/*
* Copyright (C) 2011-2017 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
.file "xsave_gnu.S"
#include "linux/linux-regs.h"
.macro DO_XSAVEC
#if defined(LINUX64)
.byte 0x48, 0x0f, 0xc7, 0x21
#else
.byte 0x0f, 0xc7, 0x21
#endif
.endm
.macro DO_XRSTOR
#if defined(LINUX64)
.byte 0x48, 0x0f, 0xae, 0x29
#else
.byte 0x0f, 0xae, 0x29
#endif
.endm
.macro DO_FXSAVE
#if defined(LINUX64)
.byte 0x48, 0x0f, 0xae, 0x01
#else
.byte 0x0f, 0xae, 0x01
#endif
.endm
.macro DO_FXRSTOR
#if defined(LINUX64)
.byte 0x48, 0x0f, 0xae, 0x09
#else
.byte 0x0f, 0xae, 0x09
#endif
.endm
.text
DECLARE_LOCAL_FUNC restore_xregs
#if defined(LINUX32)
mov SE_WORDSIZE(%esp), %ecx
lea g_xsave_enabled, %eax
#else
mov %rdi, %rcx
mov g_xsave_enabled@GOTPCREL(%rip), %rax
#endif
movl (%xax), %eax
cmpl $0, %eax
jz 1f
xor %xax, %xax
xor %xdx, %xdx
mov $0xFFFFFFFF, %eax
mov $0xFFFFFFFF, %edx
DO_XRSTOR
jmp 2f
1:
DO_FXRSTOR
2:
ret
DECLARE_LOCAL_FUNC save_xregs
#if defined(LINUX32)
mov SE_WORDSIZE(%esp), %ecx
lea g_xsave_enabled, %eax
#else
mov %rdi, %rcx
mov g_xsave_enabled@GOTPCREL(%rip), %rax
#endif
fwait
movl (%xax), %eax
cmpl $0, %eax
jz 1f
xor %xax, %xax
xor %xdx, %xdx
mov $0xFFFFFFFF, %eax
mov $0xFFFFFFFF, %edx
DO_XSAVEC
jmp 2f
1:
DO_FXSAVE
2:
ret

11
sgx-jvm/linux-sgx/common/src/se_thread.c
View File

@ -49,6 +49,17 @@ int se_mutex_lock(se_mutex_t* mutex) { return (0 == pthread_mutex_lock(mutex));
int se_mutex_unlock(se_mutex_t* mutex) { return (0 == pthread_mutex_unlock(mutex)); }
int se_mutex_destroy(se_mutex_t* mutex) { return (0 == pthread_mutex_destroy(mutex));}
void se_thread_cond_init(se_cond_t* cond)
{
se_cond_t tmp = PTHREAD_COND_INITIALIZER;
memcpy(cond, &tmp, sizeof(tmp));
}
int se_thread_cond_wait(se_cond_t *cond, se_mutex_t *mutex){return (0 == pthread_cond_wait(cond, mutex));}
int se_thread_cond_signal(se_cond_t *cond){return (0 == pthread_cond_signal(cond));}
int se_thread_cond_broadcast(se_cond_t *cond){return (0 == pthread_cond_broadcast(cond));}
int se_thread_cond_destroy(se_cond_t* cond){return (0 == pthread_cond_destroy(cond));}
unsigned int se_get_threadid(void) { return (unsigned)syscall(__NR_gettid);}
/* tls functions */
int se_tls_alloc(se_tls_index_t *tls_index) { return !pthread_key_create(tls_index, NULL); }

8
sgx-jvm/linux-sgx/download_prebuilt.sh
View File

@ -33,13 +33,13 @@
top_dir=`dirname $0`
out_dir=$top_dir
optlib_name=optimized_libs-1.9.100.39124.tar
ae_file_name=prebuilt-ae-1.9.100.39124.tar
server_url_path=https://download.01.org/intel-sgx/linux-1.9/
optlib_name=optimized_libs-2.0.tar
ae_file_name=prebuilt-ae-2.0.tar
server_url_path=https://download.01.org/intel-sgx/linux-2.0/
server_optlib_url=$server_url_path/$optlib_name
server_ae_url=$server_url_path/$ae_file_name
optlib_sha256=239cae39f87934d56c4eb919a4702c6ac82c19957b9a8d56c02b10eb4e27f573
ae_sha256=c2f86a1e8483b91c5517c99d196599492f3106d4b2f9f7523fd9eaf59b9ed37b
ae_sha256=3dfac14590a74aa860ea88ca9d1e2e112efb300c622e9ea02b3fa4bd69c50b07
rm -rf $out_dir/$optlib_name
wget $server_optlib_url -P $out_dir
if [ $? -ne 0 ]; then

195
sgx-jvm/linux-sgx/external/crypto_px/include/ippbase.h vendored
View File

@ -1,195 +0,0 @@
/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef __IPPBASE_H__
#define __IPPBASE_H__
#ifdef __cplusplus
extern "C" {
#endif
#if defined( _WIN32 ) || defined ( _WIN64 )
#define __STDCALL __stdcall
#define __CDECL __cdecl
#define __INT64 __int64
#define __UINT64 unsigned __int64
#else
#define __STDCALL
#define __CDECL
#define __INT64 long long
#define __UINT64 unsigned long long
#endif
#define IPP_PI ( 3.14159265358979323846 ) /* ANSI C does not support M_PI */
#define IPP_2PI ( 6.28318530717958647692 ) /* 2*pi */
#define IPP_PI2 ( 1.57079632679489661923 ) /* pi/2 */
#define IPP_PI4 ( 0.78539816339744830961 ) /* pi/4 */
#define IPP_PI180 ( 0.01745329251994329577 ) /* pi/180 */
#define IPP_RPI ( 0.31830988618379067154 ) /* 1/pi */
#define IPP_SQRT2 ( 1.41421356237309504880 ) /* sqrt(2) */
#define IPP_SQRT3 ( 1.73205080756887729353 ) /* sqrt(3) */
#define IPP_LN2 ( 0.69314718055994530942 ) /* ln(2) */
#define IPP_LN3 ( 1.09861228866810969139 ) /* ln(3) */
#define IPP_E ( 2.71828182845904523536 ) /* e */
#define IPP_RE ( 0.36787944117144232159 ) /* 1/e */
#define IPP_EPS23 ( 1.19209289e-07f )
#define IPP_EPS52 ( 2.2204460492503131e-016 )
#define IPP_MAX_8U ( 0xFF )
#define IPP_MAX_16U ( 0xFFFF )
#define IPP_MAX_32U ( 0xFFFFFFFF )
#define IPP_MIN_8U ( 0 )
#define IPP_MIN_16U ( 0 )
#define IPP_MIN_32U ( 0 )
#define IPP_MIN_8S (-128 )
#define IPP_MAX_8S ( 127 )
#define IPP_MIN_16S (-32768 )
#define IPP_MAX_16S ( 32767 )
#define IPP_MIN_32S (-2147483647 - 1 )
#define IPP_MAX_32S ( 2147483647 )
#define IPP_MIN_64U ( 0 )
#if defined( _WIN32 ) || defined ( _WIN64 )
#define IPP_MAX_64S ( 9223372036854775807i64 )
#define IPP_MIN_64S (-9223372036854775807i64 - 1 )
#define IPP_MAX_64U ( 0xffffffffffffffffL ) /* 18446744073709551615 */
#else
#define IPP_MAX_64S ( 9223372036854775807LL )
#define IPP_MIN_64S (-9223372036854775807LL - 1 )
#define IPP_MAX_64U ( 0xffffffffffffffffLL ) /* 18446744073709551615 */
#endif
#define IPP_MINABS_32F ( 1.175494351e-38f )
#define IPP_MAXABS_32F ( 3.402823466e+38f )
#define IPP_EPS_32F ( 1.192092890e-07f )
#define IPP_MINABS_64F ( 2.2250738585072014e-308 )
#define IPP_MAXABS_64F ( 1.7976931348623158e+308 )
#define IPP_EPS_64F ( 2.2204460492503131e-016 )
#define IPP_MAX( a, b ) ( ((a) > (b)) ? (a) : (b) )
#define IPP_MIN( a, b ) ( ((a) < (b)) ? (a) : (b) )
#define IPP_ABS( a ) ( ((a) < 0) ? (-(a)) : (a) )
typedef struct {
int major; /* e.g. 1 */
int minor; /* e.g. 2 */
int majorBuild; /* e.g. 3 */
int build; /* e.g. 10, always >= majorBuild */
char targetCpu[4]; /* corresponding to Intel(R) processor */
const char* Name; /* e.g. "ippsw7" */
const char* Version; /* e.g. "v1.2 Beta" */
const char* BuildDate; /* e.g. "Jul 20 99" */
} IppLibraryVersion;
typedef unsigned char Ipp8u;
typedef unsigned short Ipp16u;
typedef unsigned int Ipp32u;
typedef signed char Ipp8s;
typedef signed short Ipp16s;
typedef signed int Ipp32s;
typedef float Ipp32f;
typedef __INT64 Ipp64s;
typedef __UINT64 Ipp64u;
typedef double Ipp64f;
typedef Ipp16s Ipp16f;
typedef struct {
Ipp8s re;
Ipp8s im;
} Ipp8sc;
typedef struct {
Ipp16s re;
Ipp16s im;
} Ipp16sc;
typedef struct {
Ipp16u re;
Ipp16u im;
} Ipp16uc;
typedef struct {
Ipp32s re;
Ipp32s im;
} Ipp32sc;
typedef struct {
Ipp32f re;
Ipp32f im;
} Ipp32fc;
typedef struct {
Ipp64s re;
Ipp64s im;
} Ipp64sc;
typedef struct {
Ipp64f re;
Ipp64f im;
} Ipp64fc;
typedef enum {
ippUndef = -1,
ipp1u = 0,
ipp8u = 1,
ipp8uc = 2,
ipp8s = 3,
ipp8sc = 4,
ipp16u = 5,
ipp16uc = 6,
ipp16s = 7,
ipp16sc = 8,
ipp32u = 9,
ipp32uc = 10,
ipp32s = 11,
ipp32sc = 12,
ipp32f = 13,
ipp32fc = 14,
ipp64u = 15,
ipp64uc = 16,
ipp64s = 17,
ipp64sc = 18,
ipp64f = 19,
ipp64fc = 20
} IppDataType;
typedef enum {
ippFalse = 0,
ippTrue = 1
} IppBool;
#ifdef __cplusplus
}
#endif
#endif /* __IPPBASE_H__ */

395
sgx-jvm/linux-sgx/external/crypto_px/include/ippcore.h vendored
View File

@ -1,395 +0,0 @@
/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#if !defined( __IPPCORE_H__ ) || defined( _OWN_BLDPCS )
#define __IPPCORE_H__
#if defined (_WIN32_WCE) && defined (_M_IX86) && defined (__stdcall)
#define _IPP_STDCALL_CDECL
#undef __stdcall
#endif
#ifndef __IPPDEFS_H__
#include "ippdefs.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
#if !defined( _IPP_NO_DEFAULT_LIB )
#if defined( _IPP_SEQUENTIAL_DYNAMIC )
#pragma comment( lib, __FILE__ "/../../lib/" _INTEL_PLATFORM "ippcore" )
#elif defined( _IPP_SEQUENTIAL_STATIC )
#pragma comment( lib, __FILE__ "/../../lib/" _INTEL_PLATFORM "ippcoremt" )
#elif defined( _IPP_PARALLEL_DYNAMIC )
#pragma comment( lib, __FILE__ "/../../lib/" _INTEL_PLATFORM "threaded/ippcore" )
#elif defined( _IPP_PARALLEL_STATIC )
#pragma comment( lib, __FILE__ "/../../lib/" _INTEL_PLATFORM "threaded/ippcoremt" )
#endif
#endif
/* /////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
// Functions declarations
////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////// */
/* /////////////////////////////////////////////////////////////////////////////
// Name: ippGetLibVersion
// Purpose: getting of the library version
// Returns: the structure of information about version
// of ippcore library
// Parameters:
//
// Notes: not necessary to release the returned structure
*/
IPPAPI( const IppLibraryVersion*, ippGetLibVersion, (void) )
/* /////////////////////////////////////////////////////////////////////////////
// Name: ippGetStatusString
// Purpose: convert the library status code to a readable string
// Parameters:
// StsCode IPP status code
// Returns: pointer to string describing the library status code
//
// Notes: don't free the pointer
*/
IPPAPI( const char*, ippGetStatusString, ( IppStatus StsCode ) )
/* /////////////////////////////////////////////////////////////////////////////
// Name: ippGetCpuClocks
// Purpose: reading of time stamp counter (TSC) register value
// Returns: TSC value
//
// Note: An hardware exception is possible if TSC reading is not supported by
/ the current chipset
*/
IPPAPI( Ipp64u, ippGetCpuClocks, (void) )
/* ///////////////////////////////////////////////////////////////////////////
// Names: ippSetFlushToZero,
// ippSetDenormAreZero.
//
// Purpose: ippSetFlushToZero enables or disables the flush-to-zero mode,
// ippSetDenormAreZero enables or disables the denormals-are-zeros
// mode.
//
// Arguments:
// value - !0 or 0 - set or clear the corresponding bit of MXCSR
// pUMask - pointer to user store current underflow exception mask
// ( may be NULL if don't want to store )
//
// Return:
// ippStsNoErr - Ok
// ippStsCpuNotSupportedErr - the mode is not supported
*/
IPPAPI( IppStatus, ippSetFlushToZero, ( int value, unsigned int* pUMask ))
IPPAPI( IppStatus, ippSetDenormAreZeros, ( int value ))
/* /////////////////////////////////////////////////////////////////////////////
// Name: ippAlignPtr
// Purpose: pointer aligning
// Returns: aligned pointer
//
// Parameter:
// ptr - pointer
// alignBytes - number of bytes to align
//
*/
IPPAPI( void*, ippAlignPtr, ( void * ptr, int alignBytes ) )
/* /////////////////////////////////////////////////////////////////////////////
// Functions to allocate and free memory
///////////////////////////////////////////////////////////////////////////// */
/* /////////////////////////////////////////////////////////////////////////////
// Name: ippMalloc
// Purpose: 64-byte aligned memory allocation
// Parameter:
// len number of bytes
// Returns: pointer to allocated memory
//
// Notes: the memory allocated by ippMalloc has to be free by ippFree
// function only.
*/
IPPAPI( void*, ippMalloc, (int length) )
/* /////////////////////////////////////////////////////////////////////////////
// Name: ippFree
// Purpose: free memory allocated by the ippMalloc function
// Parameter:
// ptr pointer to the memory allocated by the ippMalloc function
//
// Notes: use the function to free memory allocated by ippMalloc
*/
IPPAPI( void, ippFree, (void* ptr) )
/* /////////////////////////////////////////////////////////////////////////////
// Name: ippInit
// Purpose: Automatic switching to best for current cpu library code using.
// Returns:
// ippStsNoErr
//
// Parameter: nothing
//
// Notes: At the moment of this function execution no any other IPP function
// has to be working
*/
IPPAPI( IppStatus, ippInit, ( void ))
/* ////////////////////////////////////////////////////////////////////////////
// Name: ippGetCpuFreqMhz
//
// Purpose: the function estimates cpu frequency and returns
// its value in MHz as a integer
//
// Return:
// ippStsNoErr Ok
// ippStsNullPtrErr null pointer to the freq value
// ippStsSizeErr wrong num of tries, internal var
// Arguments:
// pMhz pointer to the integer to write
// cpu freq value estimated
//
// Notes: no exact value is guaranteed, the value could
// vary with cpu workloading
*/
IPPAPI(IppStatus, ippGetCpuFreqMhz, ( int* pMhz ) )
/* ////////////////////////////////////////////////////////////////////////////
// Name: ippSetNumThreads
//
// Purpose:
//
// Return:
// ippStsNoErr Ok
// ippStsNoOperation For static library internal threading is not supported
// ippStsSizeErr Desired number of threads less or equal zero
//
// Arguments:
// numThr Desired number of threads
*/
IPPAPI( IppStatus, ippSetNumThreads, ( int numThr ) )
/* ////////////////////////////////////////////////////////////////////////////
// Name: ippGetNumThreads
//
// Purpose:
//
// Return:
// ippStsNoErr Ok
// ippStsNullPtrErr Pointer to numThr is Null
// ippStsNoOperation For static library internal threading is not supported
// and return value is always == 1
//
// Arguments:
// pNumThr Pointer to memory location where to store current numThr
*/
IPPAPI( IppStatus, ippGetNumThreads, (int* pNumThr) )
/* ////////////////////////////////////////////////////////////////////////////
// Name: ippGetMaxCacheSizeB
//
// Purpose: Detects maximal from the sizes of L2 or L3 in bytes
//
// Return:
// ippStsNullPtrErr The result's pointer is NULL.
// ippStsNotSupportedCpu The cpu is not supported.
// ippStsUnknownCacheSize The cpu is supported, but the size of the cache is unknown.
// ippStsNoErr Ok
//
// Arguments:
// pSizeByte Pointer to the result
//
// Note:
// 1). Intel(R) processors are supported only.
// 2). Intel(R) Itanium(R) processors and platforms with Intel XScale(R) technology are unsupported
// 3). For unsupported processors the result is "0",
// and the return status is "ippStsNotSupportedCpu".
// 4). For supported processors the result is "0",
// and the return status is "ippStsUnknownCacheSize".
// if sizes of the cache is unknown.
//
*/
IPPAPI( IppStatus, ippGetMaxCacheSizeB, ( int* pSizeByte ) )
/*
// Name: ippGetCpuFeatures
// Purpose: Detects CPU features.
// Parameters:
// pFeaturesMask Pointer to the features mask.
// Nonzero value of bit means the corresponding feature is supported.
// Features mask values are defined in the ippdefs.h
// [ 0] - MMX ( ippCPUID_MMX )
// [ 1] - SSE ( ippCPUID_SSE )
// [ 2] - SSE2 ( ippCPUID_SSE2 )
// [ 3] - SSE3 ( ippCPUID_SSE3 )
// [ 4] - SSSE3 ( ippCPUID_SSSE3 )
// [ 5] - MOVBE ( ippCPUID_MOVBE )
// [ 6] - SSE41 ( ippCPUID_SSE41 )
// [ 7] - SSE42 ( ippCPUID_SSE42 )
// [ 8] - AVX ( ippCPUID_AVX )
// [ 9] - ENABLEDBYOS( ippAVX_ENABLEDBYOS )
// [10] - AES ( ippCPUID_AES )
// [11] - PCLMULQDQ ( ippCPUID_CLMUL )
// [12] - ABR ( ippCPUID_ABR )
// [13] - RDRAND ( ippCPUID_RDRAND )
// [14] - F16C ( ippCPUID_F16C )
// [15] - AVX2 ( ippCPUID_AVX2 )
// [16] - ADOX/ADCX ( ippCPUID_ADCOX ) ADCX and ADOX instructions
// [17] - RDSEED ( ippCPUID_RDSEED ) The RDSEED instruction
// [18] - PREFETCHW ( ippCPUID_PREFETCHW ) The PREFETCHW instruction
// [19] - SHA ( ippCPUID_SHA ) Intel (R) SHA Extensions
// [20:63] - Reserved
//
// pCpuidInfoRegs Pointer to the 4-element vector.
// Result of CPUID.1 are stored in this vector.
// [0] - register EAX
// [1] - register EBX
// [2] - register ECX
// [3] - register EDX
// If pointer pCpuidInfoRegs is set to NULL, registers are not stored.
//
// Returns:
// ippStsNullPtrErr The pointer to the features mask (pFeaturesMask) is NULL.
// ippStsNotSupportedCpu CPU is not supported.
// ippStsNoErr Ok
//
// Note: Only IA-32 and Intel(R) 64 are supported
*/
IPPAPI( IppStatus, ippGetCpuFeatures, ( Ipp64u* pFeaturesMask,
Ipp32u pCpuidInfoRegs[4] ) )
/*
// Name: ippGetEnabledCpuFeatures
// Purpose: Detects enabled features for loaded libraries
// Returns: Features mask
// Features mask values are defined in the ippdefs.h
// [ 0] - ippCPUID_MMX
// [ 1] - ippCPUID_SSE
// [ 2] - ippCPUID_SSE2
// [ 3] - ippCPUID_SSE3
// [ 4] - ippCPUID_SSSE3
// [ 5] - ippCPUID_MOVBE
// [ 6] - ippCPUID_SSE41
// [ 7] - ippCPUID_SSE42
// [ 8] - ippCPUID_AVX
// [ 9] - ippAVX_ENABLEDBYOS
// [10] - ippCPUID_AES
// [11] - ippCPUID_CLMUL
// [12] - ippCPUID_ABR
// [13] - ippCPUID_RDRAND
// [14] - ippCPUID_F16C
// [15] - ippCPUID_AVX2
// [16] - ippCPUID_ADCOX
// [17] - ippCPUID_RDSEED
// [18] - ippCPUID_PREFETCHW
// [19] - ippCPUID_SHA
// [20:63] - Reserved
//
*/
IPPAPI( Ipp64u, ippGetEnabledCpuFeatures, ( void ) )
/* ////////////////////////////////////////////////////////////////////////////
// Name: ippSetCpuFeatures
//
// Purpose: Changes the set of enabled/disabled CPU features.
// This function sets the processor-specific code of the Intel IPP
// library according to the processor features specified in cpuFeatures.
//
// Return:
// ippStsNoErr No errors.
// Warnings:
// ippStsFeatureNotSupported Current CPU doesn't support at least 1 of the
// desired features;
// ippStsUnknownFeature At least one of the desired features is unknown;
// ippStsFeaturesCombination Wrong combination of features;
// ippStsCpuMismatch Indicates that the specified processor features
// are not valid. Previously set code is used.
//
// Arguments:
// cpuFeatures Desired features to support by the library
// (see ippdefs.h for ippCPUID_XX definition)
//
// NOTE: this function can re-initializes dispatcher and after the
// call another library (letter) may work
// CAUTION: At the moment of this function excecution no any other IPP
// function has to be working
//
// The next pre-defined sets of features can be used:
// 32-bit code:
// #define PX_FM ( ippCPUID_MMX | ippCPUID_SSE )
// #define W7_FM ( PX_FM | ippCPUID_SSE2 )
// #define V8_FM ( W7_FM | ippCPUID_SSE3 | ippCPUID_SSSE3 )
// #define S8_FM ( V8_FM | ippCPUID_MOVBE )
// #define P8_FM ( V8_FM | ippCPUID_SSE41 | ippCPUID_SSE42 | ippCPUID_AES | ippCPUID_CLMUL | ippCPUID_SHA )
// #define G9_FM ( P8_FM | ippCPUID_AVX | ippAVX_ENABLEDBYOS | ippCPUID_RDRAND | ippCPUID_F16C )
// #define H9_FM ( G9_FM | ippCPUID_AVX2 | ippCPUID_MOVBE | ippCPUID_ADCOX | ippCPUID_RDSEED | ippCPUID_PREFETCHW )
//
// 64-bit code:
// #define PX_FM ( ippCPUID_MMX | ippCPUID_SSE | ippCPUID_SSE2 )
// #define M7_FM ( PX_FM | ippCPUID_SSE3 )
// #define N8_FM ( S8_FM )
// #define U8_FM ( V8_FM )
// #define Y8_FM ( P8_FM )
// #define E9_FM ( G9_FM )
// #define L9_FM ( H9_FM )
//
*/
IPPAPI( IppStatus, ippSetCpuFeatures,( Ipp64u cpuFeatures ))
#if defined (_IPP_STDCALL_CDECL)
#undef _IPP_STDCALL_CDECL
#define __stdcall __cdecl
#endif
#ifdef __cplusplus
}
#endif
#endif /* __IPPCORE_H__ */

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#if !defined( __IPPCP_H__ ) || defined( _OWN_BLDPCS )
#define __IPPCP_H__
#if defined (_WIN32_WCE) && defined (_M_IX86) && defined (__stdcall)
#define _IPP_STDCALL_CDECL
#undef __stdcall
#endif
#ifndef __IPPDEFS_H__
#include "ippdefs.h"
#endif
#ifndef __IPPCPDEFS_H__
#include "ippcpdefs.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
/* /////////////////////////////////////////////////////////////////////////////
// Name: ippcpGetLibVersion
// Purpose: getting of the library version
// Returns: the structure of information about version of ippCP library
// Parameters:
//
// Notes: not necessary to release the returned structure
*/
IPPAPI( const IppLibraryVersion*, ippcpGetLibVersion, (void) )
/*
// AES
*/
IPPAPI(IppStatus, ippsAESGetSize,(int *pSize))
IPPAPI(IppStatus, ippsAESInit,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx, int ctxSize))
/* AES-CTR */
IPPAPI(IppStatus, ippsAESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len,
const IppsAESSpec* pCtx,
Ipp8u* pCtrValue, int ctrNumBitSize))
IPPAPI(IppStatus, ippsAESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len,
const IppsAESSpec* pCtx,
Ipp8u* pCtrValue, int ctrNumBitSize))
/* AES-GCM */
IPPAPI(IppStatus, ippsAES_GCMGetSize,(int * pSize))
IPPAPI(IppStatus, ippsAES_GCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_GCMState* pState, int ctxSize))
IPPAPI(IppStatus, ippsAES_GCMReset,(IppsAES_GCMState* pState))
IPPAPI(IppStatus, ippsAES_GCMProcessIV,(const Ipp8u* pIV, int ivLen,
IppsAES_GCMState* pState))
IPPAPI(IppStatus, ippsAES_GCMProcessAAD,(const Ipp8u* pAAD, int ivAAD,
IppsAES_GCMState* pState))
IPPAPI(IppStatus, ippsAES_GCMStart,(const Ipp8u* pIV, int ivLen,
const Ipp8u* pAAD, int aadLen,
IppsAES_GCMState* pState))
IPPAPI(IppStatus, ippsAES_GCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState))
IPPAPI(IppStatus, ippsAES_GCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState))
IPPAPI(IppStatus, ippsAES_GCMGetTag,(Ipp8u* pDstTag, int tagLen, const IppsAES_GCMState* pState))
/* AES-CMAC */
IPPAPI(IppStatus, ippsAES_CMACGetSize,(int* pSize))
IPPAPI(IppStatus, ippsAES_CMACInit,(const Ipp8u* pKey, int keyLen, IppsAES_CMACState* pState, int ctxSize))
IPPAPI(IppStatus, ippsAES_CMACUpdate,(const Ipp8u* pSrc, int len, IppsAES_CMACState* pState))
IPPAPI(IppStatus, ippsAES_CMACFinal,(Ipp8u* pMD, int mdLen, IppsAES_CMACState* pState))
IPPAPI(IppStatus, ippsAES_CMACGetTag,(Ipp8u* pMD, int mdLen, const IppsAES_CMACState* pState))
/*
// hash
*/
IPPAPI(IppStatus, ippsHashGetSize,(int* pSize))
IPPAPI(IppStatus, ippsHashInit,(IppsHashState* pCtx, IppHashAlgId hashAlg))
IPPAPI(IppStatus, ippsHashUpdate,(const Ipp8u* pSrc, int len, IppsHashState* pCtx))
IPPAPI(IppStatus, ippsHashGetTag,(Ipp8u* pMD, int tagLen, const IppsHashState* pCtx))
IPPAPI(IppStatus, ippsHashFinal,(Ipp8u* pMD, IppsHashState* pCtx))
IPPAPI(IppStatus, ippsHashMessage,(const Ipp8u* pMsg, int len, Ipp8u* pMD, IppHashAlgId hashAlg))
IPPAPI(IppStatus, ippsMGF,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, IppHashAlgId hashAlg))
IPPAPI(IppStatus, ippsHMAC_GetSize,(int* pSize))
IPPAPI(IppStatus, ippsHMAC_Init,(const Ipp8u* pKey, int keyLen, IppsHMACState* pCtx, IppHashAlgId hashAlg))
IPPAPI(IppStatus, ippsHMAC_Update,(const Ipp8u* pSrc, int len, IppsHMACState* pCtx))
IPPAPI(IppStatus, ippsHMAC_Final,(Ipp8u* pMD, int mdLen, IppsHMACState* pCtx))
IPPAPI(IppStatus, ippsHMAC_GetTag,(Ipp8u* pMD, int mdLen, const IppsHMACState* pCtx))
IPPAPI(IppStatus, ippsHMAC_Message,(const Ipp8u* pMsg, int msgLen,
const Ipp8u* pKey, int keyLen,
Ipp8u* pMD, int mdLen,
IppHashAlgId hashAlg))
/*
// Big Number Integer Arithmetic
*/
IPPAPI(IppStatus, ippsBigNumGetSize,(int length, int* pSize))
IPPAPI(IppStatus, ippsBigNumInit,(int length, IppsBigNumState* pBN))
IPPAPI(IppStatus, ippsSet_BN,(IppsBigNumSGN sgn,
int length, const Ipp32u* pData,
IppsBigNumState* pBN))
IPPAPI(IppStatus, ippsRef_BN,(IppsBigNumSGN* pSgn, int* bitSize, Ipp32u** const ppData,
const IppsBigNumState* pBN))
IPPAPI(IppStatus, ippsAdd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR))
IPPAPI(IppStatus, ippsSub_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR))
IPPAPI(IppStatus, ippsMod_BN, (IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pR))
IPPAPI(IppStatus, ippsModInv_BN,(IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pInv))
IPPAPI(IppStatus, ippsDiv_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pQ, IppsBigNumState* pR))
IPPAPI(IppStatus, ippsCmpZero_BN,(const IppsBigNumState* pBN, Ipp32u* pResult))
IPPAPI(IppStatus, ippsCmp_BN,(const IppsBigNumState* pA, const IppsBigNumState* pB, Ipp32u* pResult))
IPPAPI(IppStatus, ippsMul_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR))
IPPAPI(IppStatus, ippsGcd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGCD))
IPPAPI(IppStatus, ippsSetOctString_BN,(const Ipp8u* pStr, int strLen, IppsBigNumState* pBN))
IPPAPI(IppStatus, ippsGetOctString_BN,(Ipp8u* pStr, int strLen, const IppsBigNumState* pBN))
/*
// Montgomery Operations
*/
IPPAPI(IppStatus, ippsMontGetSize,(IppsExpMethod method, int length, int* pSize))
IPPAPI(IppStatus, ippsMontInit,(IppsExpMethod method, int length, IppsMontState* pCtx))
IPPAPI(IppStatus, ippsMontSet,(const Ipp32u* pModulo, int size, IppsMontState* pCtx))
IPPAPI(IppStatus, ippsMontMul, (const IppsBigNumState* pA, const IppsBigNumState* pB, IppsMontState* m, IppsBigNumState* pR))
/*
// PRNG
*/
IPPAPI(IppStatus, ippsPRNGGetSize,(int* pSize))
IPPAPI(IppStatus, ippsPRNGInit, (int seedBits, IppsPRNGState* pCtx))
IPPAPI(IppStatus, ippsPRNGen, (Ipp32u* pRand, int nBits, void* pCtx))
/*
// Prime Number Generation
*/
IPPAPI(IppStatus, ippsPrimeGetSize,(int nMaxBits, int* pSize))
IPPAPI(IppStatus, ippsPrimeInit, (int nMaxBits, IppsPrimeState* pCtx))
/*
// RSA
*/
IPPAPI(IppStatus, ippsRSA_GetSizePublicKey,(int rsaModulusBitSize, int pubicExpBitSize, int* pKeySize))
IPPAPI(IppStatus, ippsRSA_InitPublicKey,(int rsaModulusBitSize, int publicExpBitSize,
IppsRSAPublicKeyState* pKey, int keyCtxSize))
IPPAPI(IppStatus, ippsRSA_SetPublicKey,(const IppsBigNumState* pModulus,
const IppsBigNumState* pPublicExp,
IppsRSAPublicKeyState* pKey))
IPPAPI(IppStatus, ippsRSA_GetPublicKey,(IppsBigNumState* pModulus,
IppsBigNumState* pPublicExp,
const IppsRSAPublicKeyState* pKey))
IPPAPI(IppStatus, ippsRSA_GetSizePrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, int* pKeySize))
IPPAPI(IppStatus, ippsRSA_InitPrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize,
IppsRSAPrivateKeyState* pKey, int keyCtxSize))
IPPAPI(IppStatus, ippsRSA_SetPrivateKeyType1,(const IppsBigNumState* pModulus,
const IppsBigNumState* pPrivateExp,
IppsRSAPrivateKeyState* pKey))
IPPAPI(IppStatus, ippsRSA_GetSizePrivateKeyType2,(int factorPbitSize, int factorQbitSize, int* pKeySize))
IPPAPI(IppStatus, ippsRSA_InitPrivateKeyType2,(int factorPbitSize, int factorQbitSize,
IppsRSAPrivateKeyState* pKey, int keyCtxSize))
IPPAPI(IppStatus, ippsRSA_SetPrivateKeyType2,(const IppsBigNumState* pFactorP,
const IppsBigNumState* pFactorQ,
const IppsBigNumState* pCrtExpP,
const IppsBigNumState* pCrtExpQ,
const IppsBigNumState* pInverseQ,
IppsRSAPrivateKeyState* pKey))
IPPAPI(IppStatus, ippsRSA_GetBufferSizePublicKey,(int* pBufferSize, const IppsRSAPublicKeyState* pKey))
IPPAPI(IppStatus, ippsRSA_GetBufferSizePrivateKey,(int* pBufferSize, const IppsRSAPrivateKeyState* pKey))
IPPAPI(IppStatus, ippsRSA_Encrypt,(const IppsBigNumState* pPtxt,
IppsBigNumState* pCtxt,
const IppsRSAPublicKeyState* pKey,
Ipp8u* pScratchBuffer))
IPPAPI(IppStatus, ippsRSA_Decrypt,(const IppsBigNumState* pCtxt,
IppsBigNumState* pPtxt,
const IppsRSAPrivateKeyState* pKey,
Ipp8u* pScratchBuffer))
IPPAPI(IppStatus, ippsRSA_ValidateKeys,(int* pResult,
const IppsRSAPublicKeyState* pPublicKey,
const IppsRSAPrivateKeyState* pPrivateKeyType2,
const IppsRSAPrivateKeyState* pPrivateKeyType1,
Ipp8u* pScratchBuffer,
int nTrials,
IppsPrimeState* pPrimeGen,
IppBitSupplier rndFunc, void* pRndParam))
/* encryption scheme: RSAES-OAEP */
IPPAPI(IppStatus, ippsRSAEncrypt_OAEP,(const Ipp8u* pSrc, int srcLen,
const Ipp8u* pLabel, int labLen,
const Ipp8u* pSeed,
Ipp8u* pDst,
const IppsRSAPublicKeyState* pKey,
IppHashAlgId hashAlg,
Ipp8u* pBuffer))
IPPAPI(IppStatus, ippsRSA_OAEPEncrypt_SHA256,(const Ipp8u* pSrc, int srcLen,
const Ipp8u* pLabel, int labLen,
const Ipp8u* pSeed,
Ipp8u* pDst,
const IppsRSAPublicKeyState* pKey,
Ipp8u* pBuffer))
/* signature scheme : RSA-SSA-PKCS1-v1_5 */
IPPAPI(IppStatus, ippsRSASign_PKCS1v15,(const Ipp8u* pMsg, int msgLen,
Ipp8u* pSign,
const IppsRSAPrivateKeyState* pPrvKey,
const IppsRSAPublicKeyState* pPubKey,
IppHashAlgId hashAlg,
Ipp8u* pBuffer))
IPPAPI(IppStatus, ippsRSAVerify_PKCS1v15,(const Ipp8u* pMsg, int msgLen,
const Ipp8u* pSign, int* pIsValid,
const IppsRSAPublicKeyState* pKey,
IppHashAlgId hashAlg,
Ipp8u* pBuffer))
/*
// EC Cryptography
*/
IPPAPI(IppStatus, ippsECCPGetSize,(int feBitSize, int* pSize))
IPPAPI(IppStatus, ippsECCPInit,(int feBitSize, IppsECCPState* pECC))
IPPAPI(IppStatus, ippsECCPSet,(const IppsBigNumState* pPrime,
const IppsBigNumState* pA, const IppsBigNumState* pB,
const IppsBigNumState* pGX,const IppsBigNumState* pGY,const IppsBigNumState* pOrder,
int cofactor,
IppsECCPState* pECC))
IPPAPI(IppStatus, ippsECCPSetStd,(IppECCType flag, IppsECCPState* pECC))
IPPAPI(IppStatus, ippsECCPPointGetSize,(int feBitSize, int* pSize))
IPPAPI(IppStatus, ippsECCPPointInit,(int feBitSize, IppsECCPPointState* pPoint))
IPPAPI(IppStatus, ippsECCPSetPoint,(const IppsBigNumState* pX, const IppsBigNumState* pY,
IppsECCPPointState* pPoint, IppsECCPState* pECC))
IPPAPI(IppStatus, ippsECCPSetPointAtInfinity,(IppsECCPPointState* pPoint, IppsECCPState* pECC))
IPPAPI(IppStatus, ippsECCPGetPoint,(IppsBigNumState* pX, IppsBigNumState* pY,
const IppsECCPPointState* pPoint, IppsECCPState* pECC))
IPPAPI(IppStatus, ippsECCPCheckPoint,(const IppsECCPPointState* pP,
IppECResult* pResult, IppsECCPState* pECC))
IPPAPI(IppStatus, ippsECCPComparePoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ,
IppECResult* pResult, IppsECCPState* pECC))
IPPAPI(IppStatus, ippsECCPNegativePoint,(const IppsECCPPointState* pP,
IppsECCPPointState* pR, IppsECCPState* pECC))
IPPAPI(IppStatus, ippsECCPAddPoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ,
IppsECCPPointState* pR, IppsECCPState* pECC))
IPPAPI(IppStatus, ippsECCPMulPointScalar,(const IppsECCPPointState* pP, const IppsBigNumState* pK,
IppsECCPPointState* pR, IppsECCPState* pECC))
IPPAPI(IppStatus, ippsECCPGenKeyPair,(IppsBigNumState* pPrivate, IppsECCPPointState* pPublic,
IppsECCPState* pECC,
IppBitSupplier rndFunc, void* pRndParam))
IPPAPI(IppStatus, ippsECCPPublicKey,(const IppsBigNumState* pPrivate,
IppsECCPPointState* pPublic,
IppsECCPState* pECC))
IPPAPI(IppStatus, ippsECCPSetKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic,
IppBool regular,
IppsECCPState* pECC))
IPPAPI(IppStatus, ippsECCPSharedSecretDH,(const IppsBigNumState* pPrivateA,
const IppsECCPPointState* pPublicB,
IppsBigNumState* pShare,
IppsECCPState* pECC))
IPPAPI(IppStatus, ippsECCPSignDSA,(const IppsBigNumState* pMsgDigest,
const IppsBigNumState* pPrivate,
IppsBigNumState* pSignX, IppsBigNumState* pSignY,
IppsECCPState* pECC))
IPPAPI(IppStatus, ippsECCPVerifyDSA,(const IppsBigNumState* pMsgDigest,
const IppsBigNumState* pSignX, const IppsBigNumState* pSignY,
IppECResult* pResult,
IppsECCPState* pECC))
#ifdef __cplusplus
}
#endif
#if defined (_IPP_STDCALL_CDECL)
#undef _IPP_STDCALL_CDECL
#define __stdcall __cdecl
#endif
#endif /* __IPPCP_H__ */

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef __IPPCPDEFS_H__
#define __IPPCPDEFS_H__
#ifdef __cplusplus
extern "C" {
#endif
/*
// AES
*/
#define IPP_AES_BLOCK_BITSIZE (128) /* cipher blocksizes (bits) */
typedef enum { /* cipher keysizes (bits) */
ippRijndaelKey128 = 128, IppsRijndaelKey128 = 128, /* 128-bit key */
ippRijndaelKey192 = 192, IppsRijndaelKey192 = 192, /* 192-bit key */
ippRijndaelKey256 = 256, IppsRijndaelKey256 = 256 /* 256-bit key */
} IppsRijndaelKeyLength;
typedef struct _cpRijndael128 IppsAESSpec;
typedef struct _cpAES_GCM IppsAES_GCMState;
typedef struct _cpAES_CMAC IppsAES_CMACState;
/*
// hash
*/
typedef enum {
ippHashAlg_Unknown,
ippHashAlg_SHA1,
ippHashAlg_SHA256,
ippHashAlg_SHA224,
ippHashAlg_SHA512,
ippHashAlg_SHA384,
ippHashAlg_MD5,
ippHashAlg_SHA512_224,
ippHashAlg_SHA512_256,
ippHashAlg_MaxNo
} IppHashAlgId;
#define IPP_ALG_HASH_UNKNOWN (ippHashAlg_Unknown) /* unknown */
#define IPP_ALG_HASH_SHA1 (ippHashAlg_SHA1) /* SHA1 */
#define IPP_ALG_HASH_SHA256 (ippHashAlg_SHA256) /* SHA256 */
#define IPP_ALG_HASH_SHA224 (ippHashAlg_SHA224) /* SHA224 or SHA256/224 */
#define IPP_ALG_HASH_SHA512 (ippHashAlg_SHA512) /* SHA512 */
#define IPP_ALG_HASH_SHA384 (ippHashAlg_SHA384) /* SHA384 or SHA512/384 */
#define IPP_ALG_HASH_MD5 (ippHashAlg_MD5) /* MD5 */
#define IPP_ALG_HASH_SHA512_224 (ippHashAlg_SHA512_224) /* SHA512/224 */
#define IPP_ALG_HASH_SHA512_256 (ippHashAlg_SHA512_256) /* SHA512/256 */
#define IPP_ALG_HASH_LIMIT (ippHashAlg_MaxNo) /* hash alg limiter*/
#define IPP_SHA1_DIGEST_BITSIZE 160 /* digest size (bits) */
#define IPP_SHA256_DIGEST_BITSIZE 256
#define IPP_SHA224_DIGEST_BITSIZE 224
#define IPP_SHA384_DIGEST_BITSIZE 384
#define IPP_SHA512_DIGEST_BITSIZE 512
#define IPP_MD5_DIGEST_BITSIZE 128
#define IPP_SHA512_224_DIGEST_BITSIZE 224
#define IPP_SHA512_256_DIGEST_BITSIZE 256
typedef struct _cpHashCtx IppsHashState;
typedef struct _cpHMAC IppsHMACState;
/*
// Big Number Integer Arithmetic
*/
#define BN_MAXBITSIZE (16*1024) /* bn max size (bits) */
/* operation results */
#define IPP_IS_EQ (0)
#define IPP_IS_GT (1)
#define IPP_IS_LT (2)
#define IPP_IS_NE (3)
#define IPP_IS_NA (4)
#define IPP_IS_PRIME (5)
#define IPP_IS_COMPOSITE (6)
#define IPP_IS_VALID (7)
#define IPP_IS_INVALID (8)
#define IPP_IS_INCOMPLETE (9)
#define IPP_IS_ATINFINITY (10)
#define IS_ZERO IPP_IS_EQ
#define GREATER_THAN_ZERO IPP_IS_GT
#define LESS_THAN_ZERO IPP_IS_LT
#define IS_PRIME IPP_IS_PRIME
#define IS_COMPOSITE IPP_IS_COMPOSITE
#define IS_VALID_KEY IPP_IS_VALID
#define IS_INVALID_KEY IPP_IS_INVALID
#define IS_INCOMPLETED_KEY IPP_IS_INCOMPLETE
typedef enum {
ippBigNumNEG = 0, IppsBigNumNEG = 0,
ippBigNumPOS = 1, IppsBigNumPOS = 1
} IppsBigNumSGN;
typedef enum {
ippBinaryMethod = 0, IppsBinaryMethod = 0,
ippSlidingWindows = 1, IppsSlidingWindows = 1
} IppsExpMethod;
typedef struct _cpBigNum IppsBigNumState;
typedef struct _cpMontgomery IppsMontState;
typedef struct _cpPRNG IppsPRNGState;
typedef struct _cpPrime IppsPrimeState;
/* External Bit Supplier */
typedef IppStatus (__STDCALL *IppBitSupplier)(Ipp32u* pRand, int nBits, void* pEbsParams);
/*
// RSA
*/
#define MIN_RSA_SIZE (8)
#define MAX_RSA_SIZE (4096)
typedef struct _cpRSA IppsRSAState;
typedef struct _cpRSA_public_key IppsRSAPublicKeyState;
typedef struct _cpRSA_private_key IppsRSAPrivateKeyState;
/*
// EC Cryptography
*/
#define EC_GFP_MAXBITSIZE (1024)
typedef struct _cpECCP IppsECCPState;
typedef struct _cpECCPPoint IppsECCPPointState;
/* operation result */
typedef enum {
ippECValid, /* validation pass successfully */
ippECCompositeBase, /* field based on composite */
ippECComplicatedBase, /* number of non-zero terms in the polynomial (> PRIME_ARR_MAX) */
ippECIsZeroDiscriminant,/* zero discriminant */
ippECCompositeOrder, /* composite order of base point */
ippECInvalidOrder, /* invalid base point order */
ippECIsWeakMOV, /* weak Meneze-Okamoto-Vanstone reduction attack */
ippECIsWeakSSSA, /* weak Semaev-Smart,Satoh-Araki reduction attack */
ippECIsSupersingular, /* supersingular curve */
ippECInvalidPrivateKey, /* !(0 < Private < order) */
ippECInvalidPublicKey, /* (order*PublicKey != Infinity) */
ippECInvalidKeyPair, /* (Private*BasePoint != PublicKey) */
ippECPointOutOfGroup, /* out of group (order*P != Infinity) */
ippECPointIsAtInfinite, /* point (P=(Px,Py)) at Infinity */
ippECPointIsNotValid, /* point (P=(Px,Py)) out-of EC */
ippECPointIsEqual, /* compared points are equal */
ippECPointIsNotEqual, /* compared points are different */
ippECInvalidSignature /* invalid signature */
} IppECResult;
typedef enum {
ippECarbitrary =0x00000, IppECCArbitrary = 0x00000, /* arbitrary ECC */
ippECPstd = 0x10000, IppECCPStd = 0x10000, /* random (recommended) EC over FG(p): */
ippECPstd112r1 = ippECPstd, IppECCPStd112r1 = IppECCPStd, /* secp112r1 curve */
ippECPstd112r2 = ippECPstd+1, IppECCPStd112r2 = IppECCPStd+1, /* secp112r2 curve */
ippECPstd128r1 = ippECPstd+2, IppECCPStd128r1 = IppECCPStd+2, /* secp128r1 curve */
ippECPstd128r2 = ippECPstd+3, IppECCPStd128r2 = IppECCPStd+3, /* secp128r2 curve */
ippECPstd160r1 = ippECPstd+4, IppECCPStd160r1 = IppECCPStd+4, /* secp160r1 curve */
ippECPstd160r2 = ippECPstd+5, IppECCPStd160r2 = IppECCPStd+5, /* secp160r2 curve */
ippECPstd192r1 = ippECPstd+6, IppECCPStd192r1 = IppECCPStd+6, /* secp192r1 curve */
ippECPstd224r1 = ippECPstd+7, IppECCPStd224r1 = IppECCPStd+7, /* secp224r1 curve */
ippECPstd256r1 = ippECPstd+8, IppECCPStd256r1 = IppECCPStd+8, /* secp256r1 curve */
ippECPstd384r1 = ippECPstd+9, IppECCPStd384r1 = IppECCPStd+9, /* secp384r1 curve */
ippECPstd521r1 = ippECPstd+10, IppECCPStd521r1 = IppECCPStd+10, /* secp521r1 curve */
} IppsECType, IppECCType;
#ifdef __cplusplus
}
#endif
#endif /* __IPPCPDEFS_H__ */

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef __IPPDEFS_H__
#define __IPPDEFS_H__
#ifdef __cplusplus
extern "C" {
#endif
#if defined (_WIN64)
#define _INTEL_PLATFORM "intel64/"
#elif defined (_WIN32)
#define _INTEL_PLATFORM "ia32/"
#endif
#if !defined( IPPAPI )
#if defined( IPP_W32DLL ) && (defined( _WIN32 ) || defined( _WIN64 ))
#if defined( _MSC_VER ) || defined( __ICL )
#define IPPAPI( type,name,arg ) \
__declspec(dllimport) type __STDCALL name arg;
#else
#define IPPAPI( type,name,arg ) type __STDCALL name arg;
#endif
#else
#define IPPAPI( type,name,arg ) type __STDCALL name arg;
#endif
#endif
#if (defined( __ICL ) || defined( __ECL ) || defined(_MSC_VER)) && !defined( _PCS ) && !defined( _PCS_GENSTUBS )
#if( __INTEL_COMPILER >= 1100 ) /* icl 11.0 supports additional comment */
#if( _MSC_VER >= 1400 )
#define IPP_DEPRECATED( comment ) __declspec( deprecated ( comment ))
#else
#pragma message ("your icl version supports additional comment for deprecated functions but it can't be displayed")
#pragma message ("because internal _MSC_VER macro variable setting requires compatibility with MSVC7.1")
#pragma message ("use -Qvc8 switch for icl command line to see these additional comments")
#define IPP_DEPRECATED( comment ) __declspec( deprecated )
#endif
#elif( _MSC_FULL_VER >= 140050727 )&&( !defined( __INTEL_COMPILER )) /* VS2005 supports additional comment */
#define IPP_DEPRECATED( comment ) __declspec( deprecated ( comment ))
#elif( _MSC_VER <= 1200 )&&( !defined( __INTEL_COMPILER )) /* VS 6 doesn't support deprecation */
#define IPP_DEPRECATED( comment )
#else
#define IPP_DEPRECATED( comment ) __declspec( deprecated )
#endif
#elif (defined(__ICC) || defined(__ECC) || defined( __GNUC__ )) && !defined( _PCS ) && !defined( _PCS_GENSTUBS )
#if defined( __GNUC__ )
#if __GNUC__ >= 4 && __GNUC_MINOR__ >= 5
#define IPP_DEPRECATED( message ) __attribute__(( deprecated( message )))
#else
#define IPP_DEPRECATED( message ) __attribute__(( deprecated ))
#endif
#else
#define IPP_DEPRECATED( comment ) __attribute__(( deprecated ))
#endif
#else
#define IPP_DEPRECATED( comment )
#endif
#if (defined( __ICL ) || defined( __ECL ) || defined(_MSC_VER))
#if !defined( _IPP_NO_DEFAULT_LIB )
#if (( defined( _IPP_PARALLEL_DYNAMIC ) && !defined( _IPP_PARALLEL_STATIC ) && !defined( _IPP_SEQUENTIAL_DYNAMIC ) && !defined( _IPP_SEQUENTIAL_STATIC )) || \
(!defined( _IPP_PARALLEL_DYNAMIC ) && defined( _IPP_PARALLEL_STATIC ) && !defined( _IPP_SEQUENTIAL_DYNAMIC ) && !defined( _IPP_SEQUENTIAL_STATIC )) || \
(!defined( _IPP_PARALLEL_DYNAMIC ) && !defined( _IPP_PARALLEL_STATIC ) && defined( _IPP_SEQUENTIAL_DYNAMIC ) && !defined( _IPP_SEQUENTIAL_STATIC )) || \
(!defined( _IPP_PARALLEL_DYNAMIC ) && !defined( _IPP_PARALLEL_STATIC ) && !defined( _IPP_SEQUENTIAL_DYNAMIC ) && defined( _IPP_SEQUENTIAL_STATIC )))
#elif (!defined( _IPP_PARALLEL_DYNAMIC ) && !defined( _IPP_PARALLEL_STATIC ) && !defined( _IPP_SEQUENTIAL_DYNAMIC ) && !defined( _IPP_SEQUENTIAL_STATIC ))
#define _IPP_NO_DEFAULT_LIB
#else
#error Illegal combination of _IPP_PARALLEL_DYNAMIC/_IPP_PARALLEL_STATIC/_IPP_SEQUENTIAL_DYNAMIC/_IPP_SEQUENTIAL_STATIC, only one definition can be defined
#endif
#endif
#else
#define _IPP_NO_DEFAULT_LIB
#if (defined( _IPP_PARALLEL_DYNAMIC ) || defined( _IPP_PARALLEL_STATIC ) || defined(_IPP_SEQUENTIAL_DYNAMIC) || defined(_IPP_SEQUENTIAL_STATIC))
#pragma message ("defines _IPP_PARALLEL_DYNAMIC/_IPP_PARALLEL_STATIC/_IPP_SEQUENTIAL_DYNAMIC/_IPP_SEQUENTIAL_STATIC do not have any effect in current configuration")
#endif
#endif
#if !defined( _IPP_NO_DEFAULT_LIB )
#if defined( _IPP_PARALLEL_STATIC )
#pragma comment( lib, "libircmt" )
#pragma comment( lib, "libmmt" )
#pragma comment( lib, "svml_dispmt" )
#pragma comment( lib, "libiomp5md" )
#endif
#endif
#include "ippbase.h"
#include "ipptypes.h"
extern const IppiRect ippRectInfinite;
#ifdef __cplusplus
}
#endif
#endif /* __IPPDEFS_H__ */

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#if !defined( __IPPVERSION_H__ )
#define __IPPVERSION_H__
#define IPP_VERSION_MAJOR 9
#define IPP_VERSION_MINOR 0
#define IPP_VERSION_UPDATE 2
#define IPP_VERSION_STR "9.0.2"
#endif /* __IPPVERSION_H__ */

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef __CPUDEF_H__
#define __CPUDEF_H__
#include "ippcore.h"
#if defined( __cplusplus )
extern "C" {
#endif
#undef __CDECL
#if defined( _WIN32 ) || defined ( _WIN64 )
#define __CDECL __cdecl
#else
#define __CDECL
#endif
/* Intel CPU informator */
typedef struct {
int family;
int stepping;
int model;
int type;
int feature;
int tlb;
int cache;
int mmx;
int freq;
int ssx;
int wni;
int htt;
int pni;
int em64t;
int mni;
int phcores;
int sse41;
int sse42;
int ext_family;
int ext_model;
int movbe_instr;
int avx;
int xsavexgetbv;
} ippIntelCpuId;
int __CDECL ownGetMaskFeatures( Ipp64u* pFeaturesMask );
int __CDECL ownGetFeature( Ipp64u MaskOfFeature );
int __CDECL ipp_is_avx_extension( void );
__INT64 __CDECL ipp_get_pentium_counter (void);
int __CDECL ipp_is_mmx_extension (void);
int __CDECL ipp_is_ssx_extension (void);
int __CDECL ipp_is_wni_extension (void);
int __CDECL ipp_is_htt_extension( void );
int __CDECL ipp_is_pni_extension( void );
int __CDECL ipp_is_mni_extension( void );
int __CDECL ipp_is_sse41_extension( void );
int __CDECL ipp_is_sse42_extension( void );
int __CDECL ipp_is_movbe( void );
int __CDECL ipp_get_cores_on_die( void );
int __CDECL ipp_is_em64t_extension( void );
int __CDECL ipp_has_cpuid ( void );
int __CDECL ipp_has_rdtsc( void );
void __CDECL ipp_get_pentium_ident ( ippIntelCpuId* cpuid );
int __CDECL ipp_is_GenuineIntel ( void );
int __CDECL ipp_max_cpuid_input( void );
int __CDECL ipp_get_cpuid( int regs[4], int valEAX, int valECX );
void __CDECL ipp_get_cache_line_size( int* szCacheLine );
int __CDECL ipp_isnan( double x );
int __CDECL ipp_finite( double x );
int __CDECL ipp_isnan_32f( float x );
int __CDECL ipp_finite_32f( float x );
#define ipp_isfinite ipp_finite
unsigned int __CDECL ipp_control87 ( unsigned int newcw, unsigned int mask );
unsigned int __CDECL ipp_status87 ( void );
unsigned int __CDECL ipp_clear87 ( void );
unsigned int __CDECL ipp_clear_ssx (void);
/* topology/affinity */
/* here are definitions of the CW bits exactly as x87 and ssx have */
#define IPP_FPU_MASK_RC 0x0c00
#define IPP_FPU_MASK_PC 0x0300
#define IPP_FPU_MASK_RCPC 0x0f00
#define IPP_FPU_RC_NEAR 0x0000
#define IPP_FPU_RC_DOWN 0x0400
#define IPP_FPU_RC_UP 0x0800
#define IPP_FPU_RC_ZERO 0x0c00
#define IPP_FPU_PC_24 0x0000
#define IPP_FPU_PC_53 0x0200
#define IPP_FPU_PC_64 0x0300
unsigned int __CDECL ipp_set_rcpc_fpu( unsigned int newrcpc, unsigned int mask);
void __CDECL ipp_set_cw_fpu( unsigned int cw );
#define IPP_SSX_RC_NEAR 0x0000
#define IPP_SSX_RC_DOWN 0x2000
#define IPP_SSX_RC_UP 0x4000
#define IPP_SSX_RC_ZERO 0x6000
#define IPP_SSX_MASK_RC 0x6000
unsigned int __CDECL ipp_set_rc_ssx( unsigned int newrc );
void __CDECL ipp_set_cw_ssx( unsigned int cw );
/* ================= FPU section ===================== */
/* Control bits - disable exceptions */
#define FPU_EXC_MSK 0x003f /* Exception Masks Mask */
#define FPU_MSK_INVALID 0x0001 /* invalid operation */
#define FPU_MSK_DENORMAL 0x0002 /* denormalized operand */
#define FPU_MSK_ZERODIV 0x0004 /* zero divide */
#define FPU_MSK_OVERFLOW 0x0008 /* overflow */
#define FPU_MSK_UNDERFLOW 0x0010 /* underflow */
#define FPU_MSK_INEXACT 0x0020 /* inexact (precision) */
/* Status bits - exceptions */
#define FPU_EXC_FLG 0x003f /* Exception Flags Mask */
#define FPU_FLG_INVALID 0x0001 /* invalid operation */
#define FPU_FLG_DENORMAL 0x0002 /* denormalized operand */
#define FPU_FLG_ZERODIV 0x0004 /* zero divide */
#define FPU_FLG_OVERFLOW 0x0008 /* overflow */
#define FPU_FLG_UNDERFLOW 0x0010 /* underflow */
#define FPU_FLG_INEXACT 0x0020 /* inexact (precision) */
/* Control bits - rounding control */
#define FPU_RND 0x0c00 /* Rounding Control Mask */
#define FPU_RND_NEAR 0x0000 /* near */
#define FPU_RND_DOWN 0x0400 /* down */
#define FPU_RND_UP 0x0800 /* up */
#define FPU_RND_CHOP 0x0c00 /* chop */
/* Control bits - precision control */
#define FPU_PRC 0x0300 /* Precision Control Mask */
#define FPU_PRC_64 0x0300 /* 64 bits */
#define FPU_PRC_53 0x0200 /* 53 bits */
#define FPU_PRC_24 0x0000 /* 24 bits */
/* Control bits - all masks */
#define FPU_ALL 0x0f3f /* all masks */
/* ============= definition for control/status world ============== */
#define FPU_SET_EXC_MASK(mask) ps_set_cw_fpu(mask,FPU_EXC_MSK)
#define FPU_GET_EXC_MASK() (ps_set_cw_fpu(0,0) & FPU_EXC_MSK)
#define FPU_GET_EXC_FLAG() (ps_get_sw_fpu() & FPU_EXC_FLG)
#define FPU_SET_RND_MODE(mode) ps_set_cw_fpu(mode,FPU_RND)
#define FPU_GET_RND_MODE() (ps_set_cw_fpu(0,0) & FPU_RND)
#define FPU_SET_PRC_MODE(mode) ps_set_cw_fpu(mode,FPU_PRC)
#define FPU_GET_PRC_MODE() (ps_set_cw_fpu(0,0) & FPU_PRC)
unsigned int __CDECL ps_set_cw_fpu( unsigned int newcw, unsigned int msk);
unsigned int __CDECL ps_get_cw_fpu(void);
unsigned int __CDECL ps_get_sw_fpu(void);
unsigned int __CDECL ps_clear_fpu(void);
/* ======================= SSX section ============================ */
/* Control bits - disable exceptions */
#define SSX_EXC_MSK 0x1f80 /* Disabling exception mask */
#define SSX_MSK_INEXACT 0x1000 /* precision (inexact) */
#define SSX_MSK_UNDERFLOW 0x0800 /* underflow */
#define SSX_MSK_OVERFLOW 0x0400 /* overflow */
#define SSX_MSK_ZERODIV 0x0200 /* divide by zero */
#define SSX_MSK_DENORMAL 0x0100 /* denormalized */
#define SSX_MSK_INVALID 0x0080 /* invalid operation */
/* Status bits - exceptions */
#define SSX_EXC_FLG 0x003f /* Exception flags mask */
#define SSX_FLG_INEXACT 0x0020 /* precision (inexact) */
#define SSX_FLG_UNDERFLOW 0x0010 /* underflow */
#define SSX_FLG_OVERFLOW 0x0008 /* overflow */
#define SSX_FLG_ZERODIV 0x0004 /* divide by zero */
#define SSX_FLG_DENORMAL 0x0002 /* denormalized */
#define SSX_FLG_INVALID 0x0001 /* invalid operation */
/* Control bits - rounding control */
#define SSX_RND 0x6000 /* Rounding control mask */
#define SSX_RND_NEAR 0x0000 /* near */
#define SSX_RND_DOWN 0x2000 /* down */
#define SSX_RND_UP 0x4000 /* up */
#define SSX_RND_CHOP 0x6000 /* chop */
/* Control bits - flush to zero mode */
#define SSX_FZ 0x8000 /* Flush to zero mask */
#define SSX_FZ_ENABLE 0x8000 /* flush to zero */
#define SSX_FZ_DISABLE 0x0000 /* not flush to zero */
/* Control bits - denormals are zero mode */
#define SSX_DAZ 0x0040 /* denorm. are zero mask */
#define SSX_DAZ_ENABLE 0x0040 /* denorm. are zero */
#define SSX_DAZ_DISABLE 0x0000 /* denorm. are not zero */
#define SSX_ALL 0xffbf /* All masks */
/* ==================== definition for SSX register =============== */
#define SSX_SET_EXC_MASK(mask) ps_set_ssx(mask,SSX_EXC_MSK)
#define SSX_GET_EXC_MASK() (ps_get_ssx() & SSX_EXC_MSK)
#define SSX_SET_EXC_FLAG(flag) ps_set_ssx(flag,SSX_EXC_FLG)
#define SSX_GET_EXC_FLAG() (ps_get_ssx() & SSX_EXC_FLG)
#define SSX_SET_RND_MODE(mode) ps_set_ssx(mode,SSX_RND)
#define SSX_GET_RND_MODE() (ps_get_ssx() & SSX_RND)
#define SSX_SET_FZ_MODE(mode) ps_set_ssx(mode,SSX_FZ)
#define SSX_GET_FZ_MODE() (ps_get_ssx() & SSX_FZ)
#define SSX_SET_DAZ_MODE(mode) ps_set_ssx(mode,SSX_DAZ)
#define SSX_GET_DAZ_MODE() (ps_get_ssx() & SSX_DAZ)
unsigned int __CDECL ps_set_ssx(unsigned int newssx, unsigned int msk);
unsigned int __CDECL ps_get_ssx(void);
unsigned int __CDECL ipp_tst_daz_ssx(void);
#if defined( __cplusplus )
}
#endif
#endif /* __CPUDEF_H__ */
/* ////////////////////////// End of file "cpudef.h" //////////////////////// */

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#if !defined(_IPP_DYNAMIC) || defined(_CORE)
#include "owndefs.h"
#ifndef _IPP_VERSION
#define _IPP_VERSION ""
#endif
#define GET_LIB_NAME01(pref) pref ## GetLibVersion
#define GET_LIB_NAME(pref) GET_LIB_NAME01(pref)
#define LIBVERNAME s_libVer
#define SLIBVERNAME LIBVERNAME
#include "ippverstr.gen"
#include "cpudef.h"
extern int ippJumpIndexForMergedDLL;
IPPFUN( const IppLibraryVersion*, GET_LIB_NAME(LIB_PREFIX), (void) )
{
return &LIBVERNAME;
}
#endif

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "ippversion.h"
#ifndef BASE_VERSION
#define BASE_VERSION() IPP_VERSION_MAJOR,IPP_VERSION_MINOR,IPP_VERSION_UPDATE
#endif
#ifndef STR_VERSION
#ifdef IPP_REVISION
#define STR_VERSION() IPP_VERSION_STR " (r" STR( IPP_REVISION ) ")"
#else
#define STR_VERSION() IPP_VERSION_STR " (-)"
#endif
#endif
/* ////////////////////////////// End of file /////////////////////////////// */

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifdef _IPP_OMP_STATIC
#define LIB_THREADS " threaded"
#define CORE_THREADS " (threaded)"
#else
#define LIB_THREADS ""
#define CORE_THREADS ""
#endif
#define GET_LIBRARY_NAME( cpu, is ) #cpu, IPP_LIB_SHORTNAME() " " is " (" #cpu LIB_THREADS ")"
static const IppLibraryVersion SLIBVERNAME = {
/* major, minor, update (ex-majorBuild) */
BASE_VERSION(),
#if defined IPP_REVISION
IPP_REVISION,
#else
-1,
#endif /* IPP_REVISION */
#if defined( _CORE )
/*GET_LIBRARY_NAME( core )*/
"core",
"ippCore" CORE_THREADS
#elif ( _IPP_ARCH == _IPP_ARCH_IA32 ) || ( _IPP_ARCH == _IPP_ARCH_LP32 )
#if ( _IPP == _IPP_M5 )
GET_LIBRARY_NAME( m5, "586" )
#elif ( _IPP == _IPP_H9 )
GET_LIBRARY_NAME( h9, "AVX2" )
#elif ( _IPP == _IPP_G9 )
GET_LIBRARY_NAME( g9, "AVX" )
#elif ( _IPP == _IPP_P8 )
GET_LIBRARY_NAME( p8, "SSE4.2" )
#elif ( _IPPLP32 == _IPPLP32_S8 )
GET_LIBRARY_NAME( s8, "Atom" )
#elif ( _IPP == _IPP_V8 )
GET_LIBRARY_NAME( v8, "SSSE3" )
#elif ( _IPP == _IPP_W7 )
GET_LIBRARY_NAME( w7, "SSE2" )
#else
GET_LIBRARY_NAME( px, "PX" )
#endif
#elif ( _IPP_ARCH == _IPP_ARCH_EM64T ) || ( _IPP_ARCH == _IPP_ARCH_LP64 )
#if ( _IPP32E == _IPP32E_K0 )
GET_LIBRARY_NAME( k0, "AVX-512F/CD/BW/DQ/VL" )
#elif ( _IPP32E == _IPP32E_N0 )
GET_LIBRARY_NAME( n0, "AVX-512F/CD/ER/PF" )
#elif ( _IPP32E == _IPP32E_E9 )
GET_LIBRARY_NAME( e9, "AVX" )
#elif ( _IPP32E == _IPP32E_L9 )
GET_LIBRARY_NAME( l9, "AVX2" )
#elif ( _IPP32E == _IPP32E_Y8 )
GET_LIBRARY_NAME( y8, "SSE4.2" )
#elif ( _IPPLP64 == _IPPLP64_N8 )
GET_LIBRARY_NAME( n8, "Atom" )
#elif ( _IPP32E == _IPP32E_U8 )
GET_LIBRARY_NAME( u8, "SSSE3" )
#elif ( _IPP32E == _IPP32E_M7 )
GET_LIBRARY_NAME( m7, "SSE3" )
#else
GET_LIBRARY_NAME( mx, "PX" )
#endif
#elif ( _IPP_ARCH == _IPP_ARCH_LRB2 )
#if ( _IPPLRB == _IPPLRB_BX )
GET_LIBRARY_NAME( bx, "PX" )
#elif ( _IPPLRB == _IPPLRB_B2 )
GET_LIBRARY_NAME( b2, "KNC" )
#endif
#else
#error ARCH not supported
#endif
#if defined( TICKTOCK )
"+"
#endif
/* release Version (by Manager) */
,STR_VERSION()
/* BuildDate (by QA person) */
,__DATE__
};

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sgx-jvm/linux-sgx/external/crypto_px/sources/include/owndefs.h vendored
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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef __OWNDEFS_H__
#define __OWNDEFS_H__
#if defined( _VXWORKS )
#include <vxWorks.h>
#undef NONE
#endif
#include "ippdefs.h"
#if defined(__INTEL_COMPILER) || defined(_MSC_VER)
#define __INLINE static __inline
#elif defined( __GNUC__ )
#define __INLINE static __inline__
#else
#define __INLINE static
#endif
#if defined(__INTEL_COMPILER)
#define __RESTRICT restrict
#elif !defined( __RESTRICT )
#define __RESTRICT
#endif
#if defined( IPP_W32DLL )
#if defined( _MSC_VER ) || defined( __INTEL_COMPILER )
#define IPPFUN(type,name,arg) __declspec(dllexport) type __STDCALL name arg
#else
#define IPPFUN(type,name,arg) extern type __STDCALL name arg
#endif
#else
#define IPPFUN(type,name,arg) extern type __STDCALL name arg
#endif
/* structure represeting 128 bit unsigned integer type */
typedef struct{
Ipp64u low;
Ipp64u high;
}Ipp128u;
#define _IPP_PX 0 /* pure C-code ia32 */
#define _IPP_M5 1 /* Quark (Pentium) - x86+x87 ia32 */
#define _IPP_M6 2 /* Pentium MMX - MMX ia32 */
#define _IPP_A6 4 /* Pentium III - SSE ia32 */
#define _IPP_W7 8 /* Pentium 4 - SSE2 ia32 */
#define _IPP_T7 16 /* Pentium with x64 support (Nocona) - SSE3 ia32 */
#define _IPP_V8 32 /* Merom - SSSE3 ia32 */
#define _IPP_P8 64 /* Penryn - SSE4.1 + tick for SSE4.2 ia32 */
#define _IPP_G9 128 /* SandyBridge (GSSE) - AVX ia32 */
#define _IPP_H9 256 /* Haswell (AVX2) ia32 */
#define _IPP_I0 512 /* KNL (AVX-512) ia32 */
#define _IPP_S0 1024 /* SkyLake Xeon (AVX-512) ia32 */
#define _IPPXSC_PX 0
#define _IPPXSC_S1 1
#define _IPPXSC_S2 2
#define _IPPXSC_C2 4
#define _IPPLRB_PX 0
#define _IPPLRB_B1 1
#define _IPPLRB_B2 2
#define _IPP64_PX _IPP_PX
#define _IPP64_I7 64
#define _IPP32E_PX _IPP_PX /* pure C-code x64 */
#define _IPP32E_M7 32 /* Pentium with x64 support (Nocona) - SSE3 x64 */
#define _IPP32E_U8 64 /* Merom - SSSE3 x64 */
#define _IPP32E_Y8 128 /* Penryn - SSE4.1 + tick for SSE4.2 x64 */
#define _IPP32E_E9 256 /* SandyBridge (GSSE) - AVX x64 */
#define _IPP32E_L9 512 /* Haswell (AVX2) x64 */
#define _IPP32E_N0 1024 /* KNL (AVX-512) x64 */
#define _IPP32E_K0 2048 /* SkyLake Xeon (AVX-512) x64 */
#define _IPPLP32_PX _IPP_PX
#define _IPPLP32_S8 1 /* old Atom (SSSE3+movbe) (Silverthorne) ia32 */
#define _IPPLP64_PX _IPP_PX
#define _IPPLP64_N8 1 /* old Atom (SSSE3+movbe) (Silverthorne) x64 */
#if defined(__INTEL_COMPILER) || (_MSC_VER >= 1300)
#define __ALIGN8 __declspec (align(8))
#define __ALIGN16 __declspec (align(16))
#if !defined( OSX32 )
#define __ALIGN32 __declspec (align(32))
#else
#define __ALIGN32 __declspec (align(16))
#endif
#define __ALIGN64 __declspec (align(64))
#elif defined (__GNUC__)
#define __ALIGN8 __attribute((aligned(8)))
#define __ALIGN16 __attribute((aligned(16)))
#define __ALIGN32 __attribute((aligned(32)))
#define __ALIGN64 __attribute((aligned(64)))
#else
#define __ALIGN8
#define __ALIGN16
#define __ALIGN32
#define __ALIGN64
#endif
#if defined ( _M5 ) /* Quark (Pentium) - x86+x87 ia32 */
#define _IPP _IPP_M5
#define _IPP32E _IPP32E_PX
#define _IPPLRB _IPPLRB_PX
#define _IPPLP32 _IPPLP32_PX
#define _IPPLP64 _IPPLP64_PX
#elif defined ( _M6 ) /* Pentium MMX - MMX ia32 */
#define _IPP _IPP_M6
#define _IPP32E _IPP32E_PX
#define _IPPLRB _IPPLRB_PX
#define _IPPLP32 _IPPLP32_PX
#define _IPPLP64 _IPPLP64_PX
#elif defined( _A6 ) /* Pentium III - SSE ia32 */
#define _IPP _IPP_A6
#define _IPP32E _IPP32E_PX
#define _IPPLRB _IPPLRB_PX
#define _IPPLP32 _IPPLP32_PX
#define _IPPLP64 _IPPLP64_PX
#elif defined( _W7 ) /* Pentium 4 - SSE2 ia32 */
#define _IPP _IPP_W7
#define _IPP32E _IPP32E_PX
#define _IPPLRB _IPPLRB_PX
#define _IPPLP32 _IPPLP32_PX
#define _IPPLP64 _IPPLP64_PX
#elif defined( _T7 ) /* Pentium with x64 support (Nocona) - SSE3 ia32 */
#define _IPP _IPP_T7
#define _IPP32E _IPP32E_PX
#define _IPPLRB _IPPLRB_PX
#define _IPPLP32 _IPPLP32_PX
#define _IPPLP64 _IPPLP64_PX
#elif defined( _V8 ) /* Merom - SSSE3 ia32 */
#define _IPP _IPP_V8
#define _IPP32E _IPP32E_PX
#define _IPPLRB _IPPLRB_PX
#define _IPPLP32 _IPPLP32_PX
#define _IPPLP64 _IPPLP64_PX
#elif defined( _P8 ) /* Penryn - SSE4.1 + tick for SSE4.2 ia32 */
#define _IPP _IPP_P8
#define _IPP32E _IPP32E_PX
#define _IPPLRB _IPPLRB_PX
#define _IPPLP32 _IPPLP32_PX
#define _IPPLP64 _IPPLP64_PX
#elif defined( _G9 ) /* SandyBridge (GSSE) - AVX ia32 */
#define _IPP _IPP_G9
#define _IPP32E _IPP32E_PX
#define _IPPLRB _IPPLRB_PX
#define _IPPLP32 _IPPLP32_PX
#define _IPPLP64 _IPPLP64_PX
#elif defined( _H9 ) /* Haswell (AVX2) ia32 */
#define _IPP _IPP_H9
#define _IPP32E _IPP32E_PX
#define _IPPLRB _IPPLRB_PX
#define _IPPLP32 _IPPLP32_PX
#define _IPPLP64 _IPPLP64_PX
#elif defined( _M7 ) /* Pentium with x64 support (Nocona) - SSE3 x64 */
#define _IPP _IPP_PX
#define _IPP32E _IPP32E_M7
#define _IPPLRB _IPPLRB_PX
#define _IPPLP32 _IPPLP32_PX
#define _IPPLP64 _IPPLP64_PX
#elif defined( _U8 ) /* Merom - SSSE3 x64 */
#define _IPP _IPP_PX
#define _IPP32E _IPP32E_U8
#define _IPPLRB _IPPLRB_PX
#define _IPPLP32 _IPPLP32_PX
#define _IPPLP64 _IPPLP64_PX
#elif defined( _Y8 ) /* Penryn - SSE4.1 + tick for SSE4.2 x64 */
#define _IPP _IPP_PX
#define _IPP32E _IPP32E_Y8
#define _IPPLRB _IPPLRB_PX
#define _IPPLP32 _IPPLP32_PX
#define _IPPLP64 _IPPLP64_PX
#elif defined( _E9 ) /* SandyBridge (GSSE) - AVX x64 */
#define _IPP _IPP_PX
#define _IPP32E _IPP32E_E9
#define _IPPLRB _IPPLRB_PX
#define _IPPLP32 _IPPLP32_PX
#define _IPPLP64 _IPPLP64_PX
#elif defined( _L9 ) /* Haswell (AVX2) x64 */
#define _IPP _IPP_PX
#define _IPP32E _IPP32E_L9
#define _IPPLRB _IPPLRB_PX
#define _IPPLP32 _IPPLP32_PX
#define _IPPLP64 _IPPLP64_PX
#elif defined( _N0 ) /* KNL (AVX-512) x64 */
#define _IPP _IPP_PX
#define _IPP32E _IPP32E_N0
#define _IPPLRB _IPPLRB_PX
#define _IPPLP32 _IPPLP32_PX
#define _IPPLP64 _IPPLP64_PX
#elif defined( _K0 ) /* SkyLake Xeon (AVX-512) x64 */
#define _IPP _IPP_PX
#define _IPP32E _IPP32E_K0
#define _IPPLRB _IPPLRB_PX
#define _IPPLP32 _IPPLP32_PX
#define _IPPLP64 _IPPLP64_PX
#elif defined( _B2 ) /* KNC (MIC) */
#define _IPP _IPP_PX
#define _IPP32E _IPP32E_PX
#define _IPPLRB _IPPLRB_B2
#define _IPPLP32 _IPPLP32_PX
#define _IPPLP64 _IPPLP64_PX
#elif defined( _S8 ) /* old Atom (SSSE3+movbe) (Silverthorne) ia32 */
#define _IPP _IPP_V8
#define _IPP32E _IPP32E_PX
#define _IPPLRB _IPPLRB_PX
#define _IPPLP32 _IPPLP32_S8
#define _IPPLP64 _IPPLP64_PX
#elif defined( _N8 ) /* old Atom (SSSE3+movbe) (Silverthorne) x64 */
#define _IPP _IPP_PX
#define _IPP32E _IPP32E_U8
#define _IPPLRB _IPPLRB_PX
#define _IPPLP32 _IPPLP32_PX
#define _IPPLP64 _IPPLP64_N8
#else
#define _IPP _IPP_PX
#define _IPP32E _IPP32E_PX
#define _IPPLRB _IPPLRB_PX
#define _IPPLP32 _IPPLP32_PX
#define _IPPLP64 _IPPLP64_PX
#endif
#define _IPP_ARCH_IA32 1
#define _IPP_ARCH_IA64 2
#define _IPP_ARCH_EM64T 4
#define _IPP_ARCH_XSC 8
#define _IPP_ARCH_LRB 16
#define _IPP_ARCH_LP32 32
#define _IPP_ARCH_LP64 64
#define _IPP_ARCH_LRB2 128
#if defined ( _ARCH_IA32 )
#define _IPP_ARCH _IPP_ARCH_IA32
#elif defined( _ARCH_EM64T )
#define _IPP_ARCH _IPP_ARCH_EM64T
#elif defined( _ARCH_LRB2 )
#define _IPP_ARCH _IPP_ARCH_LRB2
#elif defined( _ARCH_LP32 )
#define _IPP_ARCH _IPP_ARCH_LP32
#elif defined( _ARCH_LP64 )
#define _IPP_ARCH _IPP_ARCH_LP64
#else
#if defined(_M_AMD64) || defined(__x86_64) || defined(__x86_64__)
#define _IPP_ARCH _IPP_ARCH_EM64T
#else
#define _IPP_ARCH _IPP_ARCH_IA32
#endif
#endif
#if ((_IPP_ARCH == _IPP_ARCH_IA32) || (_IPP_ARCH == _IPP_ARCH_LP32))
__INLINE
Ipp32s IPP_INT_PTR( const void* ptr ) {
union {
void* Ptr;
Ipp32s Int;
} dd;
dd.Ptr = (void*)ptr;
return dd.Int;
}
__INLINE
Ipp32u IPP_UINT_PTR( const void* ptr ) {
union {
void* Ptr;
Ipp32u Int;
} dd;
dd.Ptr = (void*)ptr;
return dd.Int;
}
#elif ((_IPP_ARCH == _IPP_ARCH_EM64T) || (_IPP_ARCH == _IPP_ARCH_LRB2) || (_IPP_ARCH == _IPP_ARCH_LP64))
__INLINE
Ipp64s IPP_INT_PTR( const void* ptr ) {
union {
void* Ptr;
Ipp64s Int;
} dd;
dd.Ptr = (void*)ptr;
return dd.Int;
}
__INLINE
Ipp64u IPP_UINT_PTR( const void* ptr ) {
union {
void* Ptr;
Ipp64u Int;
} dd;
dd.Ptr = (void*)ptr;
return dd.Int;
}
#else
#define IPP_INT_PTR( ptr ) ( (long)(ptr) )
#define IPP_UINT_PTR( ptr ) ( (unsigned long)(ptr) )
#endif
#define IPP_ALIGN_TYPE(type, align) ((align)/sizeof(type)-1)
#define IPP_BYTES_TO_ALIGN(ptr, align) ((-(IPP_INT_PTR(ptr)&((align)-1)))&((align)-1))
#define IPP_ALIGNED_PTR(ptr, align) (void*)( (unsigned char*)(ptr) + (IPP_BYTES_TO_ALIGN( ptr, align )) )
#define IPP_ALIGNED_SIZE(size, align) (((size)+(align)-1)&~((align)-1))
#define IPP_MALLOC_ALIGNED_BYTES 64
#define IPP_MALLOC_ALIGNED_8BYTES 8
#define IPP_MALLOC_ALIGNED_16BYTES 16
#define IPP_MALLOC_ALIGNED_32BYTES 32
#define IPP_ALIGNED_ARRAY(align,arrtype,arrname,arrlength)\
char arrname##AlignedArrBuff[sizeof(arrtype)*(arrlength)+IPP_ALIGN_TYPE(char, align)];\
arrtype *arrname = (arrtype*)IPP_ALIGNED_PTR(arrname##AlignedArrBuff,align)
#if defined( __cplusplus )
extern "C" {
#endif
/* /////////////////////////////////////////////////////////////////////////////
IPP Context Identification
/////////////////////////////////////////////////////////////////////////// */
#define IPP_CONTEXT( a, b, c, d) \
(int)(((unsigned)(a) << 24) | ((unsigned)(b) << 16) | \
((unsigned)(c) << 8) | (unsigned)(d))
typedef enum {
idCtxUnknown = 0,
idCtxFFT_C_16sc,
idCtxFFT_C_16s,
idCtxFFT_R_16s,
idCtxFFT_C_32fc,
idCtxFFT_C_32f,
idCtxFFT_R_32f,
idCtxFFT_C_64fc,
idCtxFFT_C_64f,
idCtxFFT_R_64f,
idCtxDFT_C_16sc,
idCtxDFT_C_16s,
idCtxDFT_R_16s,
idCtxDFT_C_32fc,
idCtxDFT_C_32f,
idCtxDFT_R_32f,
idCtxDFT_C_64fc,
idCtxDFT_C_64f,
idCtxDFT_R_64f,
idCtxDCTFwd_16s,
idCtxDCTInv_16s,
idCtxDCTFwd_32f,
idCtxDCTInv_32f,
idCtxDCTFwd_64f,
idCtxDCTInv_64f,
idCtxFFT2D_C_32fc,
idCtxFFT2D_R_32f,
idCtxDFT2D_C_32fc,
idCtxDFT2D_R_32f,
idCtxFFT2D_R_32s,
idCtxDFT2D_R_32s,
idCtxDCT2DFwd_32f,
idCtxDCT2DInv_32f,
idCtxMoment64f,
idCtxMoment64s,
idCtxRandUni_8u,
idCtxRandUni_16s,
idCtxRandUni_32f,
idCtxRandUni_64f,
idCtxRandGauss_8u,
idCtxRandGauss_16s,
idCtxRandGauss_32f,
idCtxRandGauss_64f,
idCtxWTFwd_32f,
idCtxWTFwd_8u32f,
idCtxWTFwd_8s32f,
idCtxWTFwd_16u32f,
idCtxWTFwd_16s32f,
idCtxWTFwd2D_32f_C1R,
idCtxWTInv2D_32f_C1R,
idCtxWTFwd2D_32f_C3R,
idCtxWTInv2D_32f_C3R,
idCtxWTInv_32f,
idCtxWTInv_32f8u,
idCtxWTInv_32f8s,
idCtxWTInv_32f16u,
idCtxWTInv_32f16s,
idCtxMDCTFwd_32f,
idCtxMDCTInv_32f,
idCtxMDCTFwd_16s,
idCtxFIRBlock_32f,
idCtxFDP_32f,
idCtxRLMS_32f = IPP_CONTEXT( 'L', 'M', 'S', '1'),
idCtxRLMS32f_16s = IPP_CONTEXT( 'L', 'M', 'S', 0 ),
idCtxIIRAR_32f = IPP_CONTEXT( 'I', 'I', '0', '1'),
idCtxIIRBQ_32f = IPP_CONTEXT( 'I', 'I', '0', '2'),
idCtxIIRAR_32fc = IPP_CONTEXT( 'I', 'I', '0', '3'),
idCtxIIRBQ_32fc = IPP_CONTEXT( 'I', 'I', '0', '4'),
idCtxIIRAR32f_16s = IPP_CONTEXT( 'I', 'I', '0', '5'),
idCtxIIRBQ32f_16s = IPP_CONTEXT( 'I', 'I', '0', '6'),
idCtxIIRAR32fc_16sc = IPP_CONTEXT( 'I', 'I', '0', '7'),
idCtxIIRBQ32fc_16sc = IPP_CONTEXT( 'I', 'I', '0', '8'),
idCtxIIRAR32s_16s = IPP_CONTEXT( 'I', 'I', '0', '9'),
idCtxIIRBQ32s_16s = IPP_CONTEXT( 'I', 'I', '1', '0'),
idCtxIIRAR32sc_16sc = IPP_CONTEXT( 'I', 'I', '1', '1'),
idCtxIIRBQ32sc_16sc = IPP_CONTEXT( 'I', 'I', '1', '2'),
idCtxIIRAR_64f = IPP_CONTEXT( 'I', 'I', '1', '3'),
idCtxIIRBQ_64f = IPP_CONTEXT( 'I', 'I', '1', '4'),
idCtxIIRAR_64fc = IPP_CONTEXT( 'I', 'I', '1', '5'),
idCtxIIRBQ_64fc = IPP_CONTEXT( 'I', 'I', '1', '6'),
idCtxIIRAR64f_32f = IPP_CONTEXT( 'I', 'I', '1', '7'),
idCtxIIRBQ64f_32f = IPP_CONTEXT( 'I', 'I', '1', '8'),
idCtxIIRAR64fc_32fc = IPP_CONTEXT( 'I', 'I', '1', '9'),
idCtxIIRBQ64fc_32fc = IPP_CONTEXT( 'I', 'I', '2', '0'),
idCtxIIRAR64f_32s = IPP_CONTEXT( 'I', 'I', '2', '1'),
idCtxIIRBQ64f_32s = IPP_CONTEXT( 'I', 'I', '2', '2'),
idCtxIIRAR64fc_32sc = IPP_CONTEXT( 'I', 'I', '2', '3'),
idCtxIIRBQ64fc_32sc = IPP_CONTEXT( 'I', 'I', '2', '4'),
idCtxIIRAR64f_16s = IPP_CONTEXT( 'I', 'I', '2', '5'),
idCtxIIRBQ64f_16s = IPP_CONTEXT( 'I', 'I', '2', '6'),
idCtxIIRAR64fc_16sc = IPP_CONTEXT( 'I', 'I', '2', '7'),
idCtxIIRBQ64fc_16sc = IPP_CONTEXT( 'I', 'I', '2', '8'),
idCtxIIRBQDF1_32f = IPP_CONTEXT( 'I', 'I', '2', '9'),
idCtxIIRBQDF164f_32s= IPP_CONTEXT( 'I', 'I', '3', '0'),
idCtxFIRSR_32f = IPP_CONTEXT( 'F', 'I', '0', '1'),
idCtxFIRSR_32fc = IPP_CONTEXT( 'F', 'I', '0', '2'),
idCtxFIRMR_32f = IPP_CONTEXT( 'F', 'I', '0', '3'),
idCtxFIRMR_32fc = IPP_CONTEXT( 'F', 'I', '0', '4'),
idCtxFIRSR32f_16s = IPP_CONTEXT( 'F', 'I', '0', '5'),
idCtxFIRSR32fc_16sc = IPP_CONTEXT( 'F', 'I', '0', '6'),
idCtxFIRMR32f_16s = IPP_CONTEXT( 'F', 'I', '0', '7'),
idCtxFIRMR32fc_16sc = IPP_CONTEXT( 'F', 'I', '0', '8'),
idCtxFIRSR32s_16s = IPP_CONTEXT( 'F', 'I', '0', '9'),
idCtxFIRSR32sc_16sc = IPP_CONTEXT( 'F', 'I', '1', '0'),
idCtxFIRMR32s_16s = IPP_CONTEXT( 'F', 'I', '1', '1'),
idCtxFIRMR32sc_16sc = IPP_CONTEXT( 'F', 'I', '1', '2'),
idCtxFIRSR_64f = IPP_CONTEXT( 'F', 'I', '1', '3'),
idCtxFIRSR_64fc = IPP_CONTEXT( 'F', 'I', '1', '4'),
idCtxFIRMR_64f = IPP_CONTEXT( 'F', 'I', '1', '5'),
idCtxFIRMR_64fc = IPP_CONTEXT( 'F', 'I', '1', '6'),
idCtxFIRSR64f_32f = IPP_CONTEXT( 'F', 'I', '1', '7'),
idCtxFIRSR64fc_32fc = IPP_CONTEXT( 'F', 'I', '1', '8'),
idCtxFIRMR64f_32f = IPP_CONTEXT( 'F', 'I', '1', '9'),
idCtxFIRMR64fc_32fc = IPP_CONTEXT( 'F', 'I', '2', '0'),
idCtxFIRSR64f_32s = IPP_CONTEXT( 'F', 'I', '2', '1'),
idCtxFIRSR64fc_32sc = IPP_CONTEXT( 'F', 'I', '2', '2'),
idCtxFIRMR64f_32s = IPP_CONTEXT( 'F', 'I', '2', '3'),
idCtxFIRMR64fc_32sc = IPP_CONTEXT( 'F', 'I', '2', '4'),
idCtxFIRSR64f_16s = IPP_CONTEXT( 'F', 'I', '2', '5'),
idCtxFIRSR64fc_16sc = IPP_CONTEXT( 'F', 'I', '2', '6'),
idCtxFIRMR64f_16s = IPP_CONTEXT( 'F', 'I', '2', '7'),
idCtxFIRMR64fc_16sc = IPP_CONTEXT( 'F', 'I', '2', '8'),
idCtxFIRSR_16s = IPP_CONTEXT( 'F', 'I', '2', '9'),
idCtxFIRMR_16s = IPP_CONTEXT( 'F', 'I', '3', '0'),
idCtxFIRSRStream_16s= IPP_CONTEXT( 'F', 'I', '3', '1'),
idCtxFIRMRStream_16s= IPP_CONTEXT( 'F', 'I', '3', '2'),
idCtxFIRSRStream_32f= IPP_CONTEXT( 'F', 'I', '3', '3'),
idCtxFIRMRStream_32f= IPP_CONTEXT( 'F', 'I', '3', '4'),
idCtxRLMS32s_16s = IPP_CONTEXT( 'L', 'M', 'S', 'R'),
idCtxCLMS32s_16s = IPP_CONTEXT( 'L', 'M', 'S', 'C'),
idCtxEncode_JPEG2K,
idCtxDES = IPP_CONTEXT( ' ', 'D', 'E', 'S'),
idCtxBlowfish = IPP_CONTEXT( ' ', ' ', 'B', 'F'),
idCtxRijndael = IPP_CONTEXT( ' ', 'R', 'I', 'J'),
idCtxSMS4 = IPP_CONTEXT( 'S', 'M', 'S', '4'),
idCtxTwofish = IPP_CONTEXT( ' ', ' ', 'T', 'F'),
idCtxARCFOUR = IPP_CONTEXT( ' ', 'R', 'C', '4'),
idCtxRC564 = IPP_CONTEXT( 'R', 'C', '5', '1'),
idCtxRC5128 = IPP_CONTEXT( 'R', 'C', '5', '2'),
idCtxSHA1 = IPP_CONTEXT( 'S', 'H', 'S', '1'),
idCtxSHA224 = IPP_CONTEXT( 'S', 'H', 'S', '3'),
idCtxSHA256 = IPP_CONTEXT( 'S', 'H', 'S', '2'),
idCtxSHA384 = IPP_CONTEXT( 'S', 'H', 'S', '4'),
idCtxSHA512 = IPP_CONTEXT( 'S', 'H', 'S', '5'),
idCtxMD5 = IPP_CONTEXT( ' ', 'M', 'D', '5'),
idCtxHMAC = IPP_CONTEXT( 'H', 'M', 'A', 'C'),
idCtxDAA = IPP_CONTEXT( ' ', 'D', 'A', 'A'),
idCtxBigNum = IPP_CONTEXT( 'B', 'I', 'G', 'N'),
idCtxMontgomery = IPP_CONTEXT( 'M', 'O', 'N', 'T'),
idCtxPrimeNumber = IPP_CONTEXT( 'P', 'R', 'I', 'M'),
idCtxPRNG = IPP_CONTEXT( 'P', 'R', 'N', 'G'),
idCtxRSA = IPP_CONTEXT( ' ', 'R', 'S', 'A'),
idCtxRSA_PubKey = IPP_CONTEXT( 'R', 'S', 'A', '0'),
idCtxRSA_PrvKey1 = IPP_CONTEXT( 'R', 'S', 'A', '1'),
idCtxRSA_PrvKey2 = IPP_CONTEXT( 'R', 'S', 'A', '2'),
idCtxDSA = IPP_CONTEXT( ' ', 'D', 'S', 'A'),
idCtxECCP = IPP_CONTEXT( ' ', 'E', 'C', 'P'),
idCtxECCB = IPP_CONTEXT( ' ', 'E', 'C', 'B'),
idCtxECCPPoint = IPP_CONTEXT( 'P', 'E', 'C', 'P'),
idCtxECCBPoint = IPP_CONTEXT( 'P', 'E', 'C', 'B'),
idCtxDH = IPP_CONTEXT( ' ', ' ', 'D', 'H'),
idCtxDLP = IPP_CONTEXT( ' ', 'D', 'L', 'P'),
idCtxCMAC = IPP_CONTEXT( 'C', 'M', 'A', 'C'),
idCtxRFFT2_8u,
idCtxHilbert_32f32fc,
idCtxHilbert_16s32fc,
idCtxHilbert_16s16sc,
idCtxTone_16s,
idCtxTriangle_16s,
idCtxDFTOutOrd_C_32fc,
idCtxDFTOutOrd_C_64fc,
idCtxFFT_C_32sc,
idCtxFFT_C_32s,
idCtxFFT_R_32s,
idCtxFFT_R_16s32s,
idCtxDecodeProgr_JPEG2K,
idCtxWarp_MPEG4,
idCtxQuantInvIntra_MPEG4,
idCtxQuantInvInter_MPEG4,
idCtxQuantIntra_MPEG4,
idCtxQuantInter_MPEG4,
idCtxAnalysisFilter_SBR_C_32f32fc,
idCtxAnalysisFilter_SBR_C_32f,
idCtxAnalysisFilter_SBR_R_32f,
idCtxSynthesisFilter_SBR_C_32fc32f,
idCtxSynthesisFilter_SBR_C_32f,
idCtxSynthesisFilter_SBR_R_32f,
idCtxSynthesisDownFilter_SBR_C_32fc32f,
idCtxSynthesisDownFilter_SBR_C_32f,
idCtxSynthesisDownFilter_SBR_R_32f,
idCtxVLCEncode,
idCtxVLCDecode,
idCtxAnalysisFilter_SBR_C_32s32sc,
idCtxAnalysisFilter_SBR_R_32s,
idCtxSynthesisFilter_SBR_C_32sc32s,
idCtxSynthesisFilter_SBR_R_32s,
idCtxSynthesisDownFilter_SBR_C_32sc32s,
idCtxSynthesisDownFilter_SBR_R_32s,
idCtxSynthesisFilter_PQMF_MP3_32f,
idCtxAnalysisFilter_PQMF_MP3_32f,
idCtxResampleRow,
idCtxAnalysisFilter_SBR_Enc_C_32f32fc,
idCtxSynthesisFilter_DTS_32f,
idCtxFilterBilateralGauss_8u,
idCtxFilterBilateralGaussFast_8u,
idCtxBGF,
idCtxPolyGF,
idCtxRSenc,
idCtxRSdec,
idCtxSnow3g = IPP_CONTEXT( 'S', 'n', 'o', 'w'),
idCtxSnow3gF8,
idCtxSnow3gF9,
idCtxKasumi = IPP_CONTEXT( 'K', 'a', 's', 'u'),
idCtxKasumiF8,
idCtxKasumiF9,
idCtxResizeHannFilter_8u,
idCtxResizeLanczosFilter_8u,
idCtxAESXCBC,
idCtxAESCCM,
idCtxAESGCM,
idCtxMsgCatalog,
idCtxGFP,
idCtxGFPE,
idCtxGFPX,
idCtxGFPXE,
idCtxGFPXQX,
idCtxGFPXQXE,
idCtxGFPEC,
idCtxGFPPoint,
idCtxGFPXEC,
idCtxGFPXECPoint,
idCtxPairing,
idCtxResize_32f,
idCtxResizeYUV420,
idCtxResizeYUV422,
idCtxResize_64f,
idCtxFilterBilateralBorder,
idCtxThresholdAdaptiveGauss,
idCtxHOG,
idCtxFastN,
idCtxHash,
idCtxSM3
} IppCtxId;
/* /////////////////////////////////////////////////////////////////////////////
Helpers
/////////////////////////////////////////////////////////////////////////// */
#define IPP_NOERROR_RET() return ippStsNoErr
#define IPP_ERROR_RET( ErrCode ) return (ErrCode)
#ifdef _IPP_DEBUG
#define IPP_BADARG_RET( expr, ErrCode )\
{if (expr) { IPP_ERROR_RET( ErrCode ); }}
#else
#define IPP_BADARG_RET( expr, ErrCode )
#endif
#define IPP_BAD_SIZE_RET( n )\
IPP_BADARG_RET( (n)<=0, ippStsSizeErr )
#define IPP_BAD_STEP_RET( n )\
IPP_BADARG_RET( (n)<=0, ippStsStepErr )
#define IPP_BAD_PTR1_RET( ptr )\
IPP_BADARG_RET( NULL==(ptr), ippStsNullPtrErr )
#define IPP_BAD_PTR2_RET( ptr1, ptr2 )\
{IPP_BAD_PTR1_RET( ptr1 ); IPP_BAD_PTR1_RET( ptr2 )}
#define IPP_BAD_PTR3_RET( ptr1, ptr2, ptr3 )\
{IPP_BAD_PTR2_RET( ptr1, ptr2 ); IPP_BAD_PTR1_RET( ptr3 )}
#define IPP_BAD_PTR4_RET( ptr1, ptr2, ptr3, ptr4 )\
{IPP_BAD_PTR2_RET( ptr1, ptr2 ); IPP_BAD_PTR2_RET( ptr3, ptr4 )}
#define IPP_BAD_ISIZE_RET(roi) \
IPP_BADARG_RET( ((roi).width<=0 || (roi).height<=0), ippStsSizeErr)
/* ////////////////////////////////////////////////////////////////////////// */
/* internal messages */
#define MSG_LOAD_DLL_ERR (-9700) /* Error at loading of %s library */
#define MSG_NO_DLL (-9701) /* No DLLs were found in the Waterfall procedure */
#define MSG_NO_SHARED (-9702) /* No shared libraries were found in the Waterfall procedure */
/* ////////////////////////////////////////////////////////////////////////// */
typedef union { /* double precision */
Ipp64s hex;
Ipp64f fp;
} IppFP_64f;
typedef union { /* single precision */
Ipp32s hex;
Ipp32f fp;
} IppFP_32f;
extern const IppFP_32f ippConstantOfNAN_32f;
extern const IppFP_64f ippConstantOfNAN_64f;
extern const IppFP_32f ippConstantOfINF_32f;
extern const IppFP_64f ippConstantOfINF_64f;
extern const IppFP_32f ippConstantOfINF_NEG_32f;
extern const IppFP_64f ippConstantOfINF_NEG_64f;
#define NAN_32F (ippConstantOfNAN_32f.fp)
#define NAN_64F (ippConstantOfNAN_64f.fp)
#define INF_32F (ippConstantOfINF_32f.fp)
#define INF_64F (ippConstantOfINF_64f.fp)
#define INF_NEG_32F (ippConstantOfINF_NEG_32f.fp)
#define INF_NEG_64F (ippConstantOfINF_NEG_64f.fp)
/* ////////////////////////////////////////////////////////////////////////// */
typedef enum {
ippunreg=-1,
ippac = 0,
ippcc = 1,
ippch = 2,
ippcp = 3,
ippcv = 4,
ippdc = 5,
ippdi = 6,
ippgen = 7,
ippi = 8,
ippj = 9,
ippm = 10,
ippr = 11,
ipps = 12,
ippsc = 13,
ippsr = 14,
ippvc = 15,
ippvm = 16,
ippmsdk = 17,
ippcpepid = 18,
ippe = 19,
ipprs = 20,
ippsq = 21,
ippnomore
} IppDomain;
int __CDECL ownGetNumThreads( void );
int __CDECL ownGetFeature( Ipp64u MaskOfFeature ); /* the main function of tick-tock dispatcher */
#ifdef _IPP_DYNAMIC
typedef IppStatus (__STDCALL *DYN_RELOAD)( int );
void __CDECL ownRegisterLib( IppDomain, DYN_RELOAD );
void __CDECL ownUnregisterLib( IppDomain );
#endif
/* the number of threads available for any ipp function that uses OMP; */
/* at the ippxx.dll loading time is equal to the number of logical processors, */
/* and can be changed ONLY externally by library user to any desired number */
/* by means of ippSetNumThreads() function */
#define IPP_GET_NUM_THREADS() ( ownGetNumThreads() )
#define IPP_OMP_NUM_THREADS() num_threads( IPP_GET_NUM_THREADS() )
#define IPP_OMP_LIMIT_MAX_NUM_THREADS(n) num_threads( IPP_MIN(IPP_GET_NUM_THREADS(),(n)))
/* ////////////////////////////////////////////////////////////////////////// */
/* Define NULL pointer value */
#ifndef NULL
#ifdef __cplusplus
#define NULL 0
#else
#define NULL ((void *)0)
#endif
#endif
#define UNREFERENCED_PARAMETER(p) (p)=(p)
#if defined( _IPP_MARK_LIBRARY )
static char G[] = {73, 80, 80, 71, 101, 110, 117, 105, 110, 101, 243, 193, 210, 207, 215};
#endif
#define STR2(x) #x
#define STR(x) STR2(x)
#define MESSAGE( desc )\
message(__FILE__ "(" STR(__LINE__) "):" #desc)
/*
// endian definition
*/
#define IPP_LITTLE_ENDIAN (0)
#define IPP_BIG_ENDIAN (1)
#if defined( _IPP_LE )
#define IPP_ENDIAN IPP_LITTLE_ENDIAN
#elif defined( _IPP_BE )
#define IPP_ENDIAN IPP_BIG_ENDIAN
#else
#if defined( __ARMEB__ )
#define IPP_ENDIAN IPP_BIG_ENDIAN
#else
#define IPP_ENDIAN IPP_LITTLE_ENDIAN
#endif
#endif
/* ////////////////////////////////////////////////////////////////////////// */
/* intrinsics */
#if (_IPP >= _IPP_A6) || (_IPP32E >= _IPP32E_M7)
#if defined(__INTEL_COMPILER) || (_MSC_VER >= 1300)
#if (_IPP == _IPP_A6)
#include "xmmintrin.h"
#elif (_IPP == _IPP_W7)
#if defined(__INTEL_COMPILER)
#include "emmintrin.h"
#else
#undef _W7
#include "emmintrin.h"
#define _W7
#endif
#define _mm_loadu _mm_loadu_si128
#elif (_IPP == _IPP_T7) || (_IPP32E == _IPP32E_M7)
#if defined(__INTEL_COMPILER)
#include "pmmintrin.h"
#define _mm_loadu _mm_lddqu_si128
#elif (_MSC_FULL_VER >= 140050110)
#include "intrin.h"
#define _mm_loadu _mm_lddqu_si128
#elif (_MSC_FULL_VER < 140050110)
#include "emmintrin.h"
#define _mm_loadu _mm_loadu_si128
#endif
#elif (_IPP == _IPP_V8) || (_IPP32E == _IPP32E_U8)
#if defined(__INTEL_COMPILER)
#include "tmmintrin.h"
#define _mm_loadu _mm_lddqu_si128
#elif (_MSC_FULL_VER >= 140050110)
#include "intrin.h"
#define _mm_loadu _mm_lddqu_si128
#elif (_MSC_FULL_VER < 140050110)
#include "emmintrin.h"
#define _mm_loadu _mm_loadu_si128
#endif
#elif (_IPP == _IPP_P8) || (_IPP32E == _IPP32E_Y8)
#if defined(__INTEL_COMPILER)
#include "smmintrin.h"
#define _mm_loadu _mm_lddqu_si128
#elif (_MSC_FULL_VER >= 140050110)
#include "intrin.h"
#define _mm_loadu _mm_lddqu_si128
#elif (_MSC_FULL_VER < 140050110)
#include "emmintrin.h"
#define _mm_loadu _mm_loadu_si128
#endif
#elif (_IPP >= _IPP_G9) || (_IPP32E >= _IPP32E_E9)
#if defined(__INTEL_COMPILER)
#include "immintrin.h"
#define _mm_loadu _mm_lddqu_si128
#elif (_MSC_FULL_VER >= 160021003)
#include "immintrin.h"
#define _mm_loadu _mm_lddqu_si128
#endif
#endif
#endif
#elif (_IPPLP32 >= _IPPLP32_S8) || (_IPPLP64 >= _IPPLP64_N8)
#if defined(__INTEL_COMPILER)
#include "tmmintrin.h"
#define _mm_loadu _mm_lddqu_si128
#elif (_MSC_FULL_VER >= 140050110)
#include "intrin.h"
#define _mm_loadu _mm_lddqu_si128
#elif (_MSC_FULL_VER < 140050110)
#include "emmintrin.h"
#define _mm_loadu _mm_loadu_si128
#endif
#elif (_IPPLRB >= _IPPLRB_B2)
#if defined(__INTEL_COMPILER) || defined(_REF_LIB)
#include "immintrin.h"
#endif
#endif
// **** intrinsics for bit casting ****
#if defined(__INTEL_COMPILER)
extern unsigned int __intel_castf32_u32(float val);
extern float __intel_castu32_f32(unsigned int val);
extern unsigned __int64 __intel_castf64_u64(double val);
extern double __intel_castu64_f64(unsigned __int64 val);
#define __CAST_32f32u(val) __intel_castf32_u32((Ipp32f)val)
#define __CAST_32u32f(val) __intel_castu32_f32((Ipp32u)val)
#define __CAST_64f64u(val) __intel_castf64_u64((Ipp64f)val)
#define __CAST_64u64f(val) __intel_castu64_f64((Ipp64u)val)
#else
#define __CAST_32f32u(val) ( *((Ipp32u*)&val) )
#define __CAST_32u32f(val) ( *((Ipp32f*)&val) )
#define __CAST_64f64u(val) ( *((Ipp64u*)&val) )
#define __CAST_64u64f(val) ( *((Ipp64f*)&val) )
#endif
// short names for vector registers casting
#define _pd2ps _mm_castpd_ps
#define _ps2pd _mm_castps_pd
#define _pd2pi _mm_castpd_si128
#define _pi2pd _mm_castsi128_pd
#define _ps2pi _mm_castps_si128
#define _pi2ps _mm_castsi128_ps
#define _ypd2ypi _mm256_castpd_si256
#define _ypi2ypd _mm256_castsi256_pd
#define _yps2ypi _mm256_castps_si256
#define _ypi2yps _mm256_castsi256_ps
#define _ypd2yps _mm256_castpd_ps
#define _yps2ypd _mm256_castps_pd
#define _yps2ps _mm256_castps256_ps128
#define _ypi2pi _mm256_castsi256_si128
#define _ypd2pd _mm256_castpd256_pd128
#define _ps2yps _mm256_castps128_ps256
#define _pi2ypi _mm256_castsi128_si256
#define _pd2ypd _mm256_castpd128_pd256
#if defined(__INTEL_COMPILER)
#define __IVDEP ivdep
#else
#define __IVDEP message("message :: 'ivdep' is not defined")
#endif
//usage: #pragma __IVDEP
/* //////////////////////////////////////////////////////////////////////////
_IPP_DATA shoul be defined only:
- if compile not merged library
- only for 1 CPU for merged library to avoid data duplication
*/
#if defined( _MERGED_BLD ) && ( defined(_G9) || defined(_E9) ) /* compile data only for g9 and e9 CPU */
#define _IPP_DATA 1
#elif !defined( _MERGED_BLD ) /* compile data if it isn't merged library */
#define _IPP_DATA 1
#endif
#if defined( __cplusplus )
}
#endif
#endif /* __OWNDEFS_H__ */

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@ -1,149 +0,0 @@
/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef __OWNCP_H__
#define __OWNCP_H__
#ifndef __OWNDEFS_H__
#include "owndefs.h"
#endif
#ifndef __IPPCP_H__
#include "ippcp.h"
#endif
#pragma warning( disable : 4324)
/* ippCP length */
typedef int cpSize;
/*
// common macros & definitions
*/
/* size of cache line (bytes) */
#define CACHE_LINE_SIZE (64)
#define LOG_CACHE_LINE_SIZE (6)
/* swap data & pointers */
#define SWAP_PTR(ATYPE, pX,pY) { ATYPE* aPtr=(pX); (pX)=(pY); (pY)=aPtr; }
#define SWAP(x,y) {(x)^=(y); (y)^=(x); (x)^=(y);}
/* alignment value */
#define ALIGN_VAL ((int)sizeof(void*))
/* bitsize */
#define BYTESIZE (8)
#define BITSIZE(x) ((int)(sizeof(x)*BYTESIZE))
/* bit length -> byte/word length conversion */
#define BITS2WORD8_SIZE(x) (((x)+ 7)>>3)
#define BITS2WORD16_SIZE(x) (((x)+15)>>4)
#define BITS2WORD32_SIZE(x) (((x)+31)>>5)
#define BITS2WORD64_SIZE(x) (((x)+63)>>6)
/* WORD and DWORD manipulators */
#define LODWORD(x) ((Ipp32u)(x))
#define HIDWORD(x) ((Ipp32u)(((Ipp64u)(x) >>32) & 0xFFFFFFFF))
#define MAKEHWORD(bLo,bHi) ((Ipp16u)(((Ipp8u)(bLo)) | ((Ipp16u)((Ipp8u)(bHi))) << 8))
#define MAKEWORD(hLo,hHi) ((Ipp32u)(((Ipp16u)(hLo)) | ((Ipp32u)((Ipp16u)(hHi))) << 16))
#define MAKEDWORD(wLo,wHi) ((Ipp64u)(((Ipp32u)(wLo)) | ((Ipp64u)((Ipp32u)(wHi))) << 32))
/* extract byte */
#define EBYTE(w,n) ((Ipp8u)((w) >> (8 * (n))))
/* hexString <-> Ipp32u conversion */
#define HSTRING_TO_U32(ptrByte) \
(((ptrByte)[0]) <<24) \
+(((ptrByte)[1]) <<16) \
+(((ptrByte)[2]) <<8) \
+((ptrByte)[3])
#define U32_TO_HSTRING(ptrByte, x) \
(ptrByte)[0] = (Ipp8u)((x)>>24); \
(ptrByte)[1] = (Ipp8u)((x)>>16); \
(ptrByte)[2] = (Ipp8u)((x)>>8); \
(ptrByte)[3] = (Ipp8u)(x)
/* 32- and 64-bit masks for MSB of nbits-sequence */
#define MAKEMASK32(nbits) (0xFFFFFFFF >>((32 - ((nbits)&0x1F)) &0x1F))
#define MAKEMASK64(nbits) (0xFFFFFFFFFFFFFFFF >>((64 - ((nbits)&0x3F)) &0x3F))
/* Logical Shifts (right and left) of WORD */
#define LSR32(x,nBits) ((x)>>(nBits))
#define LSL32(x,nBits) ((x)<<(nBits))
/* Rorate (right and left) of WORD */
#if defined(_MSC_VER)
# include <stdlib.h>
# define ROR32(x, nBits) _lrotr((x),(nBits))
# define ROL32(x, nBits) _lrotl((x),(nBits))
#else
# define ROR32(x, nBits) (LSR32((x),(nBits)) | LSL32((x),32-(nBits)))
# define ROL32(x, nBits) ROR32((x),(32-(nBits)))
#endif
/* Logical Shifts (right and left) of DWORD */
#define LSR64(x,nBits) ((x)>>(nBits))
#define LSL64(x,nBits) ((x)<<(nBits))
/* Rorate (right and left) of DWORD */
#define ROR64(x, nBits) (LSR64((x),(nBits)) | LSL64((x),64-(nBits)))
#define ROL64(x, nBits) ROR64((x),(64-(nBits)))
/* change endian */
#if defined(_MSC_VER)
# define ENDIANNESS(x) _byteswap_ulong((x))
# define ENDIANNESS32(x) ENDIANNESS((x))
# define ENDIANNESS64(x) _byteswap_uint64((x))
#else
# define ENDIANNESS(x) ((ROR32((x), 24) & 0x00ff00ff) | (ROR32((x), 8) & 0xff00ff00))
# define ENDIANNESS32(x) ENDIANNESS((x))
# define ENDIANNESS64(x) MAKEDWORD(ENDIANNESS(HIDWORD((x))), ENDIANNESS(LODWORD((x))))
#endif
#define IPP_MAKE_MULTIPLE_OF_8(x) ((x) = ((x)+7)&(~7))
#define IPP_MAKE_MULTIPLE_OF_16(x) ((x) = ((x)+15)&(~15))
/* 64-bit constant */
#if !defined(__GNUC__)
#define CONST_64(x) (x) /*(x##i64)*/
#else
#define CONST_64(x) (x##LL)
#endif
/* copy under mask */
#define MASKED_COPY_BNU(dst, mask, src1, src2, len) { \
cpSize i; \
for(i=0; i<(len); i++) (dst)[i] = ((mask) & (src1)[i]) | (~(mask) & (src2)[i]); \
}
#endif /* __OWNCP_H__ */

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@ -1,396 +0,0 @@
/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "owndefs.h"
#include "owncp.h"
#include "pcpcmac.h"
#include "pcpaesm.h"
#include "pcptool.h"
#include "pcprijtables.h"
/*F*
// Name: ippsAES_CMACGetSize
//
// Purpose: Returns size of AES-CMAC context (in bytes).
//
// Returns: Reason:
// ippStsNullPtrErr pSzie == NULL
// ippStsNoErr no errors
//
// Parameters:
// pSize pointer to the AES-CMAC size of context
//
*F*/
static int cpSizeofCtx_AESCMAC(void)
{
return sizeof(IppsAES_CMACState) + AESCMAC_ALIGNMENT-1;
}
IPPFUN(IppStatus, ippsAES_CMACGetSize,(int* pSize))
{
/* test size's pointer */
IPP_BAD_PTR1_RET(pSize);
*pSize = cpSizeofCtx_AESCMAC();
return ippStsNoErr;
}
/*F*
// Name: ippsAES_CMACInit
//
// Purpose: Init AES-CMAC context.
//
// Returns: Reason:
// ippStsNullPtrErr pCtx == NULL
// ippStsMemAllocErr size of buffer is not match fro operation
// ippStsLengthErr keyLen != 16
// keyLen != 24
// keyLen != 32
// ippStsNoErr no errors
//
// Parameters:
// pKey pointer to the secret key
// keyLen length of secret key
// pCtx pointer to the CMAC context
// ctxSize available size (in bytes) of buffer above
//
*F*/
static
void init(IppsAES_CMACState* pCtx)
{
/* buffer is empty */
CMAC_INDX(pCtx) = 0;
/* zeros MAC */
PaddBlock(0, CMAC_MAC(pCtx), MBS_RIJ128);
}
static
void LogicalLeftSift16(const Ipp8u* pSrc, Ipp8u* pDst)
{
Ipp32u carry = 0;
int n;
for(n=0; n<16; n++) {
Ipp32u x = pSrc[16-1-n] + pSrc[16-1-n] + carry;
pDst[16-1-n] = (Ipp8u)x;
carry = (x>>8) & 0xFF;
}
}
IPPFUN(IppStatus, ippsAES_CMACInit,(const Ipp8u* pKey, int keyLen, IppsAES_CMACState* pCtx, int ctxSize))
{
/* test pCtx pointer */
IPP_BAD_PTR1_RET(pCtx);
/* test available size of context buffer */
IPP_BADARG_RET(ctxSize<cpSizeofCtx_AESCMAC(), ippStsMemAllocErr);
/* use aligned context */
pCtx = (IppsAES_CMACState*)( IPP_ALIGNED_PTR(pCtx, AESCMAC_ALIGNMENT) );
{
IppStatus sts;
/* set context ID */
CMAC_ID(pCtx) = idCtxCMAC;
/* init internal buffer and DAC */
init(pCtx);
/* init AES cipher */
sts = ippsAESInit(pKey, keyLen, &CMAC_CIPHER(pCtx), cpSizeofCtx_AES());
if(ippStsNoErr==sts) {
const IppsAESSpec* pAES = &CMAC_CIPHER(pCtx);
/* setup encoder method */
RijnCipher encoder = RIJ_ENCODER(pAES);
int msb;
encoder(CMAC_MAC(pCtx), CMAC_K1(pCtx), RIJ_NR(pAES), RIJ_EKEYS(pAES), RijEncSbox);
/* precompute k1 subkey */
msb = (CMAC_K1(pCtx))[0];
LogicalLeftSift16(CMAC_K1(pCtx),CMAC_K1(pCtx));
(CMAC_K1(pCtx))[MBS_RIJ128-1] ^= (Ipp8u)((0-(msb>>7)) & 0x87); /* ^ Rb changed for constant time execution */
/* precompute k2 subkey */
msb = (CMAC_K1(pCtx))[0];
LogicalLeftSift16(CMAC_K1(pCtx),CMAC_K2(pCtx));
(CMAC_K2(pCtx))[MBS_RIJ128-1] ^= (Ipp8u)((0-(msb>>7)) & 0x87); /* ^ Rb changed for constant time execution */
}
return sts;
}
}
/*F*
// Name: ippsAES_CMACUpdate
//
// Purpose: Updates intermadiate digest based on input stream.
//
// Returns: Reason:
// ippStsNullPtrErr pSrc == NULL
// pCtx == NULL
// ippStsContextMatchErr !VALID_AESCMAC_ID()
// ippStsLengthErr len <0
// ippStsNoErr no errors
//
// Parameters:
// pSrc pointer to the input stream
// len input stream length
// pCtx pointer to the CMAC context
//
*F*/
static
void AES_CMAC_processing(Ipp8u* pDigest, const Ipp8u* pSrc, int processedLen, const IppsAESSpec* pAES)
{
/* setup encoder method */
RijnCipher encoder = RIJ_ENCODER(pAES);
while(processedLen) {
((Ipp32u*)pDigest)[0] ^= ((Ipp32u*)pSrc)[0];
((Ipp32u*)pDigest)[1] ^= ((Ipp32u*)pSrc)[1];
((Ipp32u*)pDigest)[2] ^= ((Ipp32u*)pSrc)[2];
((Ipp32u*)pDigest)[3] ^= ((Ipp32u*)pSrc)[3];
encoder(pDigest, pDigest, RIJ_NR(pAES), RIJ_EKEYS(pAES), RijEncSbox);
pSrc += MBS_RIJ128;
processedLen -= MBS_RIJ128;
}
}
IPPFUN(IppStatus, ippsAES_CMACUpdate,(const Ipp8u* pSrc, int len, IppsAES_CMACState* pCtx))
{
int processedLen;
/* test context pointer */
IPP_BAD_PTR1_RET(pCtx);
/* use aligned context */
pCtx = (IppsAES_CMACState*)( IPP_ALIGNED_PTR(pCtx, AESCMAC_ALIGNMENT) );
/* test ID */
IPP_BADARG_RET(!VALID_AESCMAC_ID(pCtx), ippStsContextMatchErr);
/* test input message and it's length */
IPP_BADARG_RET((len<0 && pSrc), ippStsLengthErr);
/* test source pointer */
IPP_BADARG_RET((len && !pSrc), ippStsNullPtrErr);
if(!len)
return ippStsNoErr;
{
/*
// test internal buffer filling
*/
if(CMAC_INDX(pCtx)) {
/* copy from input stream to the internal buffer as match as possible */
processedLen = IPP_MIN(len, (MBS_RIJ128 - CMAC_INDX(pCtx)));
CopyBlock(pSrc, CMAC_BUFF(pCtx)+CMAC_INDX(pCtx), processedLen);
/* internal buffer filling */
CMAC_INDX(pCtx) += processedLen;
/* update message pointer and length */
pSrc += processedLen;
len -= processedLen;
if(!len)
return ippStsNoErr;
/* update CMAC if buffer full but not the last */
if(MBS_RIJ128==CMAC_INDX(pCtx) ) {
const IppsAESSpec* pAES = &CMAC_CIPHER(pCtx);
/* setup encoder method */
RijnCipher encoder = RIJ_ENCODER(pAES);
XorBlock16(CMAC_BUFF(pCtx), CMAC_MAC(pCtx), CMAC_MAC(pCtx));
encoder(CMAC_MAC(pCtx), CMAC_MAC(pCtx), RIJ_NR(pAES), RIJ_EKEYS(pAES), RijEncSbox);
CMAC_INDX(pCtx) = 0;
}
}
/*
// main part
*/
processedLen = len & ~(MBS_RIJ128-1);
if(!(len & (MBS_RIJ128-1)))
processedLen -= MBS_RIJ128;
if(processedLen) {
const IppsAESSpec* pAES = &CMAC_CIPHER(pCtx);
AES_CMAC_processing(CMAC_MAC(pCtx), pSrc, processedLen, pAES);
/* update message pointer and length */
pSrc += processedLen;
len -= processedLen;
}
/*
// remaind
*/
if(len) {
CopyBlock(pSrc, (Ipp8u*)(&CMAC_BUFF(pCtx)), len);
/* update internal buffer filling */
CMAC_INDX(pCtx) += len;
}
return ippStsNoErr;
}
}
/*F*
// Name: ippsAES_CMACFinal
//
// Purpose: Stop message digesting and return MD.
//
// Returns: Reason:
// ippStsNullPtrErr pMD == NULL
// pCtx == NULL
// ippStsContextMatchErr !VALID_AESCMAC_ID()
// ippStsLengthErr MBS_RIJ128 < mdLen <1
// ippStsNoErr no errors
//
// Parameters:
// pMD pointer to the output message digest
// mdLen requested length of the message digest
// pCtx pointer to the CMAC context
//
*F*/
IPPFUN(IppStatus, ippsAES_CMACFinal,(Ipp8u* pMD, int mdLen, IppsAES_CMACState* pCtx))
{
/* test context pointer and ID */
IPP_BAD_PTR1_RET(pCtx);
/* use aligned context */
pCtx = (IppsAES_CMACState*)( IPP_ALIGNED_PTR(pCtx, AESCMAC_ALIGNMENT) );
IPP_BADARG_RET(!VALID_AESCMAC_ID(pCtx), ippStsContextMatchErr);
/* test DAC pointer */
IPP_BAD_PTR1_RET(pMD);
IPP_BADARG_RET((mdLen<1)||(MBS_RIJ128<mdLen), ippStsLengthErr);
{
const IppsAESSpec* pAES = &CMAC_CIPHER(pCtx);
/* setup encoder method */
RijnCipher encoder = RIJ_ENCODER(pAES);
/* message length is divided by MBS_RIJ128 */
if(MBS_RIJ128==CMAC_INDX(pCtx)) {
XorBlock16(CMAC_BUFF(pCtx), CMAC_K1(pCtx), CMAC_BUFF(pCtx));
}
/* message length isn't divided by MBS_RIJ128 */
else {
PaddBlock(0, CMAC_BUFF(pCtx)+CMAC_INDX(pCtx), MBS_RIJ128-CMAC_INDX(pCtx));
CMAC_BUFF(pCtx)[CMAC_INDX(pCtx)] = 0x80;
XorBlock16(CMAC_BUFF(pCtx), CMAC_K2(pCtx), CMAC_BUFF(pCtx));
}
XorBlock16(CMAC_BUFF(pCtx), CMAC_MAC(pCtx), CMAC_MAC(pCtx));
encoder(CMAC_MAC(pCtx), CMAC_MAC(pCtx), RIJ_NR(pAES), RIJ_EKEYS(pAES), RijEncSbox);
/* return truncated DAC */
CopyBlock(CMAC_MAC(pCtx), pMD, mdLen);
/* re-init context */
init(pCtx);
return ippStsNoErr;
}
}
/*F*
// Name: ippsAES_CMACGetTag
//
// Purpose: computes MD value and could contunue process.
//
// Returns: Reason:
// ippStsNullPtrErr pMD == NULL
// pCtx == NULL
// ippStsContextMatchErr !VALID_AESCMAC_ID()
// ippStsLengthErr MBS_RIJ128 < mdLen <1
// ippStsNoErr no errors
//
// Parameters:
// pMD pointer to the output message digest
// mdLen requested length of the message digest
// pCtx pointer to the CMAC context
//
*F*/
IPPFUN(IppStatus, ippsAES_CMACGetTag,(Ipp8u* pMD, int mdLen, const IppsAES_CMACState* pCtx))
{
/* test context pointer and ID */
IPP_BAD_PTR1_RET(pCtx);
/* use aligned context */
pCtx = (IppsAES_CMACState*)( IPP_ALIGNED_PTR(pCtx, AESCMAC_ALIGNMENT) );
IPP_BADARG_RET(!VALID_AESCMAC_ID(pCtx), ippStsContextMatchErr);
/* test DAC pointer */
IPP_BAD_PTR1_RET(pMD);
IPP_BADARG_RET((mdLen<1)||(MBS_RIJ128<mdLen), ippStsLengthErr);
{
const IppsAESSpec* pAES = &CMAC_CIPHER(pCtx);
/* setup encoder method */
RijnCipher encoder = RIJ_ENCODER(pAES);
Ipp8u locBuffer[MBS_RIJ128];
Ipp8u locMac[MBS_RIJ128];
CopyBlock16(CMAC_BUFF(pCtx), locBuffer);
CopyBlock16(CMAC_MAC(pCtx), locMac);
/* message length is divided by MBS_RIJ128 */
if(MBS_RIJ128==CMAC_INDX(pCtx)) {
XorBlock16(locBuffer, CMAC_K1(pCtx), locBuffer);
}
/* message length isn't divided by MBS_RIJ128 */
else {
PaddBlock(0, locBuffer+CMAC_INDX(pCtx), MBS_RIJ128-CMAC_INDX(pCtx));
locBuffer[CMAC_INDX(pCtx)] = 0x80;
XorBlock16(locBuffer, CMAC_K2(pCtx), locBuffer);
}
XorBlock16(locBuffer, locMac, locMac);
encoder(locMac, locMac, RIJ_NR(pAES), RIJ_EKEYS(pAES), RijEncSbox);
/* return truncated DAC */
CopyBlock(locMac, pMD, mdLen);
return ippStsNoErr;
}
}

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#if !defined(_CP_AESAUTH_GCM_H)
#define _CP_AESAUTH_GCM_H
#include "owndefs.h"
#include "owncp.h"
#include "pcpaesm.h"
#define BLOCK_SIZE (MBS_RIJ128)
/* GCM Hash prototype: GHash = GHash*HKey mod G() */
typedef void (*MulGcm_)(Ipp8u* pGHash, const Ipp8u* pHKey, const void* pParam);
/* GCM Authentication prototype: GHash = (GHash^src[])*HKey mod G() */
typedef void (*Auth_)(Ipp8u* pHash, const Ipp8u* pSrc, int len, const Ipp8u* pHKey, const void* pParam);
/* GCM Encrypt_Authentication prototype */
typedef void (*Encrypt_)(Ipp8u* pDst, const Ipp8u* pSrc, int len, IppsAES_GCMState* pCtx);
/* GCM Authentication_Decrypt prototype */
typedef void (*Decrypt_)(Ipp8u* pDst, const Ipp8u* pSrc, int len, IppsAES_GCMState* pCtx);
typedef enum {
GcmInit,
GcmIVprocessing,
GcmAADprocessing,
GcmTXTprocessing
} GcmState;
struct _cpAES_GCM {
IppCtxId idCtx; /* AES-GCM id */
GcmState state; /* GCM state: Init, IV|AAD|TXT proccessing */
Ipp64u ivLen; /* IV length (bytes) */
Ipp64u aadLen; /* header length (bytes) */
Ipp64u txtLen; /* text length (bytes) */
int bufLen; /* staff buffer length */
__ALIGN16 /* aligned buffers */
Ipp8u counter[BLOCK_SIZE]; /* counter */
Ipp8u ecounter0[BLOCK_SIZE]; /* encrypted initial counter */
Ipp8u ecounter[BLOCK_SIZE]; /* encrypted counter */
Ipp8u ghash[BLOCK_SIZE]; /* ghash accumulator */
MulGcm_ hashFun; /* AES-GCM mul function */
Auth_ authFun; /* authentication function */
Encrypt_ encFun; /* encryption & authentication */
Decrypt_ decFun; /* authentication & decryption */
__ALIGN16 /* aligned AES context */
IppsAESSpec cipher;
__ALIGN16 /* aligned pre-computed data: */
Ipp8u multiplier[BLOCK_SIZE]; /* - (default) hKey */
/* - (ase_ni) hKey*t, (hKey*t)^2, (hKey*t)^4 */
/* - (safe) hKey*(t^i), i=0,...,127 */
};
#define CTR_POS 12
/* alignment */
#define AESGCM_ALIGNMENT (16)
#define PRECOMP_DATA_SIZE_AES_NI_AESGCM (BLOCK_SIZE*4)
#define PRECOMP_DATA_SIZE_FAST2K (BLOCK_SIZE*128)
/*
// Useful macros
*/
#define AESGCM_ID(stt) ((stt)->idCtx)
#define AESGCM_STATE(stt) ((stt)->state)
#define AESGCM_IV_LEN(stt) ((stt)->ivLen)
#define AESGCM_AAD_LEN(stt) ((stt)->aadLen)
#define AESGCM_TXT_LEN(stt) ((stt)->txtLen)
#define AESGCM_BUFLEN(stt) ((stt)->bufLen)
#define AESGCM_COUNTER(stt) ((stt)->counter)
#define AESGCM_ECOUNTER0(stt) ((stt)->ecounter0)
#define AESGCM_ECOUNTER(stt) ((stt)->ecounter)
#define AESGCM_GHASH(stt) ((stt)->ghash)
#define AESGCM_HASH(stt) ((stt)->hashFun)
#define AESGCM_AUTH(stt) ((stt)->authFun)
#define AESGCM_ENC(stt) ((stt)->encFun)
#define AESGCM_DEC(stt) ((stt)->decFun)
#define AESGCM_CIPHER(stt) (IppsAESSpec*)(&((stt)->cipher))
#define AESGCM_HKEY(stt) ((stt)->multiplier)
#define AESGCM_CPWR(stt) ((stt)->multiplier)
#define AES_GCM_MTBL(stt) ((stt)->multiplier)
#define AESGCM_VALID_ID(stt) (AESGCM_ID((stt))==idCtxAESGCM)
__INLINE void IncrementCounter32(Ipp8u* pCtr)
{
int i;
for(i=BLOCK_SIZE-1; i>=CTR_POS && 0==(Ipp8u)(++pCtr[i]); i--) ;
}
void AesGcmPrecompute_table2K(Ipp8u* pPrecomputeData, const Ipp8u* pHKey);
void AesGcmMulGcm_table2K(Ipp8u* pGhash, const Ipp8u* pHkey, const void* pParam);
void AesGcmAuth_table2K(Ipp8u* pGhash, const Ipp8u* pSrc, int len, const Ipp8u* pHkey, const void* pParam);
void wrpAesGcmEnc_table2K(Ipp8u* pDst, const Ipp8u* pSrc, int len, IppsAES_GCMState* pCtx);
void wrpAesGcmDec_table2K(Ipp8u* pDst, const Ipp8u* pSrc, int len, IppsAES_GCMState* pCtx);
extern const Ipp16u AesGcmConst_table[256]; /* precomputed reduction table */
#endif /* _CP_AESAUTH_GCM_H*/

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@ -1,731 +0,0 @@
/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "owndefs.h"
#include "owncp.h"
#include "pcpaesauthgcm.h"
#include "pcptool.h"
#include "pcprijtables.h"
/*F*
// Name: ippsAES_GCMGetSize
//
// Purpose: Returns size of AES_GCM state (in bytes).
//
// Returns: Reason:
// ippStsNullPtrErr pSize == NULL
// ippStsNoErr no errors
//
// Parameters:
// pSize pointer to size of context
//
*F*/
static int cpSizeofCtx_AESGCM(void)
{
int precomp_size;
precomp_size = PRECOMP_DATA_SIZE_FAST2K;
/* decrease precomp_size as soon as BLOCK_SIZE bytes already reserved in context */
precomp_size -= BLOCK_SIZE;
return sizeof(IppsAES_GCMState)
+precomp_size
+AESGCM_ALIGNMENT-1;
}
IPPFUN(IppStatus, ippsAES_GCMGetSize,(int* pSize))
{
/* test size's pointer */
IPP_BAD_PTR1_RET(pSize);
*pSize = cpSizeofCtx_AESGCM();
return ippStsNoErr;
}
/*F*
// Name: ippsAES_GCMReset
//
// Purpose: Resets AES_GCM context.
//
// Returns: Reason:
// ippStsNullPtrErr pState== NULL
// ippStsContextMatchErr pState points on invalid context
// ippStsNoErr no errors
//
// Parameters:
// pState pointer to the context
//
*F*/
IPPFUN(IppStatus, ippsAES_GCMReset,(IppsAES_GCMState* pState))
{
/* test pState pointer */
IPP_BAD_PTR1_RET(pState);
/* use aligned context */
pState = (IppsAES_GCMState*)( IPP_ALIGNED_PTR(pState, AESGCM_ALIGNMENT) );
/* test context validity */
IPP_BADARG_RET(!AESGCM_VALID_ID(pState), ippStsContextMatchErr);
/* reset GCM */
AESGCM_STATE(pState) = GcmInit;
AESGCM_IV_LEN(pState) = CONST_64(0);
AESGCM_AAD_LEN(pState) = CONST_64(0);
AESGCM_TXT_LEN(pState) = CONST_64(0);
AESGCM_BUFLEN(pState) = 0;
PaddBlock(0, AESGCM_COUNTER(pState), BLOCK_SIZE);
PaddBlock(0, AESGCM_ECOUNTER(pState), BLOCK_SIZE);
PaddBlock(0, AESGCM_ECOUNTER0(pState), BLOCK_SIZE);
PaddBlock(0, AESGCM_GHASH(pState), BLOCK_SIZE);
return ippStsNoErr;
}
/*F*
// Name: ippsAES_GCMInit
//
// Purpose: Init AES_GCM context for future usage.
//
// Returns: Reason:
// ippStsNullPtrErr pState == NULL
// ippStsMemAllocErr size of buffer is not match fro operation
// ippStsLengthErr keyLen != 16 &&
// != 24 &&
// != 32
// ippStsNoErr no errors
//
// Parameters:
// pKey pointer to the secret key
// keyLen length of secret key
// pState pointer to the AES-GCM context
// ctxSize available size (in bytes) of buffer above
//
*F*/
IPPFUN(IppStatus, ippsAES_GCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_GCMState* pState, int ctxSize))
{
/* test pCtx pointer */
IPP_BAD_PTR1_RET(pState);
/* test available size of context buffer */
IPP_BADARG_RET(ctxSize<cpSizeofCtx_AESGCM(), ippStsMemAllocErr);
/* use aligned context */
pState = (IppsAES_GCMState*)( IPP_ALIGNED_PTR(pState, AESGCM_ALIGNMENT) );
/* set and clear GCM context */
AESGCM_ID(pState) = idCtxAESGCM;
ippsAES_GCMReset(pState);
/* init cipher */
{
IppStatus sts = ippsAESInit(pKey, keyLen, AESGCM_CIPHER(pState), cpSizeofCtx_AES());
if(ippStsNoErr!=sts)
return sts;
}
/* set up:
// - ghash function
// - authentication function
*/
AESGCM_HASH(pState) = AesGcmMulGcm_table2K;
AESGCM_AUTH(pState) = AesGcmAuth_table2K;
AESGCM_ENC(pState) = wrpAesGcmEnc_table2K;
AESGCM_DEC(pState) = wrpAesGcmDec_table2K;
/* precomputations (for constant multiplier(s)) */
{
IppsAESSpec* pAES = AESGCM_CIPHER(pState);
RijnCipher encoder = RIJ_ENCODER(pAES);
/* multiplier c = Enc({0}) */
PaddBlock(0, AESGCM_HKEY(pState), BLOCK_SIZE);
encoder(AESGCM_HKEY(pState), AESGCM_HKEY(pState), RIJ_NR(pAES), RIJ_EKEYS(pAES), RijEncSbox);
}
AesGcmPrecompute_table2K(AES_GCM_MTBL(pState), AESGCM_HKEY(pState));
return ippStsNoErr;
}
/*F*
// Name: ippsAES_GCMProcessIV
//
// Purpose: IV processing.
//
// Returns: Reason:
// ippStsNullPtrErr pState == NULL
// pIV ==NULL && ivLen>0
// ippStsContextMatchErr !AESGCM_VALID_ID()
// ippStsLengthErr ivLen <0
// ippStsBadArgErr illegal sequence call
// ippStsNoErr no errors
//
// Parameters:
// pIV pointer to the IV
// ivLen length of IV (it could be 0)
// pState pointer to the context
//
*F*/
IPPFUN(IppStatus, ippsAES_GCMProcessIV,(const Ipp8u* pIV, int ivLen, IppsAES_GCMState* pState))
{
/* test pState pointer */
IPP_BAD_PTR1_RET(pState);
/* test IV pointer and length */
IPP_BADARG_RET(ivLen && !pIV, ippStsNullPtrErr);
IPP_BADARG_RET(ivLen<0, ippStsLengthErr);
/* use aligned context */
pState = (IppsAES_GCMState*)( IPP_ALIGNED_PTR(pState, AESGCM_ALIGNMENT) );
/* test context validity */
IPP_BADARG_RET(!AESGCM_VALID_ID(pState), ippStsContextMatchErr);
IPP_BADARG_RET(!(GcmInit==AESGCM_STATE(pState) || GcmIVprocessing==AESGCM_STATE(pState)), ippStsBadArgErr);
/* switch IVprocessing on */
AESGCM_STATE(pState) = GcmIVprocessing;
/* test if buffer is not empty */
if(AESGCM_BUFLEN(pState)) {
int locLen = IPP_MIN(ivLen, BLOCK_SIZE-AESGCM_BUFLEN(pState));
XorBlock(pIV, AESGCM_COUNTER(pState)+AESGCM_BUFLEN(pState), AESGCM_COUNTER(pState)+AESGCM_BUFLEN(pState), locLen);
AESGCM_BUFLEN(pState) += locLen;
/* if buffer full */
if(BLOCK_SIZE==AESGCM_BUFLEN(pState)) {
MulGcm_ ghashFunc = AESGCM_HASH(pState);
ghashFunc(AESGCM_COUNTER(pState), AESGCM_HKEY(pState), AesGcmConst_table);
AESGCM_BUFLEN(pState) = 0;
}
AESGCM_IV_LEN(pState) += locLen;
pIV += locLen;
ivLen -= locLen;
}
/* process main part of IV */
{
int lenBlks = ivLen & (-BLOCK_SIZE);
if(lenBlks) {
Auth_ authFunc = AESGCM_AUTH(pState);
authFunc(AESGCM_COUNTER(pState), pIV, lenBlks, AESGCM_HKEY(pState), AesGcmConst_table);
AESGCM_IV_LEN(pState) += lenBlks;
pIV += lenBlks;
ivLen -= lenBlks;
}
}
/* copy the rest of IV into the buffer */
if(ivLen) {
XorBlock(pIV, AESGCM_COUNTER(pState), AESGCM_COUNTER(pState), ivLen);
AESGCM_IV_LEN(pState) += ivLen;
AESGCM_BUFLEN(pState) += ivLen;
}
return ippStsNoErr;
}
/*F*
// Name: ippsAES_GCMProcessAAD
//
// Purpose: AAD processing.
//
// Returns: Reason:
// ippStsNullPtrErr pState == NULL
// pAAD == NULL, aadLen>0
// ippStsContextMatchErr !AESGCM_VALID_ID()
// ippStsLengthErr aadLen <0
// ippStsBadArgErr illegal sequence call
// ippStsNoErr no errors
//
// Parameters:
// pAAD pointer to the AAD
// aadlen length of AAD (it could be 0)
// pState pointer to the context
//
*F*/
IPPFUN(IppStatus, ippsAES_GCMProcessAAD,(const Ipp8u* pAAD, int aadLen, IppsAES_GCMState* pState))
{
/* test pState pointer */
IPP_BAD_PTR1_RET(pState);
/* use aligned context */
pState = (IppsAES_GCMState*)( IPP_ALIGNED_PTR(pState, AESGCM_ALIGNMENT) );
/* test if context is valid */
IPP_BADARG_RET(!AESGCM_VALID_ID(pState), ippStsContextMatchErr);
/* test AAD pointer and length */
IPP_BADARG_RET(aadLen && !pAAD, ippStsNullPtrErr);
IPP_BADARG_RET(aadLen<0, ippStsLengthErr);
IPP_BADARG_RET(!(GcmIVprocessing==AESGCM_STATE(pState) || GcmAADprocessing==AESGCM_STATE(pState)), ippStsBadArgErr);
{
/* get method */
MulGcm_ hashFunc = AESGCM_HASH(pState);
if( GcmIVprocessing==AESGCM_STATE(pState) ) {
IPP_BADARG_RET(0==AESGCM_IV_LEN(pState), ippStsBadArgErr);
/* complete IV processing */
if(CTR_POS==AESGCM_IV_LEN(pState)) {
/* apply special format if IV length is 12 bytes */
AESGCM_COUNTER(pState)[12] = 0;
AESGCM_COUNTER(pState)[13] = 0;
AESGCM_COUNTER(pState)[14] = 0;
AESGCM_COUNTER(pState)[15] = 1;
}
else {
/* process the rest of IV */
if(AESGCM_BUFLEN(pState))
hashFunc(AESGCM_COUNTER(pState), AESGCM_HKEY(pState), AesGcmConst_table);
/* add IV bit length */
{
Ipp64u ivBitLen = AESGCM_IV_LEN(pState)*BYTESIZE;
Ipp8u tmp[BLOCK_SIZE];
PaddBlock(0, tmp, BLOCK_SIZE-8);
U32_TO_HSTRING(tmp+8, HIDWORD(ivBitLen));
U32_TO_HSTRING(tmp+12, LODWORD(ivBitLen));
XorBlock16(tmp, AESGCM_COUNTER(pState), AESGCM_COUNTER(pState));
hashFunc(AESGCM_COUNTER(pState), AESGCM_HKEY(pState), AesGcmConst_table);
}
}
/* prepare initial counter */
{
IppsAESSpec* pAES = AESGCM_CIPHER(pState);
RijnCipher encoder = RIJ_ENCODER(pAES);
encoder(AESGCM_COUNTER(pState), AESGCM_ECOUNTER0(pState), RIJ_NR(pAES), RIJ_EKEYS(pAES), RijEncSbox);
}
/* switch mode and init counters */
AESGCM_STATE(pState) = GcmAADprocessing;
AESGCM_AAD_LEN(pState) = CONST_64(0);
AESGCM_BUFLEN(pState) = 0;
}
/*
// AAD processing
*/
/* test if buffer is not empty */
if(AESGCM_BUFLEN(pState)) {
int locLen = IPP_MIN(aadLen, BLOCK_SIZE-AESGCM_BUFLEN(pState));
XorBlock(pAAD, AESGCM_GHASH(pState)+AESGCM_BUFLEN(pState), AESGCM_GHASH(pState)+AESGCM_BUFLEN(pState), locLen);
AESGCM_BUFLEN(pState) += locLen;
/* if buffer full */
if(BLOCK_SIZE==AESGCM_BUFLEN(pState)) {
hashFunc(AESGCM_GHASH(pState), AESGCM_HKEY(pState), AesGcmConst_table);
AESGCM_BUFLEN(pState) = 0;
}
AESGCM_AAD_LEN(pState) += locLen;
pAAD += locLen;
aadLen -= locLen;
}
/* process main part of AAD */
{
int lenBlks = aadLen & (-BLOCK_SIZE);
if(lenBlks) {
Auth_ authFunc = AESGCM_AUTH(pState);
authFunc(AESGCM_GHASH(pState), pAAD, lenBlks, AESGCM_HKEY(pState), AesGcmConst_table);
AESGCM_AAD_LEN(pState) += lenBlks;
pAAD += lenBlks;
aadLen -= lenBlks;
}
}
/* copy the rest of AAD into the buffer */
if(aadLen) {
XorBlock(pAAD, AESGCM_GHASH(pState), AESGCM_GHASH(pState), aadLen);
AESGCM_AAD_LEN(pState) += aadLen;
AESGCM_BUFLEN(pState) = aadLen;
}
return ippStsNoErr;
}
}
/*F*
// Name: ippsAES_GCMStart
//
// Purpose: Start the process of encryption or decryption and authentication tag generation.
//
// Returns: Reason:
// ippStsNullPtrErr pState == NULL
// pIV == NULL, ivLen>0
// pAAD == NULL, aadLen>0
// ippStsContextMatchErr !AESGCM_VALID_ID()
// ippStsLengthErr ivLen < 0
// aadLen < 0
// ippStsNoErr no errors
//
// Parameters:
// pIV pointer to the IV (nonce)
// ivLen length of the IV in bytes
// pAAD pointer to the Addition Authenticated Data (header)
// aadLen length of the AAD in bytes
// pState pointer to the AES-GCM state
//
*F*/
IPPFUN(IppStatus, ippsAES_GCMStart,(const Ipp8u* pIV, int ivLen,
const Ipp8u* pAAD, int aadLen,
IppsAES_GCMState* pState))
{
IppStatus sts = ippsAES_GCMReset(pState);
if(ippStsNoErr==sts)
sts = ippsAES_GCMProcessIV(pIV, ivLen, pState);
if(ippStsNoErr==sts)
sts = ippsAES_GCMProcessAAD(pAAD, aadLen, pState);
return sts;
}
/*F*
// Name: ippsAES_GCMEncrypt
//
// Purpose: Encrypts a data buffer in the GCM mode.
//
// Returns: Reason:
// ippStsNullPtrErr pSrc == NULL
// pDst == NULL
// pState == NULL
// ippStsContextMatchErr !AESGCM_VALID_ID()
// ippStsLengthErr txtLen<0
// ippStsNoErr no errors
//
// Parameters:
// pSrc Pointer to plaintext.
// pDst Pointer to ciphertext.
// len Length of the plaintext and ciphertext in bytes
// pState pointer to the context
//
*F*/
IPPFUN(IppStatus, ippsAES_GCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int txtLen,
IppsAES_GCMState* pState))
{
/* test pState pointer */
IPP_BAD_PTR1_RET(pState);
/* use aligned context */
pState = (IppsAES_GCMState*)( IPP_ALIGNED_PTR(pState, AESGCM_ALIGNMENT) );
/* test state ID */
IPP_BADARG_RET(!AESGCM_VALID_ID(pState), ippStsContextMatchErr);
/* test context validity */
IPP_BADARG_RET(!(GcmAADprocessing==AESGCM_STATE(pState) || GcmTXTprocessing==AESGCM_STATE(pState)), ippStsBadArgErr);
/* test text pointers and length */
IPP_BAD_PTR2_RET(pSrc, pDst);
IPP_BADARG_RET(txtLen<0, ippStsLengthErr);
{
/* get method */
IppsAESSpec* pAES = AESGCM_CIPHER(pState);
RijnCipher encoder = RIJ_ENCODER(pAES);
MulGcm_ hashFunc = AESGCM_HASH(pState);
if( GcmAADprocessing==AESGCM_STATE(pState) ) {
/* complete AAD processing */
if(AESGCM_BUFLEN(pState))
hashFunc(AESGCM_GHASH(pState), AESGCM_HKEY(pState), AesGcmConst_table);
/* increment counter block */
IncrementCounter32(AESGCM_COUNTER(pState));
/* and encrypt counter */
encoder(AESGCM_COUNTER(pState), AESGCM_ECOUNTER(pState), RIJ_NR(pAES), RIJ_EKEYS(pAES), RijEncSbox);
/* switch mode and init counters */
AESGCM_STATE(pState) = GcmTXTprocessing;
AESGCM_TXT_LEN(pState) = CONST_64(0);
AESGCM_BUFLEN(pState) = 0;
}
/*
// process text (encrypt and authenticate)
*/
/* process partial block */
if(AESGCM_BUFLEN(pState)) {
int locLen = IPP_MIN(txtLen, BLOCK_SIZE-AESGCM_BUFLEN(pState));
/* ctr encryption */
XorBlock(pSrc, AESGCM_ECOUNTER(pState)+AESGCM_BUFLEN(pState), pDst, locLen);
/* authentication */
XorBlock(pDst, AESGCM_GHASH(pState)+AESGCM_BUFLEN(pState), AESGCM_GHASH(pState)+AESGCM_BUFLEN(pState), locLen);
AESGCM_BUFLEN(pState) += locLen;
AESGCM_TXT_LEN(pState) += locLen;
pSrc += locLen;
pDst += locLen;
txtLen -= locLen;
/* if buffer full */
if(BLOCK_SIZE==AESGCM_BUFLEN(pState)) {
/* hash buffer */
hashFunc(AESGCM_GHASH(pState), AESGCM_HKEY(pState), AesGcmConst_table);
AESGCM_BUFLEN(pState) = 0;
/* increment counter block */
IncrementCounter32(AESGCM_COUNTER(pState));
/* and encrypt counter */
encoder(AESGCM_COUNTER(pState), AESGCM_ECOUNTER(pState), RIJ_NR(pAES), RIJ_EKEYS(pAES), RijEncSbox);
}
}
/* process the main part of text */
{
int lenBlks = txtLen & (-BLOCK_SIZE);
if(lenBlks) {
Encrypt_ encFunc = AESGCM_ENC(pState);
encFunc(pDst, pSrc, lenBlks, pState);
AESGCM_TXT_LEN(pState) += lenBlks;
pSrc += lenBlks;
pDst += lenBlks;
txtLen -= lenBlks;
}
}
/* process the rest of text */
if(txtLen) {
XorBlock(pSrc, AESGCM_ECOUNTER(pState)+AESGCM_BUFLEN(pState), pDst, txtLen);
XorBlock(pDst, AESGCM_GHASH(pState)+AESGCM_BUFLEN(pState), AESGCM_GHASH(pState)+AESGCM_BUFLEN(pState), txtLen);
AESGCM_BUFLEN(pState) += txtLen;
AESGCM_TXT_LEN(pState) += txtLen;
}
return ippStsNoErr;
}
}
/*F*
// Name: ippsAES_GCMDecrypt
//
// Purpose: Decrypts a data buffer in the GCM mode.
//
// Returns: Reason:
// ippStsNullPtrErr pSrc == NULL
// pDst == NULL
// pState == NULL
// ippStsContextMatchErr !AESGCM_VALID_ID()
// ippStsLengthErr txtLen<0
// ippStsNoErr no errors
//
// Parameters:
// pSrc Pointer to ciphertext.
// pDst Pointer to plaintext.
// len Length of the plaintext and ciphertext in bytes
// pState pointer to the context
//
*F*/
IPPFUN(IppStatus, ippsAES_GCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int txtLen, IppsAES_GCMState* pState))
{
/* test pState pointer */
IPP_BAD_PTR1_RET(pState);
/* use aligned context */
pState = (IppsAES_GCMState*)( IPP_ALIGNED_PTR(pState, AESGCM_ALIGNMENT) );
/* test state ID */
IPP_BADARG_RET(!AESGCM_VALID_ID(pState), ippStsContextMatchErr);
/* test context validity */
IPP_BADARG_RET(!(GcmAADprocessing==AESGCM_STATE(pState) || GcmTXTprocessing==AESGCM_STATE(pState)), ippStsBadArgErr);
/* test text pointers and length */
IPP_BAD_PTR2_RET(pSrc, pDst);
IPP_BADARG_RET(txtLen<0, ippStsLengthErr);
{
/* get method */
IppsAESSpec* pAES = AESGCM_CIPHER(pState);
RijnCipher encoder = RIJ_ENCODER(pAES);
MulGcm_ hashFunc = AESGCM_HASH(pState);
if( GcmAADprocessing==AESGCM_STATE(pState) ) {
/* complete AAD processing */
if(AESGCM_BUFLEN(pState))
hashFunc(AESGCM_GHASH(pState), AESGCM_HKEY(pState), AesGcmConst_table);
/* increment counter block */
IncrementCounter32(AESGCM_COUNTER(pState));
/* and encrypt counter */
encoder(AESGCM_COUNTER(pState), AESGCM_ECOUNTER(pState), RIJ_NR(pAES), RIJ_EKEYS(pAES), RijEncSbox);
/* switch mode and init counters */
AESGCM_BUFLEN(pState) = 0;
AESGCM_TXT_LEN(pState) = CONST_64(0);
AESGCM_STATE(pState) = GcmTXTprocessing;
}
/*
// process text (authenticate and decrypt )
*/
/* process partial block */
if(AESGCM_BUFLEN(pState)) {
int locLen = IPP_MIN(txtLen, BLOCK_SIZE-AESGCM_BUFLEN(pState));
/* authentication */
XorBlock(pSrc, AESGCM_GHASH(pState)+AESGCM_BUFLEN(pState), AESGCM_GHASH(pState)+AESGCM_BUFLEN(pState), locLen);
/* ctr decryption */
XorBlock(pSrc, AESGCM_ECOUNTER(pState)+AESGCM_BUFLEN(pState), pDst, locLen);
AESGCM_BUFLEN(pState) += locLen;
AESGCM_TXT_LEN(pState) += locLen;
pSrc += locLen;
pDst += locLen;
txtLen -= locLen;
/* if buffer full */
if(BLOCK_SIZE==AESGCM_BUFLEN(pState)) {
/* hash buffer */
hashFunc(AESGCM_GHASH(pState), AESGCM_HKEY(pState), AesGcmConst_table);
AESGCM_BUFLEN(pState) = 0;
/* increment counter block */
IncrementCounter32(AESGCM_COUNTER(pState));
/* and encrypt counter */
encoder(AESGCM_COUNTER(pState), AESGCM_ECOUNTER(pState), RIJ_NR(pAES), RIJ_EKEYS(pAES), RijEncSbox);
}
}
/* process the main part of text */
{
int lenBlks = txtLen & (-BLOCK_SIZE);
if(lenBlks) {
Decrypt_ decFunc = AESGCM_DEC(pState);
decFunc(pDst, pSrc, lenBlks, pState);
AESGCM_TXT_LEN(pState) += lenBlks;
pSrc += lenBlks;
pDst += lenBlks;
txtLen -= lenBlks;
}
}
/* process the rest of text */
if(txtLen) {
/* ctr encryption */
XorBlock(pSrc, AESGCM_GHASH(pState)+AESGCM_BUFLEN(pState), AESGCM_GHASH(pState)+AESGCM_BUFLEN(pState), txtLen);
XorBlock(pSrc, AESGCM_ECOUNTER(pState)+AESGCM_BUFLEN(pState), pDst, txtLen);
AESGCM_BUFLEN(pState) += txtLen;
AESGCM_TXT_LEN(pState) += txtLen;
}
return ippStsNoErr;
}
}
/*F*
// Name: ippsAES_GCMGetTag
//
// Purpose: Generates authentication tag in the GCM mode.
//
// Returns: Reason:
// ippStsNullPtrErr pDstTag == NULL
// pState == NULL
// ippStsLengthErr tagLen<=0 || tagLen>16
// ippStsContextMatchErr !AESGCM_VALID_ID()
// ippStsNoErr no errors
//
// Parameters:
// pDstTag pointer to the authentication tag.
// tagLen length of the authentication tag *pDstTag in bytes
// pState pointer to the context
//
*F*/
IPPFUN(IppStatus, ippsAES_GCMGetTag,(Ipp8u* pTag, int tagLen, const IppsAES_GCMState* pState))
{
/* test State pointer */
IPP_BAD_PTR1_RET(pState);
/* use aligned context */
pState = (IppsAES_GCMState*)( IPP_ALIGNED_PTR(pState, AESGCM_ALIGNMENT) );
/* test state ID */
IPP_BADARG_RET(!AESGCM_VALID_ID(pState), ippStsContextMatchErr);
/* test tag pointer and length */
IPP_BAD_PTR1_RET(pTag);
IPP_BADARG_RET(tagLen<=0 || tagLen>BLOCK_SIZE, ippStsLengthErr);
{
/* get method */
MulGcm_ hashFunc = AESGCM_HASH(pState);
__ALIGN16 Ipp8u tmpHash[BLOCK_SIZE];
Ipp8u tmpCntr[BLOCK_SIZE];
/* local copy of AAD and text counters (in bits) */
Ipp64u aadBitLen = AESGCM_AAD_LEN(pState)*BYTESIZE;
Ipp64u txtBitLen = AESGCM_TXT_LEN(pState)*BYTESIZE;
/* do local copy of ghash */
CopyBlock16(AESGCM_GHASH(pState), tmpHash);
/* complete text processing */
if(AESGCM_BUFLEN(pState)) {
hashFunc(tmpHash, AESGCM_HKEY(pState), AesGcmConst_table);
}
/* process lengths of AAD and text */
U32_TO_HSTRING(tmpCntr, HIDWORD(aadBitLen));
U32_TO_HSTRING(tmpCntr+4, LODWORD(aadBitLen));
U32_TO_HSTRING(tmpCntr+8, HIDWORD(txtBitLen));
U32_TO_HSTRING(tmpCntr+12,LODWORD(txtBitLen));
XorBlock16(tmpHash, tmpCntr, tmpHash);
hashFunc(tmpHash, AESGCM_HKEY(pState), AesGcmConst_table);
/* add encrypted initial counter */
XorBlock16(tmpHash, AESGCM_ECOUNTER0(pState), tmpHash);
/* return tag of required lenth */
CopyBlock(tmpHash, pTag, tagLen);
return ippStsNoErr;
}
}

52
sgx-jvm/linux-sgx/external/crypto_px/sources/ippcp/src/pcpaesgcmtableca.c vendored
View File

@ -1,52 +0,0 @@
/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "owndefs.h"
#include "owncp.h"
const Ipp16u AesGcmConst_table[256] = {
0x0000, 0xc201, 0x8403, 0x4602, 0x0807, 0xca06, 0x8c04, 0x4e05, 0x100e, 0xd20f, 0x940d, 0x560c, 0x1809, 0xda08, 0x9c0a, 0x5e0b,
0x201c, 0xe21d, 0xa41f, 0x661e, 0x281b, 0xea1a, 0xac18, 0x6e19, 0x3012, 0xf213, 0xb411, 0x7610, 0x3815, 0xfa14, 0xbc16, 0x7e17,
0x4038, 0x8239, 0xc43b, 0x063a, 0x483f, 0x8a3e, 0xcc3c, 0x0e3d, 0x5036, 0x9237, 0xd435, 0x1634, 0x5831, 0x9a30, 0xdc32, 0x1e33,
0x6024, 0xa225, 0xe427, 0x2626, 0x6823, 0xaa22, 0xec20, 0x2e21, 0x702a, 0xb22b, 0xf429, 0x3628, 0x782d, 0xba2c, 0xfc2e, 0x3e2f,
0x8070, 0x4271, 0x0473, 0xc672, 0x8877, 0x4a76, 0x0c74, 0xce75, 0x907e, 0x527f, 0x147d, 0xd67c, 0x9879, 0x5a78, 0x1c7a, 0xde7b,
0xa06c, 0x626d, 0x246f, 0xe66e, 0xa86b, 0x6a6a, 0x2c68, 0xee69, 0xb062, 0x7263, 0x3461, 0xf660, 0xb865, 0x7a64, 0x3c66, 0xfe67,
0xc048, 0x0249, 0x444b, 0x864a, 0xc84f, 0x0a4e, 0x4c4c, 0x8e4d, 0xd046, 0x1247, 0x5445, 0x9644, 0xd841, 0x1a40, 0x5c42, 0x9e43,
0xe054, 0x2255, 0x6457, 0xa656, 0xe853, 0x2a52, 0x6c50, 0xae51, 0xf05a, 0x325b, 0x7459, 0xb658, 0xf85d, 0x3a5c, 0x7c5e, 0xbe5f,
0x00e1, 0xc2e0, 0x84e2, 0x46e3, 0x08e6, 0xcae7, 0x8ce5, 0x4ee4, 0x10ef, 0xd2ee, 0x94ec, 0x56ed, 0x18e8, 0xdae9, 0x9ceb, 0x5eea,
0x20fd, 0xe2fc, 0xa4fe, 0x66ff, 0x28fa, 0xeafb, 0xacf9, 0x6ef8, 0x30f3, 0xf2f2, 0xb4f0, 0x76f1, 0x38f4, 0xfaf5, 0xbcf7, 0x7ef6,
0x40d9, 0x82d8, 0xc4da, 0x06db, 0x48de, 0x8adf, 0xccdd, 0x0edc, 0x50d7, 0x92d6, 0xd4d4, 0x16d5, 0x58d0, 0x9ad1, 0xdcd3, 0x1ed2,
0x60c5, 0xa2c4, 0xe4c6, 0x26c7, 0x68c2, 0xaac3, 0xecc1, 0x2ec0, 0x70cb, 0xb2ca, 0xf4c8, 0x36c9, 0x78cc, 0xbacd, 0xfccf, 0x3ece,
0x8091, 0x4290, 0x0492, 0xc693, 0x8896, 0x4a97, 0x0c95, 0xce94, 0x909f, 0x529e, 0x149c, 0xd69d, 0x9898, 0x5a99, 0x1c9b, 0xde9a,
0xa08d, 0x628c, 0x248e, 0xe68f, 0xa88a, 0x6a8b, 0x2c89, 0xee88, 0xb083, 0x7282, 0x3480, 0xf681, 0xb884, 0x7a85, 0x3c87, 0xfe86,
0xc0a9, 0x02a8, 0x44aa, 0x86ab, 0xc8ae, 0x0aaf, 0x4cad, 0x8eac, 0xd0a7, 0x12a6, 0x54a4, 0x96a5, 0xd8a0, 0x1aa1, 0x5ca3, 0x9ea2,
0xe0b5, 0x22b4, 0x64b6, 0xa6b7, 0xe8b2, 0x2ab3, 0x6cb1, 0xaeb0, 0xf0bb, 0x32ba, 0x74b8, 0xb6b9, 0xf8bc, 0x3abd, 0x7cbf, 0xbebe
};

229
sgx-jvm/linux-sgx/external/crypto_px/sources/ippcp/src/pcpaesgcmtbl2kca.c vendored
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@ -1,229 +0,0 @@
/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "owndefs.h"
#include "owncp.h"
#include "pcpaesauthgcm.h"
#include "pcptool.h"
#include "pcprijtables.h"
/*
// AES-GCM precomputations.
*/
static void RightShiftBlock16(Ipp8u* pBlock)
{
Ipp8u v0 = 0;
int i;
for(i=0; i<16; i++) {
Ipp8u v1 = pBlock[i];
Ipp8u tmp = (Ipp8u)( (v1>>1) | (v0<<7) );
pBlock[i] = tmp;
v0 = v1;
}
}
void AesGcmPrecompute_table2K(Ipp8u* pPrecomputeData, const Ipp8u* pHKey)
{
Ipp8u t[BLOCK_SIZE];
int n;
CopyBlock16(pHKey, t);
for(n=0; n<128-24; n++) {
/* get msb */
int hBit = t[15]&1;
int k = n%32;
if(k<4) {
CopyBlock16(t, pPrecomputeData +1024 +(n/32)*256 +(Ipp32u)(1<<(7-k)));
}
else if(k<8) {
CopyBlock16(t, pPrecomputeData +(n/32)*256 +(Ipp32u)(1<<(11-k)));
}
/* shift */
RightShiftBlock16(t);
/* xor if msb=1 */
if(hBit)
t[0] ^= 0xe1;
}
for(n=0; n<4; n++) {
int m, k;
XorBlock16(pPrecomputeData +n*256, pPrecomputeData +n*256, pPrecomputeData +n*256);
XorBlock16(pPrecomputeData +1024 +n*256, pPrecomputeData +1024 +n*256, pPrecomputeData +1024 +n*256);
for(m=2; m<=8; m*=2)
for(k=1; k<m; k++) {
XorBlock16(pPrecomputeData +n*256+m*16, pPrecomputeData +n*256+k*16, pPrecomputeData +n*256 +(m+k)*16);
XorBlock16(pPrecomputeData +1024 +n*256+m*16, pPrecomputeData +1024 +n*256+k*16, pPrecomputeData +1024 +n*256 +(m+k)*16);
}
}
}
/*
// AesGcmMulGcm_def|safe(Ipp8u* pGhash, const Ipp8u* pHKey)
//
// Ghash = Ghash * HKey mod G()
*/
void AesGcmMulGcm_table2K(Ipp8u* pGhash, const Ipp8u* pPrecomputeData, const void* pParam)
{
__ALIGN16 Ipp8u t5[BLOCK_SIZE];
__ALIGN16 Ipp8u t4[BLOCK_SIZE];
__ALIGN16 Ipp8u t3[BLOCK_SIZE];
__ALIGN16 Ipp8u t2[BLOCK_SIZE];
int nw;
Ipp32u a;
UNREFERENCED_PARAMETER(pParam);
XorBlock16(t5, t5, t5);
XorBlock16(t4, t4, t4);
XorBlock16(t3, t3, t3);
XorBlock16(t2, t2, t2);
for(nw=0; nw<4; nw++) {
Ipp32u hashdw = ((Ipp32u*)pGhash)[nw];
a = hashdw & 0xf0f0f0f0;
XorBlock16(t5, pPrecomputeData+1024+EBYTE(a,1)+256*nw, t5);
XorBlock16(t4, pPrecomputeData+1024+EBYTE(a,0)+256*nw, t4);
XorBlock16(t3, pPrecomputeData+1024+EBYTE(a,3)+256*nw, t3);
XorBlock16(t2, pPrecomputeData+1024+EBYTE(a,2)+256*nw, t2);
a = (hashdw<<4) & 0xf0f0f0f0;
XorBlock16(t5, pPrecomputeData+EBYTE(a,1)+256*nw, t5);
XorBlock16(t4, pPrecomputeData+EBYTE(a,0)+256*nw, t4);
XorBlock16(t3, pPrecomputeData+EBYTE(a,3)+256*nw, t3);
XorBlock16(t2, pPrecomputeData+EBYTE(a,2)+256*nw, t2);
}
XorBlock(t2+1, t3, t2+1, BLOCK_SIZE-1);
XorBlock(t5+1, t2, t5+1, BLOCK_SIZE-1);
XorBlock(t4+1, t5, t4+1, BLOCK_SIZE-1);
nw = t3[BLOCK_SIZE-1];
a = (Ipp32u)AesGcmConst_table[nw];
a <<= 8;
nw = t2[BLOCK_SIZE-1];
a ^= (Ipp32u)AesGcmConst_table[nw];
a <<= 8;
nw = t5[BLOCK_SIZE-1];
a ^= (Ipp32u)AesGcmConst_table[nw];
XorBlock(t4, &a, t4, sizeof(Ipp32u));
CopyBlock16(t4, pGhash);
}
/*
// authenticates n*BLOCK_SIZE bytes
*/
void AesGcmAuth_table2K(Ipp8u* pHash, const Ipp8u* pSrc, int len, const Ipp8u* pHKey, const void* pParam)
{
UNREFERENCED_PARAMETER(pParam);
while(len>=BLOCK_SIZE) {
/* add src */
XorBlock16(pSrc, pHash, pHash);
/* hash it */
AesGcmMulGcm_table2K(pHash, pHKey, AesGcmConst_table);
pSrc += BLOCK_SIZE;
len -= BLOCK_SIZE;
}
}
/*
// encrypts and authenticates n*BLOCK_SIZE bytes
*/
void wrpAesGcmEnc_table2K(Ipp8u* pDst, const Ipp8u* pSrc, int len, IppsAES_GCMState* pState)
{
Ipp8u* pHashedData = pDst;
int hashedDataLen = len;
Ipp8u* pCounter = AESGCM_COUNTER(pState);
Ipp8u* pECounter = AESGCM_ECOUNTER(pState);
IppsAESSpec* pAES = AESGCM_CIPHER(pState);
RijnCipher encoder = RIJ_ENCODER(pAES);
while(len>=BLOCK_SIZE) {
/* encrypt whole AES block */
XorBlock16(pSrc, pECounter, pDst);
pSrc += BLOCK_SIZE;
pDst += BLOCK_SIZE;
len -= BLOCK_SIZE;
/* increment counter block */
IncrementCounter32(pCounter);
/* and encrypt counter */
encoder(pCounter, pECounter, RIJ_NR(pAES), RIJ_EKEYS(pAES), RijEncSbox);
}
AesGcmAuth_table2K(AESGCM_GHASH(pState), pHashedData, hashedDataLen, AESGCM_HKEY(pState), AesGcmConst_table);
}
/*
// authenticates and decrypts n*BLOCK_SIZE bytes
*/
void wrpAesGcmDec_table2K(Ipp8u* pDst, const Ipp8u* pSrc, int len, IppsAES_GCMState* pState)
{
AesGcmAuth_table2K(AESGCM_GHASH(pState), pSrc, len, AESGCM_HKEY(pState), AesGcmConst_table);
{
Ipp8u* pCounter = AESGCM_COUNTER(pState);
Ipp8u* pECounter = AESGCM_ECOUNTER(pState);
IppsAESSpec* pAES = AESGCM_CIPHER(pState);
RijnCipher encoder = RIJ_ENCODER(pAES);
while(len>=BLOCK_SIZE) {
/* encrypt whole AES block */
XorBlock16(pSrc, pECounter, pDst);
pSrc += BLOCK_SIZE;
pDst += BLOCK_SIZE;
len -= BLOCK_SIZE;
/* increment counter block */
IncrementCounter32(pCounter);
/* and encrypt counter */
encoder(pCounter, pECounter, RIJ_NR(pAES), RIJ_EKEYS(pAES), RijEncSbox);
}
}
}

50
sgx-jvm/linux-sgx/external/crypto_px/sources/ippcp/src/pcpaesm.h vendored
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@ -1,50 +0,0 @@
/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#if !defined(_PCP_AES_H)
#define _PCP_AES_H
#include "pcprij.h"
/* alignment of AES context */
#define AES_ALIGNMENT (RIJ_ALIGNMENT)
/* valid AES context ID */
#define VALID_AES_ID(ctx) (RIJ_ID((ctx))==idCtxRijndael)
/* size of AES context */
__INLINE int cpSizeofCtx_AES(void)
{
return sizeof(IppsAESSpec)
+(AES_ALIGNMENT-1);
}
#endif /* _PCP_AES_H */

150
sgx-jvm/linux-sgx/external/crypto_px/sources/ippcp/src/pcpaesmctrca.c vendored
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@ -1,150 +0,0 @@
/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "owndefs.h"
#include "owncp.h"
#include "pcpaesm.h"
#include "pcptool.h"
#include "pcprijtables.h"
/*
// AES-CRT processing.
//
// Returns: Reason:
// ippStsNullPtrErr pCtx == NULL
// pSrc == NULL
// pDst == NULL
// pCtrValue ==NULL
// ippStsContextMatchErr !VALID_AES_ID()
// ippStsLengthErr len <1
// ippStsCTRSizeErr 128 < ctrNumBitSize < 1
// ippStsNoErr no errors
//
// Parameters:
// pSrc pointer to the source data buffer
// pDst pointer to the target data buffer
// dataLen input/output buffer length (in bytes)
// pCtx pointer to rge AES context
// pCtrValue pointer to the counter block
// ctrNumBitSize counter block size (bits)
//
// Note:
// counter will updated on return
//
*/
static
IppStatus cpProcessAES_ctr(const Ipp8u* pSrc, Ipp8u* pDst, int dataLen,
const IppsAESSpec* pCtx,
Ipp8u* pCtrValue, int ctrNumBitSize)
{
/* test context */
IPP_BAD_PTR1_RET(pCtx);
/* use aligned AES context */
pCtx = (IppsAESSpec*)( IPP_ALIGNED_PTR(pCtx, AES_ALIGNMENT) );
/* test the context ID */
IPP_BADARG_RET(!VALID_AES_ID(pCtx), ippStsContextMatchErr);
/* test source, target and counter block pointers */
IPP_BAD_PTR3_RET(pSrc, pDst, pCtrValue);
/* test stream length */
IPP_BADARG_RET((dataLen<1), ippStsLengthErr);
/* test counter block size */
IPP_BADARG_RET(((MBS_RIJ128*8)<ctrNumBitSize)||(ctrNumBitSize<1), ippStsCTRSizeErr);
{
Ipp32u counter[NB(128)];
Ipp32u output[NB(128)];
/* setup encoder method */
RijnCipher encoder = RIJ_ENCODER(pCtx);
/* copy counter */
CopyBlock16(pCtrValue, counter);
/*
// encrypt block-by-block aligned streams
*/
while(dataLen>= MBS_RIJ128) {
/* encrypt counter block */
encoder((Ipp8u*)counter, (Ipp8u*)output, RIJ_NR(pCtx), RIJ_EKEYS(pCtx), RijEncSbox);
/* compute ciphertext block */
if( !(IPP_UINT_PTR(pSrc) & 0x3) && !(IPP_UINT_PTR(pDst) & 0x3)) {
((Ipp32u*)pDst)[0] = output[0]^((Ipp32u*)pSrc)[0];
((Ipp32u*)pDst)[1] = output[1]^((Ipp32u*)pSrc)[1];
((Ipp32u*)pDst)[2] = output[2]^((Ipp32u*)pSrc)[2];
((Ipp32u*)pDst)[3] = output[3]^((Ipp32u*)pSrc)[3];
}
else
XorBlock16(pSrc, output, pDst);
/* encrement counter block */
StdIncrement((Ipp8u*)counter,MBS_RIJ128*8, ctrNumBitSize);
pSrc += MBS_RIJ128;
pDst += MBS_RIJ128;
dataLen -= MBS_RIJ128;
}
/*
// encrypt last data block
*/
if(dataLen) {
/* encrypt counter block */
encoder((Ipp8u*)counter, (Ipp8u*)output, RIJ_NR(pCtx), RIJ_EKEYS(pCtx), RijEncSbox);
/* compute ciphertext block */
XorBlock(pSrc, output, pDst,dataLen);
/* encrement counter block */
StdIncrement((Ipp8u*)counter,MBS_RIJ128*8, ctrNumBitSize);
}
/* update counter */
CopyBlock16(counter, pCtrValue);
return ippStsNoErr;
}
}
IPPFUN(IppStatus, ippsAESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int dataLen,
const IppsAESSpec* pCtx,
Ipp8u* pCtrValue, int ctrNumBitSize))
{
return cpProcessAES_ctr(pSrc, pDst, dataLen, pCtx, pCtrValue, ctrNumBitSize);
}
IPPFUN(IppStatus, ippsAESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int dataLen,
const IppsAESSpec* pCtx,
Ipp8u* pCtrValue, int ctrNumBitSize))
{
return cpProcessAES_ctr(pSrc, pDst, dataLen, pCtx, pCtrValue, ctrNumBitSize);
}

173
sgx-jvm/linux-sgx/external/crypto_px/sources/ippcp/src/pcpaesminitca.c vendored
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@ -1,173 +0,0 @@
/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "owndefs.h"
#include "owncp.h"
#include "pcpaesm.h"
#include "pcptool.h"
#include "pcprijtables.h"
/*F*
// Name: ippsAESGetSize
//
// Purpose: Returns size of AES context (in bytes).
//
// Returns: Reason:
// ippStsNullPtrErr pSzie == NULL
// ippStsNoErr no errors
//
// Parameters:
// pSize pointer to AES size of context(in bytes)
//
*F*/
IPPFUN(IppStatus, ippsAESGetSize,(int* pSize))
{
/* test size's pointer */
IPP_BAD_PTR1_RET(pSize);
*pSize = cpSizeofCtx_AES();
return ippStsNoErr;
}
/* number of rounds (use [NK] for access) */
static int rij128nRounds[3] = {NR128_128, NR128_192, NR128_256};
/*
// number of keys (estimation only!) (use [NK] for access)
//
// accurate number of keys necassary for encrypt/decrypt are:
// nKeys = NB * (NR+1)
// where NB - data block size (32-bit words)
// NR - number of rounds (depend on NB and keyLen)
//
// but the estimation
// estnKeys = (NK*n) >= nKeys
// or
// estnKeys = ( (NB*(NR+1) + (NK-1)) / NK) * NK
// where NK - key length (words)
// NB - data block size (word)
// NR - number of rounds (depend on NB and keyLen)
// nKeys - accurate numner of keys
// is more convinient when calculates key extension
*/
static int rij128nKeys[3] = {44, 54, 64 };
/*
// helper for nRounds[] and estnKeys[] access
// note: x is length in 32-bits words
*/
__INLINE int rij_index(int x)
{ return (x-NB(128))>>1; }
/*F*
// Name: ippsAESInit
//
// Purpose: Init AES context for future usage
// and setup secret key.
//
// Returns: Reason:
// ippStsNullPtrErr pCtx == NULL
// ippStsMemAllocErr size of buffer is not match fro operation
// ippStsLengthErr keyLen != 16
// keyLen != 24
// keyLen != 32
//
// Parameters:
// pKey secret key
// keyLen length of the secret key (in bytes)
// pCtx pointer to buffer initialized as AES context
// ctxSize available size (in bytes) of buffer above
//
// Note:
// if pKey==NULL, then AES initialized by zero value key
//
*F*/
IPPFUN(IppStatus, ippsAESInit,(const Ipp8u* pKey, int keyLen,
IppsAESSpec* pCtxRaw, int rawCtxSize))
{
/* test context pointer */
IPP_BAD_PTR1_RET(pCtxRaw);
/* make sure in legal keyLen */
IPP_BADARG_RET(keyLen!=16 && keyLen!=24 && keyLen!=32, ippStsLengthErr);
{
/* use aligned Rijndael context */
IppsAESSpec* pCtx = (IppsAESSpec*)( IPP_ALIGNED_PTR(pCtxRaw, AES_ALIGNMENT) );
/* test available size of context buffer */
if(((Ipp8u*)pCtx+sizeof(IppsAESSpec)) > ((Ipp8u*)pCtxRaw+rawCtxSize))
IPP_ERROR_RET(ippStsMemAllocErr);
else {
int keyWords = NK(keyLen*BITSIZE(Ipp8u));
int nExpKeys = rij128nKeys [ rij_index(keyWords) ];
int nRounds = rij128nRounds[ rij_index(keyWords) ];
Ipp8u zeroKey[32] = {0};
const Ipp8u* pActualKey = pKey? pKey : zeroKey;
/* clear context */
PaddBlock(0, pCtx, sizeof(IppsAESSpec));
/* init spec */
RIJ_ID(pCtx) = idCtxRijndael;
RIJ_NB(pCtx) = NB(128);
RIJ_NK(pCtx) = keyWords;
RIJ_NR(pCtx) = nRounds;
RIJ_SAFE_INIT(pCtx) = 1;
/* set key expansion */
ExpandRijndaelKey(pActualKey, keyWords, NB(128), nRounds, nExpKeys,
RIJ_EKEYS(pCtx),
RIJ_DKEYS(pCtx));
{
int nr;
Ipp8u* pEnc_key = (Ipp8u*)(RIJ_EKEYS(pCtx));
/* update key material: transpose inplace */
for(nr=0; nr<(1+nRounds); nr++, pEnc_key+=16) {
SWAP(pEnc_key[ 1], pEnc_key[ 4]);
SWAP(pEnc_key[ 2], pEnc_key[ 8]);
SWAP(pEnc_key[ 3], pEnc_key[12]);
SWAP(pEnc_key[ 6], pEnc_key[ 9]);
SWAP(pEnc_key[ 7], pEnc_key[13]);
SWAP(pEnc_key[11], pEnc_key[14]);
}
}
RIJ_ENCODER(pCtx) = Safe2Encrypt_RIJ128; /* safe encoder (compact Sbox)) */
RIJ_DECODER(pCtx) = Safe2Decrypt_RIJ128; /* safe decoder (compact Sbox)) */
return ippStsNoErr;
}
}
}

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sgx-jvm/linux-sgx/external/crypto_px/sources/ippcp/src/pcpbn.h vendored
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@ -1,210 +0,0 @@
/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#if !defined(_CP_BN_H)
#define _CP_BN_H
#include "pcpbnuimpl.h"
#include "pcpbnuarith.h"
#include "pcpbnumisc.h"
#include "pcpbnu32arith.h"
#include "pcpbnu32misc.h"
/*
// Big Number context
*/
struct _cpBigNum
{
IppCtxId idCtx; /* BigNum ctx id */
IppsBigNumSGN sgn; /* sign */
cpSize size; /* BigNum size (BNU_CHUNK_T) */
cpSize room; /* BigNum max size (BNU_CHUNK_T) */
BNU_CHUNK_T* number; /* BigNum value */
BNU_CHUNK_T* buffer; /* temporary buffer */
};
/* BN accessory macros */
#define BN_ID(pBN) ((pBN)->idCtx)
#define BN_SIGN(pBN) ((pBN)->sgn)
#define BN_POSITIVE(pBN) (BN_SIGN(pBN)==ippBigNumPOS)
#define BN_NEGATIVE(pBN) (BN_SIGN(pBN)==ippBigNumNEG)
#define BN_NUMBER(pBN) ((pBN)->number)
#define BN_BUFFER(pBN) ((pBN)->buffer)
#define BN_ROOM(pBN) ((pBN)->room)
#define BN_SIZE(pBN) ((pBN)->size)
#define BN_SIZE32(pBN) ((pBN)->size*(sizeof(BNU_CHUNK_T)/sizeof(Ipp32u)))
//#define BN_SIZE32(pBN) (BITS2WORD32_SIZE( BITSIZE_BNU(BN_NUMBER((pBN)),BN_SIZE((pBN)))))
#define BN_VALID_ID(pBN) (BN_ID((pBN))==idCtxBigNum)
#define INVERSE_SIGN(s) (((s)==ippBigNumPOS)? ippBigNumNEG : ippBigNumPOS)
#define BN_ALIGNMENT ((int)sizeof(void*))
/* pack-unpack context */
void cpPackBigNumCtx(const IppsBigNumState* pBN, Ipp8u* pBuffer);
void cpUnpackBigNumCtx(const Ipp8u* pBuffer, IppsBigNumState* pBN);
/* copy BN */
__INLINE IppsBigNumState* cpBN_copy(IppsBigNumState* pDst, const IppsBigNumState* pSrc)
{
BN_SIGN(pDst) = BN_SIGN(pSrc);
BN_SIZE(pDst) = BN_SIZE(pSrc);
ZEXPAND_COPY_BNU(BN_NUMBER(pDst), BN_ROOM(pDst), BN_NUMBER(pSrc), BN_SIZE(pSrc));
return pDst;
}
/* set BN to zero */
__INLINE IppsBigNumState* cpBN_zero(IppsBigNumState* pBN)
{
BN_SIGN(pBN) = ippBigNumPOS;
BN_SIZE(pBN) = 1;
ZEXPAND_BNU(BN_NUMBER(pBN),0, (int)BN_ROOM(pBN));
return pBN;
}
/* fixup BN */
__INLINE IppsBigNumState* cpBN_fix(IppsBigNumState* pBN)
{
cpSize len = BN_SIZE(pBN);
FIX_BNU(BN_NUMBER(pBN), len);
BN_SIZE(pBN) = len;
return pBN;
}
/* set BN to chunk */
__INLINE IppsBigNumState* cpBN_chunk(IppsBigNumState* pBN, BNU_CHUNK_T a)
{
BN_SIGN(pBN) = ippBigNumPOS;
BN_SIZE(pBN) = 1;
ZEXPAND_BNU(BN_NUMBER(pBN),0, (int)BN_ROOM(pBN));
BN_NUMBER(pBN)[0] = a;
return pBN;
}
/* set BN to 2^m */
__INLINE IppsBigNumState* cpBN_power2(IppsBigNumState* pBN, int power)
{
cpSize size = BITS_BNU_CHUNK(power+1);
if(BN_ROOM(pBN) >= size) {
BN_SIGN(pBN) = ippBigNumPOS;
BN_SIZE(pBN) = size;
ZEXPAND_BNU(BN_NUMBER(pBN),0, BN_ROOM(pBN));
SET_BIT(BN_NUMBER(pBN), power);
return pBN;
}
else return NULL;
}
/* bitsize of BN */
__INLINE int cpBN_bitsize(const IppsBigNumState* pA)
{
int bitsize = BITSIZE_BNU(BN_NUMBER(pA), BN_SIZE(pA));
return bitsize;
}
/* returns -1/0/+1 depemding on A~B comparison */
__INLINE int cpBN_cmp(const IppsBigNumState* pA, const IppsBigNumState* pB)
{
IppsBigNumSGN signA = BN_SIGN(pA);
IppsBigNumSGN signB = BN_SIGN(pB);
if(signA==signB) {
int result = cpCmp_BNU(BN_NUMBER(pA), BN_SIZE(pA), BN_NUMBER(pB), BN_SIZE(pB));
return (ippBigNumPOS==signA)? result : -result;
}
return (ippBigNumPOS==signA)? 1 : -1;
}
/* returns -1/0/+1 depemding on A comparison 0</==0/>0 */
__INLINE int cpBN_tst(const IppsBigNumState* pA)
{
if(1==BN_SIZE(pA) && 0==BN_NUMBER(pA)[0])
return 0;
else
return BN_POSITIVE(pA)? 1 : -1;
}
// some addtition functions
__INLINE int IsZero_BN(const IppsBigNumState* pA)
{
return ( BN_SIZE(pA)==1 ) && ( BN_NUMBER(pA)[0]==0 );
}
__INLINE int IsOdd_BN(const IppsBigNumState* pA)
{
return BN_NUMBER(pA)[0] & 1;
}
__INLINE IppsBigNumState* BN_Word(IppsBigNumState* pBN, BNU_CHUNK_T w)
{
BN_SIGN(pBN) = ippBigNumPOS;
BN_SIZE(pBN) = 1;
ZEXPAND_BNU(BN_NUMBER(pBN),0, BN_ROOM(pBN));
BN_NUMBER(pBN)[0] = w;
return pBN;
}
__INLINE IppsBigNumState* BN_Set(const BNU_CHUNK_T* pData, cpSize len, IppsBigNumState* pBN)
{
BN_SIGN(pBN) = ippBigNumPOS;
BN_SIZE(pBN) = len;
ZEXPAND_COPY_BNU(BN_NUMBER(pBN), BN_ROOM(pBN), pData, len);
return pBN;
}
__INLINE IppsBigNumState* BN_Make(BNU_CHUNK_T* pData, BNU_CHUNK_T* pBuffer, cpSize len, IppsBigNumState* pBN)
{
BN_ID(pBN) = idCtxBigNum;
BN_SIGN(pBN) = ippBigNumPOS;
BN_SIZE(pBN) = 1;
BN_ROOM(pBN) = len;
BN_NUMBER(pBN) = pData;
BN_BUFFER(pBN) = pBuffer;
return pBN;
}
/*
// fixed single chunk BN
*/
typedef struct _ippcpBigNumChunk {
IppsBigNumState bn;
BNU_CHUNK_T value;
BNU_CHUNK_T temporary;
} IppsBigNumStateChunk;
/* reference to BN(1) and BN(2) */
IppsBigNumState* cpBN_OneRef(void);
IppsBigNumState* cpBN_TwoRef(void);
IppsBigNumState* cpBN_ThreeRef(void);
#define BN_ONE_REF() cpBN_OneRef()
#define BN_TWO_REF() cpBN_TwoRef()
#define BN_THREE_REF() cpBN_ThreeRef()
#endif /* _CP_BN_H */

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#if !defined(_PCP_BNRESOURCE_H)
#define _PCP_BNRESOURCE_H
typedef struct {
void* pNext;
IppsBigNumState* pBN;
} BigNumNode;
/* size (byte) of BN resource */
int cpBigNumListGetSize(int feBitSize, int nodes);
/* init BN resource */
void cpBigNumListInit(int feBitSize, int nodes, BigNumNode* pList);
/* get BN from resource */
IppsBigNumState* cpBigNumListGet(BigNumNode** pList);
#endif /* _PCP_BNRESOURCE_H */

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "owndefs.h"
#include "owncp.h"
#include "pcpbnresource.h"
#include "pcpbn.h"
/*
// Size of BigNum List Buffer
*/
int cpBigNumListGetSize(int feBitSize, int nodes)
{
/* size of buffer per single big number */
int bnSize;
ippsBigNumGetSize(BITS2WORD32_SIZE(feBitSize), &bnSize);
/* size of buffer for whole list */
return (ALIGN_VAL-1) + (sizeof(BigNumNode) + bnSize) * nodes;
}
/*
// Init list
//
// Note: buffer for BN list must have appropriate alignment
*/
void cpBigNumListInit(int feBitSize, int nodes, BigNumNode* pList)
{
int itemSize;
/* length of Big Num */
int bnLen = BITS2WORD32_SIZE(feBitSize);
/* size of buffer per single big number */
ippsBigNumGetSize(bnLen, &itemSize);
/* size of list item */
itemSize += sizeof(BigNumNode);
{
int n;
/* init all nodes */
BigNumNode* pNode = (BigNumNode*)( (Ipp8u*)pList + (nodes-1)*itemSize );
BigNumNode* pNext = NULL;
for(n=0; n<nodes; n++) {
Ipp8u* tbnPtr = (Ipp8u*)pNode + sizeof(BigNumNode);
pNode->pNext = pNext;
pNode->pBN = (IppsBigNumState*)( IPP_ALIGNED_PTR(tbnPtr, ALIGN_VAL) );
ippsBigNumInit(bnLen, pNode->pBN);
pNext = pNode;
pNode = (BigNumNode*)( (Ipp8u*)pNode - itemSize);
}
}
}
/*
// Get BigNum reference
*/
IppsBigNumState* cpBigNumListGet(BigNumNode** ppList)
{
if(*ppList) {
IppsBigNumState* ret = (*ppList)->pBN;
*ppList = (BigNumNode*)((*ppList)->pNext);
return ret;
}
else
return NULL;
}

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "owndefs.h"
#include "owncp.h"
#include "pcpbn.h"
/*F*
// Name: ippsSetOctString_BN
//
// Purpose: Convert octet string into the BN value.
//
// Returns: Reason:
// ippStsNullPtrErr NULL == pOctStr
// NULL == pBN
//
// ippStsLengthErr 0>strLen
//
// ippStsSizeErr BN_ROOM() is enough for keep actual strLen
//
// ippStsNoErr no errors
//
// Parameters:
// pOctStr pointer to the source octet string
// strLen octet string length
// pBN pointer to the target BN
//
*F*/
IPPFUN(IppStatus, ippsSetOctString_BN,(const Ipp8u* pOctStr, cpSize strLen,
IppsBigNumState* pBN))
{
IPP_BAD_PTR2_RET(pOctStr, pBN);
pBN = (IppsBigNumState*)( IPP_ALIGNED_PTR(pBN, BN_ALIGNMENT) );
IPP_BADARG_RET(!BN_VALID_ID(pBN), ippStsContextMatchErr);
IPP_BADARG_RET((0>strLen), ippStsLengthErr);
/* remove leading zeros */
while(strLen && (0==pOctStr[0])) {
strLen--;
pOctStr++;
}
/* test BN size */
IPP_BADARG_RET((int)(sizeof(BNU_CHUNK_T)*BN_ROOM(pBN))<strLen, ippStsSizeErr);
if(strLen)
BN_SIZE(pBN) = cpFromOctStr_BNU(BN_NUMBER(pBN), pOctStr, strLen);
else {
BN_NUMBER(pBN)[0] = (BNU_CHUNK_T)0;
BN_SIZE(pBN) = 1;
}
BN_SIGN(pBN) = ippBigNumPOS;
return ippStsNoErr;
}
/*F*
// Name: ippsGetOctString_BN
//
// Purpose: Convert BN value into the octet string.
//
// Returns: Reason:
// ippStsNullPtrErr NULL == pOctStr
// NULL == pBN
//
// ippStsRangeErr BN <0
//
// ippStsLengthErr strLen is enough for keep BN value
//
// ippStsNoErr no errors
//
// Parameters:
// pBN pointer to the source BN
// pOctStr pointer to the target octet string
// strLen octet string length
*F*/
IPPFUN(IppStatus, ippsGetOctString_BN,(Ipp8u* pOctStr, cpSize strLen,
const IppsBigNumState* pBN))
{
IPP_BAD_PTR2_RET(pOctStr, pBN);
pBN = (IppsBigNumState*)( IPP_ALIGNED_PTR(pBN, BN_ALIGNMENT) );
IPP_BADARG_RET(!BN_VALID_ID(pBN), ippStsContextMatchErr);
IPP_BADARG_RET(BN_NEGATIVE(pBN), ippStsRangeErr);
IPP_BADARG_RET((0>strLen), ippStsLengthErr);
return cpToOctStr_BNU(pOctStr,strLen, BN_NUMBER(pBN),BN_SIZE(pBN))? ippStsNoErr : ippStsLengthErr;
}

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "owncp.h"
#include "pcpbnumisc.h"
#include "pcpbnu32misc.h"
#include "pcpbnu32arith.h"
/*
// BNU32 addition
*/
Ipp32u cpAdd_BNU32(Ipp32u* pR, const Ipp32u* pA, const Ipp32u* pB, cpSize ns)
{
Ipp32u carry = 0;
cpSize i;
for(i=0; i<ns; i++) {
Ipp64u t = (Ipp64u)carry +pA[i] + pB[i];
pR[i] = LODWORD(t);
carry = HIDWORD(t);
}
return carry;
}
/*
// BNU32 subtraction
*/
Ipp32u cpSub_BNU32(Ipp32u* pR, const Ipp32u* pA, const Ipp32u* pB, cpSize ns)
{
Ipp32u borrow = 0;
cpSize i;
for(i=0; i<ns; i++) {
Ipp64u t = (Ipp64u)(pA[i]) - pB[i] - borrow;
pR[i] = LODWORD(t);
borrow = 0-HIDWORD(t);
}
return borrow;
}
/*
// BNU32 decrement
*/
Ipp32u cpDec_BNU32(Ipp32u* pR, const Ipp32u* pA, cpSize ns, Ipp32u v)
{
Ipp32u borrow = v;
int n;
for(n=0; n<ns; n++) {
Ipp64u t = (Ipp64u)(pA[n]) - (Ipp64u)borrow;
pR[n] = LODWORD(t);
borrow = HIDWORD(t)>>(32-1);
}
return borrow;
}
/*
// BNU32 mul_by_digit
*/
Ipp32u cpMulDgt_BNU32(Ipp32u* pR, const Ipp32u* pA, cpSize nsA, Ipp32u val)
{
Ipp32u carry = 0;
cpSize i;
for(i=0; i<nsA; i++) {
Ipp64u t = (Ipp64u)val * (Ipp64u)pA[i] + carry;
pR[i] = LODWORD(t);
carry = HIDWORD(t);
}
return carry;
}
/*
// BNU32 mul_by_digit_subtract
*/
Ipp32u cpSubMulDgt_BNU32(Ipp32u* pR, const Ipp32u* pA, cpSize nsA, Ipp32u val)
{
Ipp32u carry = 0;
for(; nsA>0; nsA--) {
Ipp64u r = (Ipp64u)*pR - (Ipp64u)(*pA++) * val - carry;
*pR++ = LODWORD(r);
carry = 0-HIDWORD(r);
}
return carry;
}
/*
// BNU32 division
*/
int cpDiv_BNU32(Ipp32u* pQ, cpSize* sizeQ,
Ipp32u* pX, cpSize sizeX,
Ipp32u* pY, cpSize sizeY)
{
FIX_BNU(pY,sizeY);
FIX_BNU(pX,sizeX);
/* special case */
if(sizeX < sizeY) {
if(pQ) {
pQ[0] = 0;
*sizeQ = 1;
}
return sizeX;
}
/* special case */
if(1 == sizeY) {
int i;
Ipp32u r = 0;
for(i=(int)sizeX-1; i>=0; i--) {
Ipp64u tmp = MAKEDWORD(pX[i],r);
Ipp32u q = LODWORD(tmp / pY[0]);
r = LODWORD(tmp - q*pY[0]);
if(pQ) pQ[i] = q;
}
pX[0] = r;
if(pQ) {
FIX_BNU(pQ,sizeX);
*sizeQ = sizeX;
}
return 1;
}
/* common case */
{
cpSize qs = sizeX-sizeY+1;
cpSize nlz = cpNLZ_BNU32(pY[sizeY-1]);
/* normalization */
pX[sizeX] = 0;
if(nlz) {
cpSize ni;
pX[sizeX] = pX[sizeX-1] >> (32-nlz);
for(ni=sizeX-1; ni>0; ni--)
pX[ni] = (pX[ni]<<nlz) | (pX[ni-1]>>(32-nlz));
pX[0] <<= nlz;
for(ni=sizeY-1; ni>0; ni--)
pY[ni] = (pY[ni]<<nlz) | (pY[ni-1]>>(32-nlz));
pY[0] <<= nlz;
}
/*
// division
*/
{
Ipp32u yHi = pY[sizeY-1];
int i;
for(i=(int)qs-1; i>=0; i--) {
Ipp32u extend;
/* estimate digit of quotient */
Ipp64u tmp = MAKEDWORD(pX[i+sizeY-1], pX[i+sizeY]);
Ipp64u q = tmp / yHi;
Ipp64u r = tmp - q*yHi;
/* tune estimation above */
for(; HIDWORD(q) || (Ipp64u)q*pY[sizeY-2] > MAKEDWORD(pX[i+sizeY-2],r); ) {
q -= 1;
r += yHi;
if( HIDWORD(r) )
break;
}
/* multiply and subtract */
extend = cpSubMulDgt_BNU32(pX+i, pY, sizeY, (Ipp32u)q);
extend = (pX[i+sizeY] -= extend);
if(extend) { /* subtracted too much */
q -= 1;
extend = cpAdd_BNU32(pX+i, pY, pX+i, sizeY);
pX[i+sizeY] += extend;
}
/* store quotation digit */
if(pQ) pQ[i] = LODWORD(q);
}
}
/* de-normalization */
if(nlz) {
cpSize ni;
for(ni=0; ni<sizeX; ni++)
pX[ni] = (pX[ni]>>nlz) | (pX[ni+1]<<(32-nlz));
for(ni=0; ni<sizeY-1; ni++)
pY[ni] = (pY[ni]>>nlz) | (pY[ni+1]<<(32-nlz));
pY[sizeY-1] >>= nlz;
}
FIX_BNU(pX,sizeX);
if(pQ) {
FIX_BNU(pQ,qs);
*sizeQ = qs;
}
return sizeX;
}
}

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#if !defined(_CP_BNU32_ARITH_H)
#define _CP_BNU32_ARITH_H
Ipp32u cpAdd_BNU32(Ipp32u* pR, const Ipp32u* pA, const Ipp32u* pB, int ns);
Ipp32u cpSub_BNU32(Ipp32u* pR, const Ipp32u* pA, const Ipp32u* pB, int ns);
Ipp32u cpInc_BNU32(Ipp32u* pR, const Ipp32u* pA, cpSize ns, Ipp32u val);
Ipp32u cpDec_BNU32(Ipp32u* pR, const Ipp32u* pA, cpSize ns, Ipp32u val);
Ipp32u cpMulDgt_BNU32(Ipp32u* pR, const Ipp32u* pA, int ns, Ipp32u val);
Ipp32u cpSubMulDgt_BNU32(Ipp32u* pR, const Ipp32u* pA, int nsA, Ipp32u val);
int cpDiv_BNU32(Ipp32u* pQ, int* nsQ, Ipp32u* pX, int nsX, Ipp32u* pY, int nsY);
#define cpMod_BNU32(pX,sizeX, pM,sizeM) cpDiv_BNU32(NULL,NULL, (pX),(sizeX), (pM),(sizeM))
#endif /* _CP_BNU32_ARITH_H */

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "owncp.h"
#include "pcpbnuimpl.h"
#include "pcpbnumisc.h"
#include "pcpbnu32misc.h"
/*
// number of leading zeros
*/
cpSize cpNLZ_BNU32(Ipp32u x)
{
cpSize nlz = BITSIZE(Ipp32u);
if(x) {
nlz = 0;
if( 0==(x & 0xFFFF0000) ) { nlz +=16; x<<=16; }
if( 0==(x & 0xFF000000) ) { nlz += 8; x<<= 8; }
if( 0==(x & 0xF0000000) ) { nlz += 4; x<<= 4; }
if( 0==(x & 0xC0000000) ) { nlz += 2; x<<= 2; }
if( 0==(x & 0x80000000) ) { nlz++; }
}
return nlz;
}

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#if !defined(_CP_BNU32_MISC_H)
#define _CP_BNU32_MISC_H
/* bit operations */
#define BITSIZE_BNU32(p,ns) ((ns)*BNU_CHUNK_32BIT-cpNLZ_BNU32((p)[(ns)-1]))
/* number of leading/trailing zeros */
cpSize cpNLZ_BNU32(Ipp32u x);
/* most significant BNU bit */
__INLINE int cpMSBit_BNU32(const Ipp32u* pA, cpSize nsA)
{
FIX_BNU(pA, nsA);
return nsA*BITSIZE(Ipp32u) - cpNLZ_BNU32(pA[nsA-1]) -1;
}
#endif /* _CP_BNU32_MISC_H */

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "owncp.h"
#include "pcpbnuarith.h"
#include "pcpbnumisc.h"
/* Function cpAdd_BNU - addition of 2 BigNumbers */
BNU_CHUNK_T cpAdd_BNU(BNU_CHUNK_T* pR, const BNU_CHUNK_T* pA, const BNU_CHUNK_T* pB, cpSize ns)
{
BNU_CHUNK_T carry = 0;
cpSize i;
for(i=0; i<ns; i++) {
ADD_ABC(carry, pR[i], pA[i],pB[i], carry);
}
return carry;
}
/* Function cpSub_BNU - subtraction of 2 BigNumbers */
BNU_CHUNK_T cpSub_BNU(BNU_CHUNK_T* pR, const BNU_CHUNK_T* pA, const BNU_CHUNK_T* pB, cpSize ns)
{
BNU_CHUNK_T borrow = 0;
cpSize i;
for(i=0; i<ns; i++) {
SUB_ABC(borrow, pR[i], pA[i], pB[i], borrow);
}
return borrow;
}
/* Function cpInc_BNU - increment BigNumber */
BNU_CHUNK_T cpInc_BNU(BNU_CHUNK_T* pR, const BNU_CHUNK_T* pA, cpSize ns, BNU_CHUNK_T val)
{
cpSize i;
for(i=0; i<ns && val; i++) {
BNU_CHUNK_T carry;
ADD_AB(carry, pR[i], pA[i], val);
val = carry;
}
if(pR!=pA)
for(; i<ns; i++)
pR[i] = pA[i];
return val;
}
BNU_CHUNK_T cpDec_BNU(BNU_CHUNK_T* pR, const BNU_CHUNK_T* pA, cpSize ns, BNU_CHUNK_T val)
{
cpSize i;
for(i=0; i<ns && val; i++) {
BNU_CHUNK_T borrow;
SUB_AB(borrow, pR[i], pA[i], val);
val = borrow;
}
if(pR!=pA)
for(; i<ns; i++)
pR[i] = pA[i];
return val;
}
BNU_CHUNK_T cpAddMulDgt_BNU(BNU_CHUNK_T* pR, const BNU_CHUNK_T* pA, cpSize ns, BNU_CHUNK_T val)
{
BNU_CHUNK_T extension = 0;
cpSize i;
for(i=0; i<ns; i++) {
BNU_CHUNK_T rH, rL;
MUL_AB(rH, rL, pA[i], val);
ADD_ABC(extension, pR[i], pR[i], rL, extension);
extension += rH;
}
return extension;
}
BNU_CHUNK_T cpMulAdc_BNU_school(BNU_CHUNK_T* pR,
const BNU_CHUNK_T* pA, cpSize nsA,
const BNU_CHUNK_T* pB, cpSize nsB)
{
const BNU_CHUNK_T* pa = (BNU_CHUNK_T*)pA;
const BNU_CHUNK_T* pb = (BNU_CHUNK_T*)pB;
BNU_CHUNK_T* pr = (BNU_CHUNK_T*)pR;
BNU_CHUNK_T extension = 0;
cpSize i, j;
ZEXPAND_BNU(pr, 0, nsA+nsB);
for(i=0; i<nsB; i++ ) {
BNU_CHUNK_T b = pb[i];
for(j=0, extension=0; j<nsA; j++ ) {
BNU_CHUNK_T rH, rL;
MUL_AB(rH, rL, pa[j], b);
ADD_ABC(extension, pr[i+j], pr[i+j], rL, extension);
extension += rH;
}
pr[i+j] = extension;
}
return extension;
}
BNU_CHUNK_T cpSqrAdc_BNU_school(BNU_CHUNK_T* pR, const BNU_CHUNK_T* pA, cpSize nsA)
{
cpSize i;
BNU_CHUNK_T extension;
BNU_CHUNK_T rH, rL;
/* init result */
pR[0] = 0;
for(i=1, extension=0; i<nsA; i++) {
MUL_AB(rH, rL, pA[i], pA[0]);
ADD_AB(extension, pR[i], rL, extension);
extension += rH;
}
pR[i] = extension;
/* add other a[i]*a[j] */
for(i=1; i<nsA-1; i++) {
BNU_CHUNK_T a = pA[i];
cpSize j;
for(j=i+1, extension=0; j<nsA; j++) {
MUL_AB(rH, rL, pA[j], a);
ADD_ABC(extension, pR[i+j], rL, pR[i+j], extension);
extension += rH;
}
pR[i+j] = extension;
}
/* double a[i]*a[j] */
for(i=1, extension=0; i<(2*nsA-1); i++) {
ADD_ABC(extension, pR[i], pR[i], pR[i], extension);
}
pR[i] = extension;
/* add a[i]^2 */
for(i=0, extension=0; i<nsA; i++) {
MUL_AB(rH, rL, pA[i], pA[i]);
ADD_ABC(extension, pR[2*i], pR[2*i], rL, extension);
ADD_ABC(extension, pR[2*i+1], pR[2*i+1], rH, extension);
}
return pR[2*nsA-1];
}
BNU_CHUNK_T cpGcd_BNU(BNU_CHUNK_T a, BNU_CHUNK_T b)
{
BNU_CHUNK_T gcd, t, r;
if(a > b){
gcd = a;
t = b;
} else {
t = a;
gcd = b;
}
while (t != 0) {
r = gcd % t;
gcd = t;
t = r;
}
return gcd;
}
/*
// cpMAC_BNU
//
// Multiply with ACcumulation
// Computes r <- r + a * b, returns real size of the r in the size_r variable
// Returns 0 if there are no enought buffer size to write to r[MAX(size_r + 1, size_a + size_b) - 1]
// Returns 1 if no error
//
// Note:
// DO NOT run in inplace mode
// The minimum buffer size for the r must be (size_a + size_b - 1)
// the maximum buffer size for the r is MAX(size_r + 1, size_a + size_b)
*/
static int cpMac_BNU(BNU_CHUNK_T* pR, cpSize nsR,
const BNU_CHUNK_T* pA, cpSize nsA,
const BNU_CHUNK_T* pB, cpSize nsB)
{
/* cleanup the rest of destination buffer */
ZEXPAND_BNU(pR, nsR, nsA+nsB-1);
{
BNU_CHUNK_T expansion = 0;
cpSize i;
for(i=0; i<nsB && !expansion; i++) {
expansion = cpAddMulDgt_BNU(pR+i, pA, nsA, pB[i]);
if(expansion)
expansion = cpInc_BNU(pR+i+nsA, pR+i+nsA, nsR-i-nsA, expansion);
}
if(expansion)
return 0;
else { /* compute real size */
FIX_BNU(pR, nsR);
return nsR;
}
}
}
int cpModInv_BNU(BNU_CHUNK_T* pInv,
const BNU_CHUNK_T* pA, cpSize nsA,
const BNU_CHUNK_T* pM, cpSize nsM,
BNU_CHUNK_T* bufInv, BNU_CHUNK_T* bufA, BNU_CHUNK_T* bufM)
{
FIX_BNU(pA, nsA);
FIX_BNU(pM, nsM);
/* inv(1) = 1 */
if(nsA==1 && pA[0]==1) {
pInv[0] = 1;
return 1;
}
{
cpSize moduloSize = nsM;
BNU_CHUNK_T* X1 = pInv;
BNU_CHUNK_T* X2 = bufM;
BNU_CHUNK_T* Q = bufInv;
cpSize nsX1 = 1;
cpSize nsX2 = 1;
cpSize nsQ;
COPY_BNU(bufA, pA, nsA);
ZEXPAND_BNU(X1, 0, moduloSize);
ZEXPAND_BNU(X2, 0, moduloSize);
X2[0] = 1;
for(;;) {
nsM = cpDiv_BNU(Q, &nsQ, (BNU_CHUNK_T*)pM, nsM, bufA, nsA);
nsX1 = cpMac_BNU(X1,moduloSize, Q,nsQ, X2,nsX2);
if (nsM==1 && pM[0]==1) {
////ZEXPAND_BNU(X2, nsX2, moduloSize);
nsX2 = cpMac_BNU(X2,moduloSize, X1,nsX1, bufA, nsA);
COPY_BNU((BNU_CHUNK_T*)pM, X2, moduloSize);
cpSub_BNU(pInv, pM, X1, moduloSize);
FIX_BNU(pInv, moduloSize);
return moduloSize;
}
else if (nsM==1 && pM[0]==0) {
cpMul_BNU_school((BNU_CHUNK_T*)pM, X1,nsX1, bufA, nsA);
/* gcd = buf_a */
return 0;
}
nsA = cpDiv_BNU(Q, &nsQ, bufA, nsA, (BNU_CHUNK_T*)pM, nsM);
nsX2 = cpMac_BNU(X2,moduloSize, Q,nsQ, X1,nsX1);
if(nsA==1 && bufA[0]==1) {
////ZEXPAND_BNU(X1, nsX1, moduloSize);
nsX1 = cpMac_BNU(X1, moduloSize, X2, nsX2, pM, nsM);
COPY_BNU((BNU_CHUNK_T*)pM, X1, moduloSize);
COPY_BNU(pInv, X2, nsX2);
return nsX2;
}
else if (nsA==1 && bufA[0]==0) {
/* gcd = m */
COPY_BNU(X1, pM, nsM);
cpMul_BNU_school((BNU_CHUNK_T*)pM, X2, nsX2, X1, nsM);
return 0;
}
}
}
}

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#if !defined(_CP_BNU_ARITH_H)
#define _CP_BNU_ARITH_H
#include "pcpbnuimpl.h"
#include "pcpbnu32arith.h"
BNU_CHUNK_T cpAdd_BNU(BNU_CHUNK_T* pR, const BNU_CHUNK_T* pA, const BNU_CHUNK_T* pB, cpSize ns);
BNU_CHUNK_T cpSub_BNU(BNU_CHUNK_T* pR, const BNU_CHUNK_T* pA, const BNU_CHUNK_T* pB, cpSize ns);
BNU_CHUNK_T cpInc_BNU(BNU_CHUNK_T* pR, const BNU_CHUNK_T* pA, cpSize ns, BNU_CHUNK_T val);
BNU_CHUNK_T cpDec_BNU(BNU_CHUNK_T* pR, const BNU_CHUNK_T* pA, cpSize ns, BNU_CHUNK_T val);
BNU_CHUNK_T cpAddMulDgt_BNU(BNU_CHUNK_T* pR, const BNU_CHUNK_T* pA, cpSize ns, BNU_CHUNK_T val);
BNU_CHUNK_T cpMulAdc_BNU_school(BNU_CHUNK_T* pR,
const BNU_CHUNK_T* pA, cpSize nsA,
const BNU_CHUNK_T* pB, cpSize nsB);
__INLINE BNU_CHUNK_T cpMul_BNU_school(BNU_CHUNK_T* pR,
const BNU_CHUNK_T* pA, cpSize nsA,
const BNU_CHUNK_T* pB, cpSize nsB)
{
return cpMulAdc_BNU_school(pR, pA,nsA, pB,nsB);
}
BNU_CHUNK_T cpSqrAdc_BNU_school(BNU_CHUNK_T * pR, const BNU_CHUNK_T * pA, cpSize nsA);
__INLINE BNU_CHUNK_T cpSqr_BNU_school(BNU_CHUNK_T * pR, const BNU_CHUNK_T * pA, cpSize nsA)
{
return cpSqrAdc_BNU_school(pR, pA,nsA);
}
BNU_CHUNK_T cpGcd_BNU(BNU_CHUNK_T a, BNU_CHUNK_T b);
int cpModInv_BNU(BNU_CHUNK_T* pInv,
const BNU_CHUNK_T* pA, cpSize nsA,
const BNU_CHUNK_T* pM, cpSize nsM,
BNU_CHUNK_T* bufInv, BNU_CHUNK_T* bufA, BNU_CHUNK_T* bufM);
/*
// multiplication/squaring wrappers
*/
__INLINE BNU_CHUNK_T cpMul_BNU(BNU_CHUNK_T* pR,
const BNU_CHUNK_T* pA, cpSize nsA,
const BNU_CHUNK_T* pB, cpSize nsB,
BNU_CHUNK_T* pBuffer)
{
UNREFERENCED_PARAMETER(pBuffer);
return cpMul_BNU_school(pR, pA,nsA, pB,nsB);
}
__INLINE BNU_CHUNK_T cpSqr_BNU(BNU_CHUNK_T * pR,
const BNU_CHUNK_T * pA, cpSize nsA,
BNU_CHUNK_T* pBuffer)
{
UNREFERENCED_PARAMETER(pBuffer);
return cpSqr_BNU_school(pR, pA,nsA);
}
/*
// division/reduction wrappers
*/
__INLINE cpSize cpDiv_BNU(BNU_CHUNK_T* pQ, cpSize* pnsQ, BNU_CHUNK_T* pA, cpSize nsA, BNU_CHUNK_T* pB, cpSize nsB)
{
int nsR = cpDiv_BNU32((Ipp32u*)pQ, pnsQ,
(Ipp32u*)pA, nsA*(sizeof(BNU_CHUNK_T)/sizeof(Ipp32u)),
(Ipp32u*)pB, nsB*(sizeof(BNU_CHUNK_T)/sizeof(Ipp32u)));
#if (BNU_CHUNK_BITS == BNU_CHUNK_64BIT)
if(nsR&1) ((Ipp32u*)pA)[nsR] = 0;
nsR = INTERNAL_BNU_LENGTH(nsR);
if(pQ) {
if(*pnsQ&1) ((Ipp32u*)pQ)[*pnsQ] = 0;
*pnsQ = INTERNAL_BNU_LENGTH(*pnsQ);
}
#endif
return nsR;
}
__INLINE cpSize cpMod_BNU(BNU_CHUNK_T* pX, cpSize nsX, BNU_CHUNK_T* pModulus, cpSize nsM)
{
return cpDiv_BNU(NULL,NULL, pX,nsX, pModulus, nsM);
}
#endif /* _CP_BNU_ARITH_H */

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#if !defined(_CP_BNU_IMPL_H)
#define _CP_BNU_IMPL_H
#define BNU_CHUNK_64BIT (64)
#define BNU_CHUNK_32BIT (32)
/*
// define BNU chunk data type
*/
#if ((_IPP_ARCH == _IPP_ARCH_EM64T) || (_IPP_ARCH == _IPP_ARCH_LP64) || (_IPP_ARCH == _IPP_ARCH_LRB) || (_IPP_ARCH == _IPP_ARCH_LRB2))
typedef Ipp64u BNU_CHUNK_T;
typedef Ipp64s BNS_CHUNK_T;
#define BNU_CHUNK_LOG2 (6)
#define BNU_CHUNK_BITS BNU_CHUNK_64BIT
#else
typedef Ipp32u BNU_CHUNK_T;
typedef Ipp32s BNS_CHUNK_T;
#define BNU_CHUNK_LOG2 (5)
#define BNU_CHUNK_BITS BNU_CHUNK_32BIT
#endif
#define BNU_CHUNK_MASK (~(BNU_CHUNK_T)(0))
#if (BNU_CHUNK_BITS == BNU_CHUNK_64BIT)
#pragma message ("BNU_CHUNK_BITS = 64 bit")
#elif (BNU_CHUNK_BITS == BNU_CHUNK_32BIT)
#pragma message ("BNU_CHUNK_BITS = 32 bit")
#else
#error BNU_CHUNK_BITS should be either 64 or 32 bit!
#endif
#ifdef _MSC_VER
# pragma warning( disable : 4127)
#endif
/* user's API BNU chunk data type */
typedef Ipp32u API_BNU_CHUNK_T;
/* convert API_BNU_CHUNK_T (usual Ipp32u) length into the BNU_CHUNK_T length */
#define INTERNAL_BNU_LENGTH(apiLen) \
((apiLen) + sizeof(BNU_CHUNK_T)/sizeof(API_BNU_CHUNK_T) -1)/(sizeof(BNU_CHUNK_T)/sizeof(API_BNU_CHUNK_T))
/* Low and High parts of BNU_CHUNK_T value */
#define BNU_CHUNK_2H ((BNU_CHUNK_T)1 << (BNU_CHUNK_BITS/2))
#define LO_CHUNK(c) ((BNU_CHUNK_T)(c) & (BNU_CHUNK_2H - 1))
#define HI_CHUNK(c) ((BNU_CHUNK_T)(c) >> (BNU_CHUNK_BITS/2))
/* (carry,R) = A+B */
#define ADD_AB(CARRY,R, A,B) \
do { \
BNU_CHUNK_T __s = (A) + (B); \
(CARRY) = __s < (A); \
(R) = __s; \
} while(0)
/* (carry,R) = A+B+C */
#define ADD_ABC(CARRY,R, A,B,C) \
do { \
BNU_CHUNK_T __s = (A) + (B); \
BNU_CHUNK_T __t1= __s < (A); \
BNU_CHUNK_T __r = __s + (C); \
BNU_CHUNK_T __t2 = __r < __s; \
(CARRY) = __t1 + __t2; \
(R) = __r; \
} while(0)
/* (borrow,R) = A-B */
#define SUB_AB(BORROW,R, A,B) \
do { \
(BORROW) = (A)<(B); \
(R) = (A)-(B); \
} while(0)
/* (borrow,R) = A-B-C */
#define SUB_ABC(BORROW,R, A,B,C) \
do { \
BNU_CHUNK_T __s = (A) -( B); \
BNU_CHUNK_T __t1= __s > (A); \
BNU_CHUNK_T __r = __s - (C); \
BNU_CHUNK_T __t2 = __r > __s; \
(BORROW) = __t1 + __t2; \
(R) = __r; \
} while(0)
/* (RH,RL) = A*B */
#define MUL_AB(RH, RL, A, B) \
do { \
BNU_CHUNK_T __aL = LO_CHUNK((A)); \
BNU_CHUNK_T __aH = HI_CHUNK((A)); \
BNU_CHUNK_T __bL = LO_CHUNK((B)); \
BNU_CHUNK_T __bH = HI_CHUNK((B)); \
\
BNU_CHUNK_T __x0 = (BNU_CHUNK_T) __aL * __bL; \
BNU_CHUNK_T __x1 = (BNU_CHUNK_T) __aL * __bH; \
BNU_CHUNK_T __x2 = (BNU_CHUNK_T) __aH * __bL; \
BNU_CHUNK_T __x3 = (BNU_CHUNK_T) __aH * __bH; \
\
__x1 += HI_CHUNK(__x0); \
__x1 += __x2; \
if(__x1 < __x2) \
__x3 += BNU_CHUNK_2H; \
\
(RH) = __x3 + HI_CHUNK(__x1); \
(RL) = (__x1 << BNU_CHUNK_BITS/2) + LO_CHUNK(__x0); \
} while (0)
#endif /* _CP_BNU_IMPL_H */

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "owncp.h"
#include "pcpbnumisc.h"
/*
// number of leading zeros
*/
cpSize cpNLZ_BNU(BNU_CHUNK_T x)
{
cpSize nlz = BNU_CHUNK_BITS;
if(x) {
nlz = 0;
#if (BNU_CHUNK_BITS == BNU_CHUNK_64BIT)
if( 0==(x & 0xFFFFFFFF00000000) ) { nlz +=32; x<<=32; }
if( 0==(x & 0xFFFF000000000000) ) { nlz +=16; x<<=16; }
if( 0==(x & 0xFF00000000000000) ) { nlz += 8; x<<= 8; }
if( 0==(x & 0xF000000000000000) ) { nlz += 4; x<<= 4; }
if( 0==(x & 0xC000000000000000) ) { nlz += 2; x<<= 2; }
if( 0==(x & 0x8000000000000000) ) { nlz++; }
#else
if( 0==(x & 0xFFFF0000) ) { nlz +=16; x<<=16; }
if( 0==(x & 0xFF000000) ) { nlz += 8; x<<= 8; }
if( 0==(x & 0xF0000000) ) { nlz += 4; x<<= 4; }
if( 0==(x & 0xC0000000) ) { nlz += 2; x<<= 2; }
if( 0==(x & 0x80000000) ) { nlz++; }
#endif
}
return nlz;
}
/*
// number of trailing zeros
*/
cpSize cpNTZ_BNU(BNU_CHUNK_T x)
{
cpSize ntz = BNU_CHUNK_BITS;
if(x) {
ntz = 0;
#if (BNU_CHUNK_BITS==BNU_CHUNK_64BIT)
if( 0==(x & 0x00000000FFFFFFFF) ) { ntz+=32; x>>=32; }
if( 0==(x & 0x000000000000FFFF) ) { ntz+=16; x>>=16; }
if( 0==(x & 0x00000000000000FF) ) { ntz+= 8; x>>= 8; }
if( 0==(x & 0x000000000000000F) ) { ntz+= 4; x>>= 4; }
if( 0==(x & 0x0000000000000003) ) { ntz+= 2; x>>= 2; }
if( 0==(x & 0x0000000000000001) ) { ntz++; }
#else
if( 0==(x & 0x0000FFFF) ) { ntz+=16; x>>=16; }
if( 0==(x & 0x000000FF) ) { ntz+= 8; x>>= 8; }
if( 0==(x & 0x0000000F) ) { ntz+= 4; x>>= 4; }
if( 0==(x & 0x00000003) ) { ntz+= 2; x>>= 2; }
if( 0==(x & 0x00000001) ) { ntz++; }
#endif
}
return ntz;
}
/*
// Logical shift right (including inplace)
//
// Returns new length
//
*/
cpSize cpLSR_BNU(BNU_CHUNK_T* pR, const BNU_CHUNK_T* pA, cpSize nsA, cpSize nBits)
{
cpSize nw = nBits/BNU_CHUNK_BITS;
cpSize n;
pA += nw;
nsA -= nw;
nBits %= BNU_CHUNK_BITS;
if(nBits) {
BNU_CHUNK_T hi;
BNU_CHUNK_T lo = pA[0];
for(n=0; n<(nsA-1); n++) {
hi = pA[n+1];
pR[n] = (lo>>nBits) | (hi<<(BNU_CHUNK_BITS-nBits));
lo = hi;
}
pR[nsA-1] = (lo>>nBits);
}
else {
for(n=0; n<nsA; n++)
pR[n] = pA[n];
}
for(n=0; n<nw; n++)
pR[nsA+n] = 0;
return nsA+nw;
}
/*
// Convert Oct String into BNU representation
//
// Returns size of BNU in BNU_CHUNK_T chunks
*/
cpSize cpFromOctStr_BNU(BNU_CHUNK_T* pA, const Ipp8u* pStr, cpSize strLen)
{
int nsA =0;
/* start from the end of string */
for(; strLen>=(int)sizeof(BNU_CHUNK_T); nsA++,strLen-=(int)(sizeof(BNU_CHUNK_T))) {
/* pack sizeof(BNU_CHUNK_T) bytes into single BNU_CHUNK_T value*/
*pA++ =
#if (BNU_CHUNK_BITS==BNU_CHUNK_64BIT)
+( (BNU_CHUNK_T)pStr[strLen-8]<<(8*7) )
+( (BNU_CHUNK_T)pStr[strLen-7]<<(8*6) )
+( (BNU_CHUNK_T)pStr[strLen-6]<<(8*5) )
+( (BNU_CHUNK_T)pStr[strLen-5]<<(8*4) )
#endif
+( (BNU_CHUNK_T)pStr[strLen-4]<<(8*3) )
+( (BNU_CHUNK_T)pStr[strLen-3]<<(8*2) )
+( (BNU_CHUNK_T)pStr[strLen-2]<<(8*1) )
+ (BNU_CHUNK_T)pStr[strLen-1];
}
/* convert the beginning of the string */
if(strLen) {
BNU_CHUNK_T x = 0;
for(x=0; strLen>0; strLen--) {
BNU_CHUNK_T d = *pStr++;
x = (x<<8) + d;
}
*pA++ = x;
nsA++;
}
return nsA;
}
/*
// Convert BNU into HexString representation
//
// Returns length of the string or 0 if no success
*/
cpSize cpToOctStr_BNU(Ipp8u* pStr, cpSize strLen, const BNU_CHUNK_T* pA, cpSize nsA)
{
FIX_BNU(pA, nsA);
{
cpSize bnuBitSize = BITSIZE_BNU(pA, nsA);
if(bnuBitSize <= strLen*BYTESIZE) {
int cnvLen = 0;
BNU_CHUNK_T x = pA[nsA-1];
ZEXPAND_BNU(pStr, 0, strLen);
pStr += strLen - BITS2WORD8_SIZE(bnuBitSize);
if(x) {
//int nb;
cpSize nb;
for(nb=cpNLZ_BNU(x)/BYTESIZE; nb<(cpSize)(sizeof(BNU_CHUNK_T)); cnvLen++, nb++)
*pStr++ = EBYTE(x, sizeof(BNU_CHUNK_T)-1-nb);
for(--nsA; nsA>0; cnvLen+=sizeof(BNU_CHUNK_T), nsA--) {
x = pA[nsA-1];
#if (BNU_CHUNK_BITS==BNU_CHUNK_64BIT)
*pStr++ = EBYTE(x,7);
*pStr++ = EBYTE(x,6);
*pStr++ = EBYTE(x,5);
*pStr++ = EBYTE(x,4);
#endif
*pStr++ = EBYTE(x,3);
*pStr++ = EBYTE(x,2);
*pStr++ = EBYTE(x,1);
*pStr++ = EBYTE(x,0);
}
}
return strLen;
}
else
return 0;
}
}

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#if !defined(_PCP_BNUMISC_H)
#define _PCP_BNUMISC_H
#include "pcpbnuimpl.h"
/* bit operations */
#define BITSIZE_BNU(p,ns) ((ns)*BNU_CHUNK_BITS-cpNLZ_BNU((p)[(ns)-1]))
#define BIT_BNU(bnu, ns,nbit) ((((nbit)>>BNU_CHUNK_LOG2) < (ns))? ((((bnu))[(nbit)>>BNU_CHUNK_LOG2] >>((nbit)&(BNU_CHUNK_BITS))) &1) : 0)
#define TST_BIT(bnu, nbit) ((((bnu))[(nbit)>>BNU_CHUNK_LOG2]) & ((BNU_CHUNK_T)1<<((nbit)&(BNU_CHUNK_BITS-1))))
#define SET_BIT(bnu, nbit) ((((bnu))[(nbit)>>BNU_CHUNK_LOG2]) |= ((BNU_CHUNK_T)1<<((nbit)&(BNU_CHUNK_BITS-1))))
#define CLR_BIT(bnu, nbit) ((((bnu))[(nbit)>>BNU_CHUNK_LOG2]) &=~((BNU_CHUNK_T)1<<((nbit)&(BNU_CHUNK_BITS-1))))
/* convert bitsize nbits into the number of BNU_CHUNK_T */
#define BITS_BNU_CHUNK(nbits) (((nbits)+BNU_CHUNK_BITS-1)/BNU_CHUNK_BITS)
/* mask for top BNU_CHUNK_T */
#define MASK_BNU_CHUNK(nbits) ((BNU_CHUNK_T)(-1) >>((BNU_CHUNK_BITS- ((nbits)&(BNU_CHUNK_BITS-1))) &(BNU_CHUNK_BITS-1)))
/* copy BNU content */
#define COPY_BNU(dst, src, len) \
{ \
cpSize __idx; \
for(__idx=0; __idx<(len); __idx++) (dst)[__idx] = (src)[__idx]; \
}
/* expand by zeros */
#define ZEXPAND_BNU(srcdst,srcLen, dstLen) \
{ \
cpSize __idx; \
for(__idx=(srcLen); __idx<(dstLen); __idx++) (srcdst)[__idx] = 0; \
}
/* copy and expand by zeros */
#define ZEXPAND_COPY_BNU(dst,dstLen, src,srcLen) \
{ \
cpSize __idx; \
for(__idx=0; __idx<(srcLen); __idx++) (dst)[__idx] = (src)[__idx]; \
for(; __idx<(dstLen); __idx++) (dst)[__idx] = 0; \
}
/* fix actual length */
#define FIX_BNU(src,srcLen) \
for(; ((srcLen)>1) && (0==(src)[(srcLen)-1]); (srcLen)--)
/* copy and set */
__INLINE void cpCpy_BNU(BNU_CHUNK_T* pDst, const BNU_CHUNK_T* pSrc, cpSize ns)
{ COPY_BNU(pDst, pSrc, ns); }
__INLINE void cpSet_BNU(BNU_CHUNK_T* pDst, cpSize ns, BNU_CHUNK_T val)
{
ZEXPAND_BNU(pDst, 0, ns);
pDst[0] = val;
}
/* fix up */
__INLINE int cpFix_BNU(const BNU_CHUNK_T* pA, int nsA)
{
FIX_BNU(pA, nsA);
return nsA;
}
/* comparison
//
// returns
// negative, if A < B
// 0, if A = B
// positive, if A > B
*/
__INLINE int cpCmp_BNU(const BNU_CHUNK_T* pA, cpSize nsA, const BNU_CHUNK_T* pB, cpSize nsB)
{
if(nsA!=nsB)
return nsA>nsB? 1 : -1;
else {
for(; nsA>0; nsA--) {
if(pA[nsA-1] > pB[nsA-1])
return 1;
else if(pA[nsA-1] < pB[nsA-1])
return -1;
}
return 0;
}
}
__INLINE int cpEqu_BNU_CHUNK(const BNU_CHUNK_T* pA, cpSize nsA, BNU_CHUNK_T b)
{
return (pA[0]==b && 1==cpFix_BNU(pA, nsA));
}
/*
// test
//
// returns
// 0, if A = 0
// >0, if A > 0
// <0, looks like impossible (or error) case
*/
__INLINE int cpTst_BNU(const BNU_CHUNK_T* pA, int nsA)
{
for(; (nsA>0) && (0==pA[nsA-1]); nsA--) ;
return nsA;
}
/* number of leading/trailing zeros */
cpSize cpNLZ_BNU(BNU_CHUNK_T x);
cpSize cpNTZ_BNU(BNU_CHUNK_T x);
/* logical shift left/right */
int cpLSR_BNU(BNU_CHUNK_T* pR, const BNU_CHUNK_T* pA, cpSize nsA, cpSize nBits);
/* least and most significant BNU bit */
int cpMSBit_BNU(const BNU_CHUNK_T* pA, cpSize nsA);
/* BNU <-> hex-string conversion */
int cpToOctStr_BNU(Ipp8u* pStr, cpSize strLen, const BNU_CHUNK_T* pA, cpSize nsA);
int cpFromOctStr_BNU(BNU_CHUNK_T* pA, const Ipp8u* pStr, cpSize strLen);
#endif /* _PCP_BNUMISC_H */

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#if !defined(_PCP_CMAC_H)
#define _PCP_CMAC_H
#include "pcprij.h"
/*
// Rijndael128 based CMAC context
*/
struct _cpAES_CMAC {
IppCtxId idCtx; /* CMAC identifier */
int index; /* internal buffer entry (free) */
int dummy[2]; /* align-16 */
Ipp8u k1[MBS_RIJ128]; /* k1 subkey */
Ipp8u k2[MBS_RIJ128]; /* k2 subkey */
Ipp8u mBuffer[MBS_RIJ128];/* buffer */
Ipp8u mMAC[MBS_RIJ128]; /* intermediate digest */
__ALIGN16 /* aligned AES context */
IppsAESSpec mCipherCtx;
};
/* alignment */
#define AESCMAC_ALIGNMENT (RIJ_ALIGNMENT)
/*
// Useful macros
*/
#define CMAC_ID(stt) ((stt)->idCtx)
#define CMAC_INDX(stt) ((stt)->index)
#define CMAC_K1(stt) ((stt)->k1)
#define CMAC_K2(stt) ((stt)->k2)
#define CMAC_BUFF(stt) ((stt)->mBuffer)
#define CMAC_MAC(stt) ((stt)->mMAC)
#define CMAC_CIPHER(stt) ((stt)->mCipherCtx)
/* valid context ID */
#define VALID_AESCMAC_ID(ctx) (CMAC_ID((ctx))==idCtxCMAC)
#endif /* _PCP_CMAC_H */

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#if !defined(_PCP_ECCP_H)
#define _PCP_ECCP_H
#include "pcpbnresource.h"
#include "pcppma.h"
#include "pcpeccppoint.h"
#include "pcpeccpsscm.h"
typedef struct eccp_method_st ECCP_METHOD;
/*
// ECC over prime GF(p) Context
*/
struct _cpECCP {
IppCtxId idCtx; /* prime EC identifier */
IppsBigNumState* pPrime; /* specify finite field GF(p) */
IppsBigNumState* pA; /* scecify A & B of EC equation: */
IppsBigNumState* pB; /* y^2 = x^3 + A*x + B (mod)p */
IppsBigNumState* pGX; /* Base Point (X coordinate) */
IppsBigNumState* pGY; /* Base Point (Y coordinate) */
IppsBigNumState* pR; /* order (r) of Base Point */
/* fields above mainly for ippsECCPSet()/ippsECCPGet() */
Ipp32u eccStandard;/* generic/standard ecc */
ECCP_METHOD* pMethod;
int gfeBitSize; /* size (bits) of field element */
int ordBitSize; /* size (bits) of BP order */
int a_3; /* ==1 if A==-3 or A==P-3 */
IppsBigNumState* pAenc; /* internal formatted pA value */
IppsBigNumState* pBenc; /* internal formatted pB value */
IppsMontState* pMontP; /* montromery engine (modulo p) */
IppsECCPPointState* pGenc; /* internal formatted Base Point */
IppsBigNumState* pCofactor; /* cofactor = #E/base_point_order*/
IppsMontState* pMontR; /* montromery engine (modulo r) */
IppsBigNumState* pPrivate; /* private key */
IppsECCPPointState* pPublic; /* public key (affine) */
IppsBigNumState* pPrivateE; /* ephemeral private key */
IppsECCPPointState* pPublicE; /* ephemeral public key (affine) */
IppsPrimeState* pPrimary; /* prime engine */
Ipp8u* pSscmBuffer;/* pointer to sscm buffer */
BigNumNode* pBnList; /* list of big numbers */
};
/* some useful constants */
#define BNLISTSIZE (32) /* list size (probably less) */
/*
// Contetx Access Macros
*/
#define ECP_ID(ctx) ((ctx)->idCtx)
#define ECP_PRIME(ctx) ((ctx)->pPrime)
#define ECP_A(ctx) ((ctx)->pA)
#define ECP_B(ctx) ((ctx)->pB)
#define ECP_GX(ctx) ((ctx)->pGX)
#define ECP_GY(ctx) ((ctx)->pGY)
#define ECP_ORDER(ctx) ((ctx)->pR)
#define ECP_TYPE(ctx) ((ctx)->eccStandard)
#define ECP_METHOD(ctx) ((ctx)->pMethod)
#define ECP_GFEBITS(ctx) ((ctx)->gfeBitSize)
#define ECP_ORDBITS(ctx) ((ctx)->ordBitSize)
#define ECP_AMI3(ctx) ((ctx)->a_3)
#define ECP_AENC(ctx) ((ctx)->pAenc)
#define ECP_BENC(ctx) ((ctx)->pBenc)
#define ECP_PMONT(ctx) ((ctx)->pMontP)
#define ECP_GENC(ctx) ((ctx)->pGenc)
#define ECP_COFACTOR(ctx) ((ctx)->pCofactor)
#define ECP_RMONT(ctx) ((ctx)->pMontR)
#define ECP_PRIVATE(ctx) ((ctx)->pPrivate)
#define ECP_PUBLIC(ctx) ((ctx)->pPublic)
#define ECP_PRIVATE_E(ctx) ((ctx)->pPrivateE)
#define ECP_PUBLIC_E(ctx) ((ctx)->pPublicE)
#define ECP_PRIMARY(ctx) ((ctx)->pPrimary)
#define ECP_SCCMBUFF(ctx) ((ctx)->pSscmBuffer)
#define ECP_BNCTX(ctx) ((ctx)->pBnList)
#define ECP_VALID_ID(ctx) (ECP_ID((ctx))==idCtxECCP)
/*
// Recommended (Standard) Domain Parameters
*/
extern const Ipp32u secp112r1_p[]; // (2^128 -3)/76439
extern const Ipp32u secp112r1_a[];
extern const Ipp32u secp112r1_b[];
extern const Ipp32u secp112r1_gx[];
extern const Ipp32u secp112r1_gy[];
extern const Ipp32u secp112r1_r[];
extern Ipp32u secp112r1_h;
extern const Ipp32u secp112r2_p[]; // (2^128 -3)/76439
extern const Ipp32u secp112r2_a[];
extern const Ipp32u secp112r2_b[];
extern const Ipp32u secp112r2_gx[];
extern const Ipp32u secp112r2_gy[];
extern const Ipp32u secp112r2_r[];
extern Ipp32u secp112r2_h;
extern const Ipp32u secp128r1_p[]; // 2^128 -2^97 -1
extern const Ipp32u secp128r1_a[];
extern const Ipp32u secp128r1_b[];
extern const Ipp32u secp128r1_gx[];
extern const Ipp32u secp128r1_gy[];
extern const Ipp32u secp128r1_r[];
extern Ipp32u secp128r1_h;
extern const Ipp32u* secp128_mx[];
extern const Ipp32u secp128r2_p[]; // 2^128 -2^97 -1
extern const Ipp32u secp128r2_a[];
extern const Ipp32u secp128r2_b[];
extern const Ipp32u secp128r2_gx[];
extern const Ipp32u secp128r2_gy[];
extern const Ipp32u secp128r2_r[];
extern Ipp32u secp128r2_h;
extern const Ipp32u secp160r1_p[]; // 2^160 -2^31 -1
extern const Ipp32u secp160r1_a[];
extern const Ipp32u secp160r1_b[];
extern const Ipp32u secp160r1_gx[];
extern const Ipp32u secp160r1_gy[];
extern const Ipp32u secp160r1_r[];
extern Ipp32u secp160r1_h;
extern const Ipp32u secp160r2_p[]; // 2^160 -2^32 -2^14 -2^12 -2^9 -2^8 -2^7 -2^2 -1
extern const Ipp32u secp160r2_a[];
extern const Ipp32u secp160r2_b[];
extern const Ipp32u secp160r2_gx[];
extern const Ipp32u secp160r2_gy[];
extern const Ipp32u secp160r2_r[];
extern Ipp32u secp160r2_h;
extern const Ipp32u secp192r1_p[]; // 2^192 -2^64 -1
extern const Ipp32u secp192r1_a[];
extern const Ipp32u secp192r1_b[];
extern const Ipp32u secp192r1_gx[];
extern const Ipp32u secp192r1_gy[];
extern const Ipp32u secp192r1_r[];
extern Ipp32u secp192r1_h;
extern const Ipp32u secp224r1_p[]; // 2^224 -2^96 +1
extern const Ipp32u secp224r1_a[];
extern const Ipp32u secp224r1_b[];
extern const Ipp32u secp224r1_gx[];
extern const Ipp32u secp224r1_gy[];
extern const Ipp32u secp224r1_r[];
extern Ipp32u secp224r1_h;
extern const Ipp32u secp256r1_p[]; // 2^256 -2^224 +2^192 +2^96 -1
extern const Ipp32u secp256r1_a[];
extern const Ipp32u secp256r1_b[];
extern const Ipp32u secp256r1_gx[];
extern const Ipp32u secp256r1_gy[];
extern const Ipp32u secp256r1_r[];
extern Ipp32u secp256r1_h;
extern const Ipp32u secp384r1_p[]; // 2^384 -2^128 -2^96 +2^32 -1
extern const Ipp32u secp384r1_a[];
extern const Ipp32u secp384r1_b[];
extern const Ipp32u secp384r1_gx[];
extern const Ipp32u secp384r1_gy[];
extern const Ipp32u secp384r1_r[];
extern Ipp32u secp384r1_h;
extern const Ipp32u secp521r1_p[]; // 2^521 -1
extern const Ipp32u secp521r1_a[];
extern const Ipp32u secp521r1_b[];
extern const Ipp32u secp521r1_gx[];
extern const Ipp32u secp521r1_gy[];
extern const Ipp32u secp521r1_r[];
extern Ipp32u secp521r1_h;
/* half of some std modulus */
extern const Ipp32u h_secp128r1_p[];
extern const Ipp32u h_secp192r1_p[];
extern const Ipp32u h_secp224r1_p[];
extern const Ipp32u h_secp256r1_p[];
extern const Ipp32u h_secp384r1_p[];
extern const Ipp32u h_secp521r1_p[];
#endif /* _PCP_ECCP_H */

370
sgx-jvm/linux-sgx/external/crypto_px/sources/ippcp/src/pcpeccpdpca.c vendored
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@ -1,370 +0,0 @@
/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "owndefs.h"
#include "owncp.h"
#include "pcpeccp.h"
#include "pcpeccppoint.h"
#include "pcpbnresource.h"
#include "pcpeccpmethod.h"
#include "pcpeccpmethodcom.h"
#include "pcppma.h"
/*F*
// Name: ippsECCPSet
//
// Purpose: Set EC Domain Parameters.
//
// Returns: Reason:
// ippStsNullPtrErr NULL == pPrime
// NULL == pA
// NULL == pB
// NULL == pGX
// NULL == pGY
// NULL == pOrder
// NULL == pECC
//
// ippStsContextMatchErr illegal pPrime->idCtx
// illegal pA->idCtx
// illegal pB->idCtx
// illegal pGX->idCtx
// illegal pGY->idCtx
// illegal pOrder->idCtx
// illegal pECC->idCtx
//
// ippStsRangeErr not enough room for:
// pPrime
// pA, pB,
// pGX,pGY
// pOrder
//
// ippStsRangeErr 0>= cofactor
//
// ippStsNoErr no errors
//
// Parameters:
// pPrime pointer to the prime (specify FG(p))
// pA pointer to the A coefficient of EC equation
// pB pointer to the B coefficient of EC equation
// pGX,pGY pointer to the Base Point (x and y coordinates) of EC
// pOrder pointer to the Base Point order
// cofactor cofactor value
// pECC pointer to the ECC context
//
*F*/
static
void ECCPSetDP(IppECCType flag,
int primeSize, const Ipp32u* pPrime,
int aSize, const Ipp32u* pA,
int bSize, const Ipp32u* pB,
int gxSize, const Ipp32u* pGx,
int gySize, const Ipp32u* pGy,
int orderSize, const Ipp32u* pOrder,
Ipp32u cofactor,
IppsECCPState* pECC)
{
ECP_TYPE(pECC) = flag;
/* reset size (bits) of field element */
ECP_GFEBITS(pECC) = cpMSBit_BNU32(pPrime, primeSize) +1;
/* reset size (bits) of Base Point order */
ECP_ORDBITS(pECC) = cpMSBit_BNU32(pOrder, orderSize) +1;
/* set up prime */
ippsSet_BN(ippBigNumPOS, primeSize, pPrime, ECP_PRIME(pECC));
/* set up A */
ippsSet_BN(ippBigNumPOS, aSize, pA, ECP_A(pECC));
/* test A */
BN_Word(ECP_B(pECC), 3);
PMA_add(ECP_B(pECC), ECP_A(pECC), ECP_B(pECC), ECP_PRIME(pECC));
ECP_AMI3(pECC) = IsZero_BN(ECP_B(pECC));
/* set up B */
ippsSet_BN(ippBigNumPOS, bSize, pB, ECP_B(pECC));
/* set up affine coordinates of Base Point and order */
ippsSet_BN(ippBigNumPOS, gxSize, pGx, ECP_GX(pECC));
ippsSet_BN(ippBigNumPOS, gySize, pGy, ECP_GY(pECC));
ippsSet_BN(ippBigNumPOS, orderSize, pOrder, ECP_ORDER(pECC));
/* set up cofactor */
//ippsSet_BN(ippBigNumPOS, 1, &((Ipp32u)cofactor), ECP_COFACTOR(pECC));
ippsSet_BN(ippBigNumPOS, 1, &cofactor, ECP_COFACTOR(pECC));
/* montgomery engine (prime) */
if( ippStsNoErr == ippsMontSet((Ipp32u*)BN_NUMBER(ECP_PRIME(pECC)), BN_SIZE32(ECP_PRIME(pECC)), ECP_PMONT(pECC)) ) {
/* modulo reduction and montgomery form of A and B */
PMA_mod(ECP_AENC(pECC), ECP_A(pECC), ECP_PRIME(pECC));
PMA_enc(ECP_AENC(pECC), ECP_AENC(pECC), ECP_PMONT(pECC));
PMA_mod(ECP_BENC(pECC), ECP_B(pECC), ECP_PRIME(pECC));
PMA_enc(ECP_BENC(pECC), ECP_BENC(pECC), ECP_PMONT(pECC));
/* projective coordinates and montgomery form of of Base Point */
if( ( IsZero_BN(ECP_BENC(pECC)) && ECCP_IsPointAtAffineInfinity1(ECP_GX(pECC), ECP_GY(pECC))) ||
(!IsZero_BN(ECP_BENC(pECC)) && ECCP_IsPointAtAffineInfinity0(ECP_GX(pECC), ECP_GY(pECC))) )
ECCP_SetPointToInfinity(ECP_GENC(pECC));
else {
ECP_METHOD(pECC)->SetPointProjective(ECP_GX(pECC), ECP_GY(pECC), BN_ONE_REF(), ECP_GENC(pECC), pECC);
}
}
/* montgomery engine (order) */
if( ippStsNoErr == ippsMontSet((Ipp32u*)BN_NUMBER(ECP_ORDER(pECC)), BN_SIZE32(ECP_ORDER(pECC)), ECP_RMONT(pECC)) )
PMA_enc(ECP_COFACTOR(pECC), ECP_COFACTOR(pECC), ECP_RMONT(pECC));
/* set zero private keys */
BN_Word(ECP_PRIVATE(pECC), 0);
BN_Word(ECP_PRIVATE_E(pECC), 0);
/* set infinity public keys */
ECCP_SetPointToInfinity(ECP_PUBLIC(pECC));
ECCP_SetPointToInfinity(ECP_PUBLIC_E(pECC));
}
IPPFUN(IppStatus, ippsECCPSet, (const IppsBigNumState* pPrime,
const IppsBigNumState* pA, const IppsBigNumState* pB,
const IppsBigNumState* pGX,const IppsBigNumState* pGY,const IppsBigNumState* pOrder,
int cofactor,
IppsECCPState* pECC))
{
/* test pECC */
IPP_BAD_PTR1_RET(pECC);
/* use aligned EC context */
pECC = (IppsECCPState*)( IPP_ALIGNED_PTR(pECC, ALIGN_VAL) );
/* test ID */
IPP_BADARG_RET(!ECP_VALID_ID(pECC), ippStsContextMatchErr);
/* test pPrime */
IPP_BAD_PTR1_RET(pPrime);
pPrime = (IppsBigNumState*)( IPP_ALIGNED_PTR(pPrime, ALIGN_VAL) );
IPP_BADARG_RET(!BN_VALID_ID(pPrime), ippStsContextMatchErr);
IPP_BADARG_RET((cpBN_bitsize(pPrime)>ECP_GFEBITS(pECC)), ippStsRangeErr);
/* test pA and pB */
IPP_BAD_PTR2_RET(pA,pB);
pA = (IppsBigNumState*)( IPP_ALIGNED_PTR(pA, ALIGN_VAL) );
pB = (IppsBigNumState*)( IPP_ALIGNED_PTR(pB, ALIGN_VAL) );
IPP_BADARG_RET(!BN_VALID_ID(pA), ippStsContextMatchErr);
IPP_BADARG_RET(!BN_VALID_ID(pB), ippStsContextMatchErr);
IPP_BADARG_RET((cpBN_bitsize(pA)>ECP_GFEBITS(pECC)), ippStsRangeErr);
IPP_BADARG_RET((cpBN_bitsize(pB)>ECP_GFEBITS(pECC)), ippStsRangeErr);
/* test pG and pGorder pointers */
IPP_BAD_PTR3_RET(pGX,pGY, pOrder);
pGX = (IppsBigNumState*)( IPP_ALIGNED_PTR(pGX, ALIGN_VAL) );
pGY = (IppsBigNumState*)( IPP_ALIGNED_PTR(pGY, ALIGN_VAL) );
pOrder = (IppsBigNumState*)( IPP_ALIGNED_PTR(pOrder, ALIGN_VAL) );
IPP_BADARG_RET(!BN_VALID_ID(pGX), ippStsContextMatchErr);
IPP_BADARG_RET(!BN_VALID_ID(pGY), ippStsContextMatchErr);
IPP_BADARG_RET(!BN_VALID_ID(pOrder), ippStsContextMatchErr);
IPP_BADARG_RET((cpBN_bitsize(pGX)>ECP_GFEBITS(pECC)), ippStsRangeErr);
IPP_BADARG_RET((cpBN_bitsize(pGY)>ECP_GFEBITS(pECC)), ippStsRangeErr);
IPP_BADARG_RET((cpBN_bitsize(pOrder)>ECP_ORDBITS(pECC)), ippStsRangeErr);
/* test cofactor */
IPP_BADARG_RET(!(0<cofactor), ippStsRangeErr);
/* set general methods */
*(ECP_METHOD(pECC)) = *(ECCPcom_Methods());
/* set domain parameters */
ECCPSetDP(IppECCArbitrary,
BN_SIZE32(pPrime), (Ipp32u*)BN_NUMBER(pPrime),
BN_SIZE32(pA), (Ipp32u*)BN_NUMBER(pA),
BN_SIZE32(pB), (Ipp32u*)BN_NUMBER(pB),
BN_SIZE32(pGX), (Ipp32u*)BN_NUMBER(pGX),
BN_SIZE32(pGY), (Ipp32u*)BN_NUMBER(pGY),
BN_SIZE32(pOrder), (Ipp32u*)BN_NUMBER(pOrder),
cofactor,
pECC);
return ippStsNoErr;
}
/*F*
// Name: ippsECCPSetStd
//
// Purpose: Set Standard ECC Domain Parameter.
//
// Returns: Reason:
// ippStsNullPtrErr NULL == pECC
//
// ippStsContextMatchErr illegal pECC->idCtx
//
// ippStsECCInvalidFlagErr invalid flag
//
// ippStsNoErr no errors
//
// Parameters:
// flag specify standard ECC parameter(s) to be setup
// pECC pointer to the ECC context
//
*F*/
IPPFUN(IppStatus, ippsECCPSetStd, (IppECCType flag, IppsECCPState* pECC))
{
/* test pECC */
IPP_BAD_PTR1_RET(pECC);
/* use aligned EC context */
pECC = (IppsECCPState*)( IPP_ALIGNED_PTR(pECC, ALIGN_VAL) );
/* test ID */
IPP_BADARG_RET(!ECP_VALID_ID(pECC), ippStsContextMatchErr);
*(ECP_METHOD(pECC)) = *(ECCPcom_Methods());
switch(flag) {
case IppECCPStd112r1:
ECCPSetDP(IppECCPStd112r1,
BITS2WORD32_SIZE(112), secp112r1_p,
BITS2WORD32_SIZE(112), secp112r1_a,
BITS2WORD32_SIZE(112), secp112r1_b,
BITS2WORD32_SIZE(112), secp112r1_gx,
BITS2WORD32_SIZE(112), secp112r1_gy,
BITS2WORD32_SIZE(112), secp112r1_r,
secp112r1_h, pECC);
break;
case IppECCPStd112r2:
ECCPSetDP(IppECCPStd112r2,
BITS2WORD32_SIZE(112), secp112r2_p,
BITS2WORD32_SIZE(112), secp112r2_a,
BITS2WORD32_SIZE(112), secp112r2_b,
BITS2WORD32_SIZE(112), secp112r2_gx,
BITS2WORD32_SIZE(112), secp112r2_gy,
BITS2WORD32_SIZE(112), secp112r2_r,
secp112r2_h, pECC);
break;
case IppECCPStd128r1:
ECCPSetDP(IppECCPStd128r1,
BITS2WORD32_SIZE(128), secp128r1_p,
BITS2WORD32_SIZE(128), secp128r1_a,
BITS2WORD32_SIZE(128), secp128r1_b,
BITS2WORD32_SIZE(128), secp128r1_gx,
BITS2WORD32_SIZE(128), secp128r1_gy,
BITS2WORD32_SIZE(128), secp128r1_r,
secp128r1_h, pECC);
break;
case IppECCPStd128r2:
ECCPSetDP(IppECCPStd128r2,
BITS2WORD32_SIZE(128), secp128r2_p,
BITS2WORD32_SIZE(128), secp128r2_a,
BITS2WORD32_SIZE(128), secp128r2_b,
BITS2WORD32_SIZE(128), secp128r2_gx,
BITS2WORD32_SIZE(128), secp128r2_gy,
BITS2WORD32_SIZE(128), secp128r2_r,
secp128r2_h, pECC);
break;
case IppECCPStd160r1:
ECCPSetDP(IppECCPStd160r1,
BITS2WORD32_SIZE(160), secp160r1_p,
BITS2WORD32_SIZE(160), secp160r1_a,
BITS2WORD32_SIZE(160), secp160r1_b,
BITS2WORD32_SIZE(160), secp160r1_gx,
BITS2WORD32_SIZE(160), secp160r1_gy,
BITS2WORD32_SIZE(161), secp160r1_r,
secp160r1_h, pECC);
break;
case IppECCPStd160r2:
ECCPSetDP(IppECCPStd160r2,
BITS2WORD32_SIZE(160), secp160r2_p,
BITS2WORD32_SIZE(160), secp160r2_a,
BITS2WORD32_SIZE(160), secp160r2_b,
BITS2WORD32_SIZE(160), secp160r2_gx,
BITS2WORD32_SIZE(160), secp160r2_gy,
BITS2WORD32_SIZE(161), secp160r2_r,
secp160r2_h, pECC);
break;
case IppECCPStd192r1:
ECCPSetDP(IppECCPStd192r1,
BITS2WORD32_SIZE(192), secp192r1_p,
BITS2WORD32_SIZE(192), secp192r1_a,
BITS2WORD32_SIZE(192), secp192r1_b,
BITS2WORD32_SIZE(192), secp192r1_gx,
BITS2WORD32_SIZE(192), secp192r1_gy,
BITS2WORD32_SIZE(192), secp192r1_r,
secp192r1_h, pECC);
break;
case IppECCPStd224r1:
ECCPSetDP(IppECCPStd224r1,
BITS2WORD32_SIZE(224), secp224r1_p,
BITS2WORD32_SIZE(224), secp224r1_a,
BITS2WORD32_SIZE(224), secp224r1_b,
BITS2WORD32_SIZE(224), secp224r1_gx,
BITS2WORD32_SIZE(224), secp224r1_gy,
BITS2WORD32_SIZE(224), secp224r1_r,
secp224r1_h, pECC);
break;
case IppECCPStd256r1:
ECCPSetDP(IppECCPStd256r1,
BITS2WORD32_SIZE(256), secp256r1_p,
BITS2WORD32_SIZE(256), secp256r1_a,
BITS2WORD32_SIZE(256), secp256r1_b,
BITS2WORD32_SIZE(256), secp256r1_gx,
BITS2WORD32_SIZE(256), secp256r1_gy,
BITS2WORD32_SIZE(256), secp256r1_r,
secp256r1_h, pECC);
break;
case IppECCPStd384r1:
ECCPSetDP(IppECCPStd384r1,
BITS2WORD32_SIZE(384), secp384r1_p,
BITS2WORD32_SIZE(384), secp384r1_a,
BITS2WORD32_SIZE(384), secp384r1_b,
BITS2WORD32_SIZE(384), secp384r1_gx,
BITS2WORD32_SIZE(384), secp384r1_gy,
BITS2WORD32_SIZE(384), secp384r1_r,
secp384r1_h, pECC);
break;
case IppECCPStd521r1:
ECCPSetDP(IppECCPStd521r1,
BITS2WORD32_SIZE(521), secp521r1_p,
BITS2WORD32_SIZE(521), secp521r1_a,
BITS2WORD32_SIZE(521), secp521r1_b,
BITS2WORD32_SIZE(521), secp521r1_gx,
BITS2WORD32_SIZE(521), secp521r1_gy,
BITS2WORD32_SIZE(521), secp521r1_r,
secp521r1_h, pECC);
break;
default:
return ippStsECCInvalidFlagErr;
}
return ippStsNoErr;
}

107
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@ -1,107 +0,0 @@
/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "owndefs.h"
#include "owncp.h"
#include "pcpeccppoint.h"
#include "pcpeccpmethod.h"
#include "pcpeccpmethodcom.h"
/*F*
// Name: ippsECCPGenKeyPair
//
// Purpose: Generate (private,public) Key Pair
//
// Returns: Reason:
// ippStsNullPtrErr NULL == pECC
// NULL == pPrivate
// NULL == pPublic
//
// ippStsContextMatchErr illegal pECC->idCtx
// illegal pPrivate->idCtx
// illegal pPublic->idCtx
//
// ippStsNoErr no errors
//
// Parameters:
// pPrivate pointer to the resultant private key
// pPublic pointer to the resultant public key
// pECC pointer to the ECCP context
//
*F*/
IPPFUN(IppStatus, ippsECCPGenKeyPair, (IppsBigNumState* pPrivate, IppsECCPPointState* pPublic,
IppsECCPState* pECC,
IppBitSupplier rndFunc, void* pRndParam))
{
IPP_BAD_PTR2_RET(pECC, rndFunc);
/* use aligned EC context */
pECC = (IppsECCPState*)( IPP_ALIGNED_PTR(pECC, ALIGN_VAL) );
/* test ID */
IPP_BADARG_RET(!ECP_VALID_ID(pECC), ippStsContextMatchErr);
/* test private/public keys */
IPP_BAD_PTR2_RET(pPrivate,pPublic);
pPrivate = (IppsBigNumState*)( IPP_ALIGNED_PTR(pPrivate, ALIGN_VAL) );
pPublic = (IppsECCPPointState*)( IPP_ALIGNED_PTR(pPublic, ALIGN_VAL) );
IPP_BADARG_RET(!BN_VALID_ID(pPrivate), ippStsContextMatchErr);
IPP_BADARG_RET((BN_ROOM(pPrivate)*BITSIZE(BNU_CHUNK_T)<ECP_ORDBITS(pECC)), ippStsSizeErr);
IPP_BADARG_RET(!ECP_POINT_VALID_ID(pPublic), ippStsContextMatchErr);
{
/*
// generate random private key X: 0 < X < R
*/
int reqBitLen = ECP_ORDBITS(pECC);
IppsBigNumState* pOrder = ECP_ORDER(pECC);
int xSize;
Ipp32u* pX = (Ipp32u*)BN_NUMBER(pPrivate);
Ipp32u xMask = MAKEMASK32(reqBitLen);
BN_SIGN(pPrivate) = ippBigNumPOS;
do {
xSize = BITS2WORD32_SIZE(reqBitLen);
rndFunc(pX, reqBitLen, pRndParam);
pX[xSize-1] &= xMask;
FIX_BNU(pX, xSize);
BN_SIZE(pPrivate) = INTERNAL_BNU_LENGTH(xSize);
} while( (0 == cpBN_tst(pPrivate)) ||
(0 <= cpBN_cmp(pPrivate, pOrder)) );
/* calculate public key */
ECP_METHOD(pECC)->MulBasePoint(pPrivate, pPublic, pECC, ECP_BNCTX(pECC));
return ippStsNoErr;
}
}

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@ -1,305 +0,0 @@
/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "owndefs.h"
#include "owncp.h"
#include "pcpeccp.h"
#include "pcpeccppoint.h"
#include "pcpbnresource.h"
#include "pcpeccpmethod.h"
#include "pcpeccpsscm.h"
#include "pcptool.h"
/*F*
// Name: ippsECCPGetSize
//
// Purpose: Returns size of ECC context (bytes).
//
// Returns: Reason:
// ippStsNullPtrErr NULL == pSize
//
// ippStsSizeErr 2>feBitSize
//
// ippStsNoErr no errors
//
// Parameters:
// feBitSize size of field element (bits)
// pSize pointer to the size of internal ECC context
//
*F*/
IPPFUN(IppStatus, ippsECCPGetSize, (int feBitSize, int *pSize))
{
/* test size's pointer */
IPP_BAD_PTR1_RET(pSize);
/* test size of field element */
IPP_BADARG_RET((2>feBitSize || feBitSize>EC_GFP_MAXBITSIZE), ippStsSizeErr);
{
int bn1Size;
int bn2Size;
int pointSize;
int mont1Size;
int mont2Size;
int primeSize;
int listSize;
/* size of field element */
int gfeSize = BITS2WORD32_SIZE(feBitSize);
/* size of order */
int ordSize = BITS2WORD32_SIZE(feBitSize+1);
/* size of sscm buffer */
int w = cpECCP_OptimalWinSize(feBitSize+1);
int nPrecomputed = 1<<w;
int sscmBuffSize = nPrecomputed*(BITS_BNU_CHUNK(feBitSize)*3*sizeof(BNU_CHUNK_T)) +(CACHE_LINE_SIZE-1);
/* size of BigNum over GF(p) */
ippsBigNumGetSize(gfeSize, &bn1Size);
/* size of BigNum over GF(r) */
ippsBigNumGetSize(ordSize, &bn2Size);
/* size of EC point over GF(p) */
ippsECCPPointGetSize(feBitSize, &pointSize);
/* size of montgomery engine over GF(p) */
ippsMontGetSize(ippBinaryMethod, BITS2WORD32_SIZE(feBitSize), &mont1Size);
/* size of montgomery engine over GF(r) */
ippsMontGetSize(ippBinaryMethod, BITS2WORD32_SIZE(feBitSize+1), &mont2Size);
/* size of prime engine */
ippsPrimeGetSize(feBitSize+1, &primeSize);
/* size of big num list (big num in the list preserve 32 bit word) */
listSize = cpBigNumListGetSize(feBitSize+1, BNLISTSIZE);
*pSize = sizeof(IppsECCPState)
+sizeof(ECCP_METHOD) /* methods */
+bn1Size /* prime */
+bn1Size /* A */
+bn1Size /* B */
+bn1Size /* GX */
+bn1Size /* GY */
+bn2Size /* order */
+bn1Size /* Aenc */
+bn1Size /* Benc */
+mont1Size /* montgomery(p) */
+pointSize /* Genc */
+bn2Size /* cofactor */
+mont2Size /* montgomery(r) */
+bn2Size /* private */
+pointSize /* public */
+bn2Size /* eph private */
+pointSize /* eph public */
+primeSize /* prime engine */
+sscmBuffSize /* sscm buffer */
+listSize /* temp big num */
+(ALIGN_VAL-1);
}
return ippStsNoErr;
}
/*F*
// Name: ippsECCPInit
//
// Purpose: Init ECC context.
//
// Returns: Reason:
// ippStsNullPtrErr NULL == pECC
//
// ippStsSizeErr 2>feBitSize
//
// ippStsNoErr no errors
//
// Parameters:
// feBitSize size of field element (bits)
// pECC pointer to the ECC context
//
*F*/
IPPFUN(IppStatus, ippsECCPInit, (int feBitSize, IppsECCPState* pECC))
{
/* test pECC pointer */
IPP_BAD_PTR1_RET(pECC);
/* use aligned EC context */
pECC = (IppsECCPState*)( IPP_ALIGNED_PTR(pECC, ALIGN_VAL) );
/* test size of field element */
IPP_BADARG_RET((2>feBitSize || feBitSize>EC_GFP_MAXBITSIZE), ippStsSizeErr);
/* clear context */
PaddBlock(0, pECC, sizeof(IppsECCPState));
/* context ID */
ECP_ID(pECC) = idCtxECCP;
/* generic EC */
ECP_TYPE(pECC) = IppECCArbitrary;
/* size of field element & BP order */
ECP_GFEBITS(pECC) = feBitSize;
ECP_ORDBITS(pECC) = feBitSize+1;
/*
// init other context fields
*/
{
int bn1Size;
int bn2Size;
int pointSize;
int mont1Size;
int mont2Size;
int primeSize;
/* size of field element */
int gfeSize = BITS2WORD32_SIZE(feBitSize);
/* size of order */
int ordSize = BITS2WORD32_SIZE(feBitSize+1);
/* size of sscm buffer */
int w = cpECCP_OptimalWinSize(feBitSize+1);
int nPrecomputed = 1<<w;
int sscmBuffSize = nPrecomputed*(BITS_BNU_CHUNK(feBitSize)*3*sizeof(BNU_CHUNK_T)) +(CACHE_LINE_SIZE-1);
Ipp8u* ptr = (Ipp8u*)pECC;
/* size of BigNum over GF(p) */
ippsBigNumGetSize(gfeSize, &bn1Size);
/* size of BigNum over GF(r) */
ippsBigNumGetSize(ordSize, &bn2Size);
/* size of EC point over GF(p) */
ippsECCPPointGetSize(feBitSize, &pointSize);
/* size of montgomery engine over GF(p) */
ippsMontGetSize(ippBinaryMethod, BITS2WORD32_SIZE(feBitSize), &mont1Size);
/* size of montgomery engine over GF(r) */
ippsMontGetSize(ippBinaryMethod, BITS2WORD32_SIZE(feBitSize+1), &mont2Size);
/* size of prime engine */
ippsPrimeGetSize(feBitSize+1, &primeSize);
/* size of big num list */
/* listSize = cpBigNumListGetSize(feBitSize+1+32, BNLISTSIZE); */
/* allocate buffers */
ptr += sizeof(IppsECCPState);
ECP_METHOD(pECC) = (ECCP_METHOD*) (ptr);
ptr += sizeof(ECCP_METHOD);
ECP_PRIME(pECC) = (IppsBigNumState*) ( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
ptr += bn1Size;
ECP_A(pECC) = (IppsBigNumState*) ( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
ptr += bn1Size;
ECP_B(pECC) = (IppsBigNumState*) ( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
ptr += bn1Size;
ECP_GX(pECC) = (IppsBigNumState*) ( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
ptr += bn1Size;
ECP_GY(pECC) = (IppsBigNumState*) ( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
ptr += bn1Size;
ECP_ORDER(pECC) = (IppsBigNumState*) ( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
ptr += bn2Size;
ECP_AENC(pECC) = (IppsBigNumState*) ( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
ptr += bn1Size;
ECP_BENC(pECC) = (IppsBigNumState*) ( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
ptr += bn1Size;
ECP_PMONT(pECC) = (IppsMontState*) ( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
ptr += mont1Size;
ECP_GENC(pECC) = (IppsECCPPointState*)( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
ptr += pointSize;
ECP_COFACTOR(pECC)= (IppsBigNumState*) ( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
ptr += bn2Size;
ECP_RMONT(pECC) = (IppsMontState*) ( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
ptr += mont2Size;
ECP_PRIVATE(pECC) = (IppsBigNumState*) ( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
ptr += bn2Size;
ECP_PUBLIC(pECC) = (IppsECCPPointState*)( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
ptr += pointSize;
ECP_PRIVATE_E(pECC) = (IppsBigNumState*) ( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
ptr += bn2Size;
ECP_PUBLIC_E(pECC) =(IppsECCPPointState*)( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
ptr += pointSize;
ECP_PRIMARY(pECC) = (IppsPrimeState*) ( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
ptr += primeSize;
ECP_SCCMBUFF(pECC) = (Ipp8u*) ( IPP_ALIGNED_PTR(ptr,CACHE_LINE_SIZE) );
ptr += sscmBuffSize;
ECP_BNCTX(pECC) = (BigNumNode*) ( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
/* init buffers */
ippsBigNumInit(gfeSize, ECP_PRIME(pECC));
ippsBigNumInit(gfeSize, ECP_A(pECC));
ippsBigNumInit(gfeSize, ECP_B(pECC));
ippsBigNumInit(gfeSize, ECP_GX(pECC));
ippsBigNumInit(gfeSize, ECP_GY(pECC));
ippsBigNumInit(ordSize, ECP_ORDER(pECC));
ippsBigNumInit(gfeSize, ECP_AENC(pECC));
ippsBigNumInit(gfeSize, ECP_BENC(pECC));
ippsMontInit(ippBinaryMethod, BITS2WORD32_SIZE(feBitSize), ECP_PMONT(pECC));
ippsECCPPointInit(feBitSize, ECP_GENC(pECC));
ippsBigNumInit(ordSize, ECP_COFACTOR(pECC));
ippsMontInit(ippBinaryMethod, BITS2WORD32_SIZE(feBitSize+1), ECP_RMONT(pECC));
ippsBigNumInit(ordSize, ECP_PRIVATE(pECC));
ippsECCPPointInit(feBitSize,ECP_PUBLIC(pECC));
ippsBigNumInit(ordSize, ECP_PRIVATE_E(pECC));
ippsECCPPointInit(feBitSize,ECP_PUBLIC_E(pECC));
cpBigNumListInit(feBitSize+1, BNLISTSIZE, ECP_BNCTX(pECC));
}
return ippStsNoErr;
}

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@ -1,93 +0,0 @@
/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#if !defined(_PCP_ECCP_METHOD_H)
#define _PCP_ECCP_METHOD_H
/*
// Point Operation Prototypes
*/
struct eccp_method_st {
void (*SetPointProjective)(const IppsBigNumState* pX,
const IppsBigNumState* pY,
const IppsBigNumState* pZ,
IppsECCPPointState* pPoint,
const IppsECCPState* pECC);
void (*SetPointAffine)(const IppsBigNumState* pX,
const IppsBigNumState* pY,
IppsECCPPointState* pPoint,
const IppsECCPState* pECC);
void (*GetPointAffine)(IppsBigNumState* pX,
IppsBigNumState* pY,
const IppsECCPPointState* pPoint,
const IppsECCPState* pECC,
BigNumNode* pList);
int (*IsPointOnCurve)(const IppsECCPPointState* pPoint,
const IppsECCPState* pECC,
BigNumNode* pList);
int (*ComparePoint)(const IppsECCPPointState* pP,
const IppsECCPPointState* pQ,
const IppsECCPState* pECC,
BigNumNode* pList);
void (*NegPoint)(const IppsECCPPointState* pP,
IppsECCPPointState* pR,
const IppsECCPState* pECC);
void (*DblPoint)(const IppsECCPPointState* pP,
IppsECCPPointState* pR,
const IppsECCPState* pECC,
BigNumNode* pList);
void (*AddPoint)(const IppsECCPPointState* pP,
const IppsECCPPointState* pQ,
IppsECCPPointState* pR,
const IppsECCPState* pECC,
BigNumNode* pList);
void (*MulPoint)(const IppsECCPPointState* pP,
const IppsBigNumState* pK,
IppsECCPPointState* pR,
const IppsECCPState* pECC,
BigNumNode* pList);
void (*MulBasePoint)(const IppsBigNumState* pK,
IppsECCPPointState* pR,
const IppsECCPState* pECC,
BigNumNode* pList);
void (*ProdPoint)(const IppsECCPPointState* pP,
const IppsBigNumState* bnPscalar,
const IppsECCPPointState* pQ,
const IppsBigNumState* bnQscalar,
IppsECCPPointState* pR,
const IppsECCPState* pECC,
BigNumNode* pList);
};
#endif /* _PCP_ECCP_METHOD_H */

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/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#if !defined(_PCP_ECCPMETHODCOM_H)
#define _PCP_ECCPMETHODCOM_H
#include "pcpeccp.h"
/*
// Returns reference
*/
ECCP_METHOD* ECCPcom_Methods(void);
/*
// Copy
*/
void ECCP_CopyPoint(const IppsECCPPointState* pSrc, IppsECCPPointState* pDst);
/*
// Point Set. These operations implies
// transformation of regular coordinates into internal format
*/
void ECCP_SetPointProjective(const IppsBigNumState* pX,
const IppsBigNumState* pY,
const IppsBigNumState* pZ,
IppsECCPPointState* pPoint,
const IppsECCPState* pECC);
void ECCP_SetPointAffine(const IppsBigNumState* pX,
const IppsBigNumState* pY,
IppsECCPPointState* pPoint,
const IppsECCPState* pECC);
/*
// Get Point. These operations implies
// transformation of internal format coordinates into regular
*/
void ECCP_GetPointAffine(IppsBigNumState* pX,
IppsBigNumState* pY,
const IppsECCPPointState* pPoint,
const IppsECCPState* pECC,
BigNumNode* pList);
/*
// Set To Infinity
*/
void ECCP_SetPointToInfinity(IppsECCPPointState* pPoint);
void ECCP_SetPointToAffineInfinity0(IppsBigNumState* pX, IppsBigNumState* pY);
void ECCP_SetPointToAffineInfinity1(IppsBigNumState* pX, IppsBigNumState* pY);
/*
// Test Is At Infinity
// Test is On EC
*/
int ECCP_IsPointAtInfinity(const IppsECCPPointState* pPoint);
int ECCP_IsPointAtAffineInfinity0(const IppsBigNumState* pX, const IppsBigNumState* pY);
int ECCP_IsPointAtAffineInfinity1(const IppsBigNumState* pX, const IppsBigNumState* pY);
int ECCP_IsPointOnCurve(const IppsECCPPointState* pPoint,
const IppsECCPState* pECC,
BigNumNode* pList);
/*
// Operations
*/
int ECCP_ComparePoint(const IppsECCPPointState* pP,
const IppsECCPPointState* pQ,
const IppsECCPState* pECC,
BigNumNode* pList);
void ECCP_NegPoint(const IppsECCPPointState* pP,
IppsECCPPointState* pR,
const IppsECCPState* pECC);
void ECCP_DblPoint(const IppsECCPPointState* pP,
IppsECCPPointState* pR,
const IppsECCPState* pECC,
BigNumNode* pList);
void ECCP_AddPoint(const IppsECCPPointState* pP,
const IppsECCPPointState* pQ,
IppsECCPPointState* pR,
const IppsECCPState* pECC,
BigNumNode* pList);
void ECCP_MulPoint(const IppsECCPPointState* pP,
const IppsBigNumState* pK,
IppsECCPPointState* pR,
const IppsECCPState* pECC,
BigNumNode* pList);
void ECCP_MulBasePoint(const IppsBigNumState* pK,
IppsECCPPointState* pR,
const IppsECCPState* pECC,
BigNumNode* pList);
void ECCP_ProdPoint(const IppsECCPPointState* pP,
const IppsBigNumState* bnPscalar,
const IppsECCPPointState* pQ,
const IppsBigNumState* bnQscalar,
IppsECCPPointState* pR,
const IppsECCPState* pECC,
BigNumNode* pList);
#endif /* _PCP_ECCPMETHODCOM_H */

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@ -1,731 +0,0 @@
/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "owndefs.h"
#include "owncp.h"
#include "pcpeccppoint.h"
#include "pcpeccpmethod.h"
#include "pcpeccpmethodcom.h"
#include "pcppma.h"
#include "pcpeccpsscm.h"
static
ECCP_METHOD ECCPcom = {
ECCP_SetPointProjective,
ECCP_SetPointAffine,
ECCP_GetPointAffine,
ECCP_IsPointOnCurve,
ECCP_ComparePoint,
ECCP_NegPoint,
ECCP_DblPoint,
ECCP_AddPoint,
ECCP_MulPoint,
ECCP_MulBasePoint,
ECCP_ProdPoint
};
/*
// Returns reference
*/
ECCP_METHOD* ECCPcom_Methods(void)
{
return &ECCPcom;
}
/*
// Copy Point
*/
void ECCP_CopyPoint(const IppsECCPPointState* pSrc, IppsECCPPointState* pDst)
{
cpBN_copy(ECP_POINT_X(pDst), ECP_POINT_X(pSrc));
cpBN_copy(ECP_POINT_Y(pDst), ECP_POINT_Y(pSrc));
cpBN_copy(ECP_POINT_Z(pDst), ECP_POINT_Z(pSrc));
ECP_POINT_AFFINE(pDst) = ECP_POINT_AFFINE(pSrc);
}
/*
// ECCP_PoinSettProjective
// Converts regular projective triplet (pX,pY,pZ) into pPoint
// (see note above)
*/
void ECCP_SetPointProjective(const IppsBigNumState* pX,
const IppsBigNumState* pY,
const IppsBigNumState* pZ,
IppsECCPPointState* pPoint,
const IppsECCPState* pECC)
{
IppsMontState* pMont = ECP_PMONT(pECC);
PMA_enc(ECP_POINT_X(pPoint), (IppsBigNumState*)pX, pMont);
PMA_enc(ECP_POINT_Y(pPoint), (IppsBigNumState*)pY, pMont);
PMA_enc(ECP_POINT_Z(pPoint), (IppsBigNumState*)pZ, pMont);
ECP_POINT_AFFINE(pPoint) = cpBN_cmp(pZ, BN_ONE_REF())==0;
}
/*
// ECCP_PointAffineSet
// Converts regular affine pair (pX,pY) into pPoint
*/
void ECCP_SetPointAffine(const IppsBigNumState* pX,
const IppsBigNumState* pY,
IppsECCPPointState* pPoint,
const IppsECCPState* pECC)
{
IppsMontState* pMont = ECP_PMONT(pECC);
PMA_enc(ECP_POINT_X(pPoint), (IppsBigNumState*)pX, pMont);
PMA_enc(ECP_POINT_Y(pPoint), (IppsBigNumState*)pY, pMont);
PMA_enc(ECP_POINT_Z(pPoint), (IppsBigNumState*)cpBN_OneRef(), pMont);
ECP_POINT_AFFINE(pPoint) = 1;
}
/*
// ECCP_GetPointAffine
//
// Converts pPoint into regular affine pair (pX,pY)
//
// Note:
// pPoint is not point at Infinity
// transform (X, Y, Z) into (x, y) = (X/Z^2, Y/Z^3)
*/
void ECCP_GetPointAffine(IppsBigNumState* pX, IppsBigNumState* pY,
const IppsECCPPointState* pPoint,
const IppsECCPState* pECC,
BigNumNode* pList)
{
IppsMontState* pMont = ECP_PMONT(pECC);
/* case Z == 1 */
if( ECP_POINT_AFFINE(pPoint) ) {
if(pX) {
PMA_dec(pX, ECP_POINT_X(pPoint), pMont);
}
if(pY) {
PMA_dec(pY, ECP_POINT_Y(pPoint), pMont);
}
}
/* case Z != 1 */
else {
IppsBigNumState* pT = cpBigNumListGet(&pList);
IppsBigNumState* pU = cpBigNumListGet(&pList);
IppsBigNumState* pModulo = ECP_PRIME(pECC);
/* decode Z */
PMA_dec(pU, ECP_POINT_Z(pPoint), pMont);
/* regular T = Z^-1 */
PMA_inv(pT, pU, pModulo);
/* montgomery U = Z^-1 */
PMA_enc(pU, pT, pMont);
/* regular T = Z^-2 */
PMA_mule(pT, pU, pT, pMont);
if(pX) {
PMA_mule(pX,pT, ECP_POINT_X(pPoint), pMont);
}
if(pY) {
/* regular U = Z^-3 */
PMA_mule(pU, pU, pT, pMont);
PMA_mule(pY,pU, ECP_POINT_Y(pPoint), pMont);
}
}
}
/*
// ECCP_SetPointToInfinity
// ECCP_SetPointToAffineInfinity0
// ECCP_SetPointToAffineInfinity1
//
// Set point to Infinity
*/
void ECCP_SetPointToInfinity(IppsECCPPointState* pPoint)
{
cpBN_zero(ECP_POINT_X(pPoint));
cpBN_zero(ECP_POINT_Y(pPoint));
cpBN_zero(ECP_POINT_Z(pPoint));
ECP_POINT_AFFINE(pPoint) = 0;
}
void ECCP_SetPointToAffineInfinity0(IppsBigNumState* pX, IppsBigNumState* pY)
{
if(pX) cpBN_zero(pX);
if(pY) cpBN_zero(pY);
}
void ECCP_SetPointToAffineInfinity1(IppsBigNumState* pX, IppsBigNumState* pY)
{
if(pX) cpBN_zero(pX);
if(pY) BN_Word(pY,1);
}
/*
// ECCP_IsPointAtInfinity
// ECCP_IsPointAtAffineInfinity0
// ECCP_IsPointAtAffineInfinity1
//
// Test point is at Infinity
*/
int ECCP_IsPointAtInfinity(const IppsECCPPointState* pPoint)
{
return IsZero_BN( ECP_POINT_Z(pPoint) );
}
int ECCP_IsPointAtAffineInfinity0(const IppsBigNumState* pX, const IppsBigNumState* pY)
{
return IsZero_BN(pX) && IsZero_BN(pY);
}
int ECCP_IsPointAtAffineInfinity1(const IppsBigNumState* pX, const IppsBigNumState* pY)
{
return IsZero_BN(pX) && !IsZero_BN(pY);
}
/*
// ECCP_IsPointOnCurve
//
// Test point is lie on curve
//
// Note
// We deal with equation: y^2 = x^3 + A*x + B.
// Or in projective coordinates: Y^2 = X^3 + a*X*Z^4 + b*Z^6.
// The point under test is given by projective triplet (X,Y,Z),
// which represents actually (x,y) = (X/Z^2,Y/Z^3).
*/
int ECCP_IsPointOnCurve(const IppsECCPPointState* pPoint,
const IppsECCPState* pECC,
BigNumNode* pList)
{
/* let think Infinity point is on the curve */
if( ECCP_IsPointAtInfinity(pPoint) )
return 1;
else {
IppsMontState* pMont = ECP_PMONT(pECC);
IppsBigNumState* pR = cpBigNumListGet(&pList);
IppsBigNumState* pT = cpBigNumListGet(&pList);
IppsBigNumState* pModulo = ECP_PRIME(pECC);
PMA_sqre(pR, ECP_POINT_X(pPoint), pMont); // R = X^3
PMA_mule(pR, pR, ECP_POINT_X(pPoint), pMont);
/* case Z != 1 */
if( !ECP_POINT_AFFINE(pPoint) ) {
IppsBigNumState* pZ4 = cpBigNumListGet(&pList);
IppsBigNumState* pZ6 = cpBigNumListGet(&pList);
PMA_sqre(pT, ECP_POINT_Z(pPoint), pMont); // Z^2
PMA_sqre(pZ4, pT, pMont); // Z^4
PMA_mule(pZ6, pZ4, pT, pMont); // Z^6
PMA_mule(pT, pZ4, ECP_POINT_X(pPoint), pMont); // T = X*Z^4
if( ECP_AMI3(pECC) ) {
IppsBigNumState* pU = cpBigNumListGet(&pList);
PMA_add(pU, pT, pT, pModulo); // R = X^3 +a*X*Z^4
PMA_add(pU, pU, pT, pModulo);
PMA_sub(pR, pR, pU, pModulo);
}
else {
PMA_mule(pT, pT, ECP_AENC(pECC), pMont); // R = X^3 +a*X*Z^4
PMA_add(pR, pR, pT, pModulo);
}
PMA_mule(pT, pZ6, ECP_BENC(pECC), pMont); // R = X^3 +a*X*Z^4 + b*Z^6
PMA_add(pR, pR, pT, pModulo);
}
/* case Z == 1 */
else {
if( ECP_AMI3(pECC) ) {
PMA_add(pT, ECP_POINT_X(pPoint), ECP_POINT_X(pPoint), pModulo); // R = X^3 +a*X
PMA_add(pT, pT, ECP_POINT_X(pPoint), pModulo);
PMA_sub(pR, pR, pT, pModulo);
}
else {
PMA_mule(pT, ECP_POINT_X(pPoint), ECP_AENC(pECC), pMont); // R = X^3 +a*X
PMA_add(pR, pR, pT, pModulo);
}
PMA_add(pR, pR, ECP_BENC(pECC), pModulo); // R = X^3 +a*X + b
}
PMA_sqre(pT, ECP_POINT_Y(pPoint), pMont); // T = Y^2
return 0==cpBN_cmp(pR, pT);
}
}
/*
// ECCP_ComparePoint
//
// Compare two points:
// returns 0 => pP==pQ (maybe both pP and pQ are at Infinity)
// returns 1 => pP!=pQ
//
// Note
// In general we check:
// P_X*Q_Z^2 ~ Q_X*P_Z^2
// P_Y*Q_Z^3 ~ Q_Y*P_Z^3
*/
int ECCP_ComparePoint(const IppsECCPPointState* pP,
const IppsECCPPointState* pQ,
const IppsECCPState* pECC,
BigNumNode* pList)
{
/* P or/and Q at Infinity */
if( ECCP_IsPointAtInfinity(pP) )
return ECCP_IsPointAtInfinity(pQ)? 0:1;
if( ECCP_IsPointAtInfinity(pQ) )
return ECCP_IsPointAtInfinity(pP)? 0:1;
/* (P_Z==1) && (Q_Z==1) */
if( ECP_POINT_AFFINE(pP) && ECP_POINT_AFFINE(pQ) )
return ((0==cpBN_cmp(ECP_POINT_X(pP),ECP_POINT_X(pQ))) && (0==cpBN_cmp(ECP_POINT_Y(pP),ECP_POINT_Y(pQ))))? 0:1;
{
IppsMontState* pMont = ECP_PMONT(pECC);
IppsBigNumState* pPtmp = cpBigNumListGet(&pList);
IppsBigNumState* pQtmp = cpBigNumListGet(&pList);
IppsBigNumState* pPZ = cpBigNumListGet(&pList);
IppsBigNumState* pQZ = cpBigNumListGet(&pList);
/* P_X*Q_Z^2 ~ Q_X*P_Z^2 */
if( !ECP_POINT_AFFINE(pQ) ) {
PMA_sqre(pQZ, ECP_POINT_Z(pQ), pMont); /* Ptmp = P_X*Q_Z^2 */
PMA_mule(pPtmp, ECP_POINT_X(pP), pQZ, pMont);
}
else {
PMA_set(pPtmp, ECP_POINT_X(pP));
}
if( !ECP_POINT_AFFINE(pP) ) {
PMA_sqre(pPZ, ECP_POINT_Z(pP), pMont); /* Qtmp = Q_X*P_Z^2 */
PMA_mule(pQtmp, ECP_POINT_X(pQ), pPZ, pMont);
}
else {
PMA_set(pQtmp, ECP_POINT_X(pQ));
}
if ( cpBN_cmp(pPtmp, pQtmp) )
return 1; /* points are different: (P_X*Q_Z^2) != (Q_X*P_Z^2) */
/* P_Y*Q_Z^3 ~ Q_Y*P_Z^3 */
if( !ECP_POINT_AFFINE(pQ) ) {
PMA_mule(pQZ, pQZ, ECP_POINT_Z(pQ), pMont); /* Ptmp = P_Y*Q_Z^3 */
PMA_mule(pPtmp, ECP_POINT_Y(pP), pQZ, pMont);
}
else {
PMA_set(pPtmp, ECP_POINT_Y(pP));
}
if( !ECP_POINT_AFFINE(pP) ) {
PMA_mule(pPZ, pPZ, ECP_POINT_Z(pP), pMont); /* Qtmp = Q_Y*P_Z^3 */
PMA_mule(pQtmp, ECP_POINT_Y(pQ), pPZ, pMont);
}
else {
PMA_set(pQtmp, ECP_POINT_Y(pQ));
}
return cpBN_cmp(pPtmp, pQtmp)? 1:0;
}
}
/*
// ECCP_NegPoint
//
// Negative point
*/
void ECCP_NegPoint(const IppsECCPPointState* pP,
IppsECCPPointState* pR,
const IppsECCPState* pECC)
{
/* test point at Infinity */
if( ECCP_IsPointAtInfinity(pP) )
ECCP_SetPointToInfinity(pR);
else {
IppsBigNumState* pModulo = ECP_PRIME(pECC);
if( pP!=pR ) {
PMA_set(ECP_POINT_X(pR), ECP_POINT_X(pP));
PMA_set(ECP_POINT_Z(pR), ECP_POINT_Z(pP));
}
PMA_sub(ECP_POINT_Y(pR), pModulo, ECP_POINT_Y(pP), pModulo);
ECP_POINT_AFFINE(pR) = ECP_POINT_AFFINE(pP);
}
}
/*
// ECCP_DblPoint
//
// Double point
*/
void ECCP_DblPoint(const IppsECCPPointState* pP,
IppsECCPPointState* pR,
const IppsECCPState* pECC,
BigNumNode* pList)
{
/* P at infinity */
if( ECCP_IsPointAtInfinity(pP) )
ECCP_SetPointToInfinity(pR);
else {
IppsMontState* pMont = ECP_PMONT(pECC);
IppsBigNumState* bnV = cpBigNumListGet(&pList);
IppsBigNumState* bnU = cpBigNumListGet(&pList);
IppsBigNumState* bnM = cpBigNumListGet(&pList);
IppsBigNumState* bnS = cpBigNumListGet(&pList);
IppsBigNumState* bnT = cpBigNumListGet(&pList);
IppsBigNumState* pModulo = ECP_PRIME(pECC);
/* M = 3*X^2 + A*Z^4 */
if( ECP_POINT_AFFINE(pP) ) {
PMA_sqre(bnU, ECP_POINT_X(pP), pMont);
PMA_add(bnM, bnU, bnU, pModulo);
PMA_add(bnM, bnM, bnU, pModulo);
PMA_add(bnM, bnM, ECP_AENC(pECC), pModulo);
}
else if( ECP_AMI3(pECC) ) {
PMA_sqre(bnU, ECP_POINT_Z(pP), pMont);
PMA_add(bnS, ECP_POINT_X(pP), bnU, pModulo);
PMA_sub(bnT, ECP_POINT_X(pP), bnU, pModulo);
PMA_mule(bnM, bnS, bnT, pMont);
PMA_add(bnU, bnM, bnM, pModulo);
PMA_add(bnM, bnU, bnM, pModulo);
}
else {
PMA_sqre(bnU, ECP_POINT_X(pP), pMont);
PMA_add(bnM, bnU, bnU, pModulo);
PMA_add(bnM, bnM, bnU, pModulo);
PMA_sqre(bnU, ECP_POINT_Z(pP), pMont);
PMA_sqre(bnU, bnU, pMont);
PMA_mule(bnU, bnU, ECP_AENC(pECC), pMont);
PMA_add(bnM, bnM, bnU, pModulo);
}
PMA_add(bnV, ECP_POINT_Y(pP), ECP_POINT_Y(pP), pModulo);
/* R_Z = 2*Y*Z */
if( ECP_POINT_AFFINE(pP) ) {
PMA_set(ECP_POINT_Z(pR), bnV);
}
else {
PMA_mule(ECP_POINT_Z(pR), bnV, ECP_POINT_Z(pP), pMont);
}
/* S = 4*X*Y^2 */
PMA_sqre(bnT, bnV, pMont);
PMA_mule(bnS, bnT, ECP_POINT_X(pP), pMont);
/* R_X = M^2 - 2*S */
PMA_sqre(bnU, bnM, pMont);
PMA_sub(bnU, bnU, bnS, pModulo);
PMA_sub(ECP_POINT_X(pR), bnU, bnS, pModulo);
/* T = 8*Y^4 */
PMA_mule(bnV, bnV, ECP_POINT_Y(pP), pMont);
PMA_mule(bnT, bnT, bnV, pMont);
/* R_Y = M*(S - R_X) - T */
PMA_sub(bnS, bnS, ECP_POINT_X(pR), pModulo);
PMA_mule(bnS, bnS, bnM, pMont);
PMA_sub(ECP_POINT_Y(pR), bnS, bnT, pModulo);
ECP_POINT_AFFINE(pR) = 0;
}
}
/*
// ECCP_AddPoint
//
// Add points
*/
void ECCP_AddPoint(const IppsECCPPointState* pP,
const IppsECCPPointState* pQ,
IppsECCPPointState* pR,
const IppsECCPState* pECC,
BigNumNode* pList)
{
/* prevent operation with point at Infinity */
if( ECCP_IsPointAtInfinity(pP) ) {
ECCP_CopyPoint(pQ, pR);
return;
}
if( ECCP_IsPointAtInfinity(pQ) ) {
ECCP_CopyPoint(pP, pR);
return;
}
/*
// addition
*/
{
IppsMontState* pMont = ECP_PMONT(pECC);
IppsBigNumState* bnU0 = cpBigNumListGet(&pList);
IppsBigNumState* bnS0 = cpBigNumListGet(&pList);
IppsBigNumState* bnU1 = cpBigNumListGet(&pList);
IppsBigNumState* bnS1 = cpBigNumListGet(&pList);
IppsBigNumState* bnW = cpBigNumListGet(&pList);
IppsBigNumState* bnR = cpBigNumListGet(&pList);
IppsBigNumState *bnT = bnU0;
IppsBigNumState *bnM = bnS0;
IppsBigNumState* pModulo = ECP_PRIME(pECC);
/* U0 = P_X * Q_Z^2 */
/* S0 = P_Y * Q_Z^3 */
if( ECP_POINT_AFFINE(pQ) ) {
PMA_set(bnU0, ECP_POINT_X(pP));
PMA_set(bnS0, ECP_POINT_Y(pP));
}
else {
PMA_sqre(bnW, ECP_POINT_Z(pQ), pMont);
PMA_mule(bnU0,ECP_POINT_X(pP), bnW, pMont);
PMA_mule(bnW, ECP_POINT_Z(pQ), bnW, pMont);
PMA_mule(bnS0,ECP_POINT_Y(pP), bnW, pMont);
}
/* U1 = Q_X * P_Z^2 */
/* S1 = Q_Y * P_Z^3 */
if( ECP_POINT_AFFINE(pP) ) {
PMA_set(bnU1, ECP_POINT_X(pQ));
PMA_set(bnS1, ECP_POINT_Y(pQ));
}
else {
PMA_sqre(bnW, ECP_POINT_Z(pP), pMont);
PMA_mule(bnU1,ECP_POINT_X(pQ), bnW, pMont);
PMA_mule(bnW, ECP_POINT_Z(pP), bnW, pMont);
PMA_mule(bnS1,ECP_POINT_Y(pQ), bnW, pMont);
}
/* W = U0-U1 */
/* R = S0-S1 */
PMA_sub(bnW, bnU0, bnU1, pModulo);
PMA_sub(bnR, bnS0, bnS1, pModulo);
if( IsZero_BN(bnW) ) {
if( IsZero_BN(bnR) ) {
ECCP_DblPoint(pP, pR, pECC, pList);
return;
}
else {
ECCP_SetPointToInfinity(pR);
return;
}
}
/* T = U0+U1 */
/* M = S0+S1 */
PMA_add(bnT, bnU0, bnU1, pModulo);
PMA_add(bnM, bnS0, bnS1, pModulo);
/* R_Z = P_Z * Q_Z * W */
if( ECP_POINT_AFFINE(pQ) && ECP_POINT_AFFINE(pP) ) {
PMA_set(ECP_POINT_Z(pR), bnW);
}
else {
if( ECP_POINT_AFFINE(pQ) ) {
PMA_set(bnU1, ECP_POINT_Z(pP));
}
else if( ECP_POINT_AFFINE(pP) ) {
PMA_set(bnU1, ECP_POINT_Z(pQ));
}
else {
PMA_mule(bnU1, ECP_POINT_Z(pP), ECP_POINT_Z(pQ), pMont);
}
PMA_mule(ECP_POINT_Z(pR), bnU1, bnW, pMont);
}
PMA_sqre(bnU1, bnW, pMont); /* U1 = W^2 */
PMA_mule(bnS1, bnT, bnU1, pMont); /* S1 = T * W^2 */
/* R_X = R^2 - T * W^2 */
PMA_sqre(ECP_POINT_X(pR), bnR, pMont);
PMA_sub(ECP_POINT_X(pR), ECP_POINT_X(pR), bnS1, pModulo);
/* V = T * W^2 - 2 * R_X (S1) */
PMA_sub(bnS1, bnS1, ECP_POINT_X(pR), pModulo);
PMA_sub(bnS1, bnS1, ECP_POINT_X(pR), pModulo);
/* R_Y = (V * R - M * W^3) /2 */
PMA_mule(ECP_POINT_Y(pR), bnS1, bnR, pMont);
PMA_mule(bnU1, bnU1, bnW, pMont);
PMA_mule(bnU1, bnU1, bnM, pMont);
PMA_sub(bnU1, ECP_POINT_Y(pR), bnU1, pModulo);
PMA_div2(ECP_POINT_Y(pR), bnU1, pModulo);
ECP_POINT_AFFINE(pR) = 0;
}
}
/*
// ECCP_MulPoint
//
// Multiply point by scalar
*/
void ECCP_MulPoint(const IppsECCPPointState* pP,
const IppsBigNumState* bnN,
IppsECCPPointState* pR,
const IppsECCPState* pECC,
BigNumNode* pList)
{
/* test zero scalar or input point at Infinity */
if( IsZero_BN(bnN) || ECCP_IsPointAtInfinity(pP) ) {
ECCP_SetPointToInfinity(pR);
return;
}
/*
// scalar multiplication
*/
else {
Ipp8u* pScratchAligned = ECP_SCCMBUFF(pECC);
BNU_CHUNK_T* pN = BN_NUMBER(bnN);
cpSize nsN = BN_SIZE(bnN);
/* scalar bitsize */
int scalarBitSize = BITSIZE_BNU(pN, nsN);
/* optimal size of window */
int w = cpECCP_OptimalWinSize(scalarBitSize);
/* number of table entries */
int nPrecomputed = 1<<w;
/* allocate temporary scalar */
IppsBigNumState* bnTN = cpBigNumListGet(&pList);
BNU_CHUNK_T* pTN = BN_NUMBER(bnTN);
int coordSize = BITS_BNU_CHUNK(ECP_GFEBITS(pECC));
IppsECCPPointState T;
ECP_POINT_X(&T) = cpBigNumListGet(&pList);
ECP_POINT_Y(&T) = cpBigNumListGet(&pList);
ECP_POINT_Z(&T) = cpBigNumListGet(&pList);
ECCP_SetPointToInfinity(&T);
/* init result */
ECCP_CopyPoint(pP, pR);
if( ippBigNumNEG == BN_SIGN(bnN) )
ECCP_NegPoint(pR, pR, pECC);
/* pre-compute auxiliary table t[] = {(2^w)*P, 1*P, 2*P, ..., (2^(w-1))*P} */
{
int n;
for(n=1; n<nPrecomputed; n++) {
ECCP_AddPoint(pR, &T, &T, pECC, pList);
cpECCP_ScramblePut(pScratchAligned+n, nPrecomputed, &T, coordSize);
}
ECCP_AddPoint(pR, &T, &T, pECC, pList);
cpECCP_ScramblePut(pScratchAligned, nPrecomputed, &T, coordSize);
}
/* copy scalar */
cpCpy_BNU(pTN, pN, nsN);
/* and convert it presentaion to avoid usage of O point */
scalarBitSize = cpECCP_ConvertRepresentation(pTN, scalarBitSize, w);
/* prepare temporary scalar for processing */
pTN[BITS_BNU_CHUNK(scalarBitSize)] = 0;
scalarBitSize = ((scalarBitSize+w-1)/w)*w;
/*
// scalar multiplication
*/
{
Ipp32u dmask = nPrecomputed-1;
/* position (bit number) of the leftmost window */
int wPosition = scalarBitSize-w;
/* extract leftmost window value */
Ipp32u eChunk = *((Ipp32u*)((Ipp16u*)pTN + wPosition/BITSIZE(Ipp16u)));
int shift = wPosition & 0xF;
Ipp32u windowVal = (eChunk>>shift) & dmask;
/* initialize result (ECP_FINITE_POINT|ECP_PROJECTIVE) */
cpECCP_ScrambleGet(pR, coordSize, pScratchAligned+windowVal, nPrecomputed);
ECP_POINT_AFFINE(pR) = 0;
/* initialize temporary T (ECP_PROJECTIVE) */
ECP_POINT_AFFINE(&T) = 0;
for(wPosition-=w; wPosition>=0; wPosition-=w) {
/* w times doubling */
int k;
for(k=0; k<w; k++)
ECCP_DblPoint(pR, pR, pECC, pList);
/* extract next window value */
eChunk = *((Ipp32u*)((Ipp16u*)pTN + wPosition/BITSIZE(Ipp16u)));
shift = wPosition & 0xF;
windowVal = (eChunk>>shift) & dmask;
/* extract value from the pre-computed table */
cpECCP_ScrambleGet(&T, coordSize, pScratchAligned+windowVal, nPrecomputed);
/* and add it */
ECCP_AddPoint(pR, &T, pR, pECC, pList);
}
}
}
}
void ECCP_MulBasePoint(const IppsBigNumState* pK,
IppsECCPPointState* pR,
const IppsECCPState* pECC,
BigNumNode* pList)
{
ECCP_MulPoint(ECP_GENC(pECC), pK, pR, pECC, pList);
}
/*
// ECCP_ProdPoint
//
// Point product
*/
void ECCP_ProdPoint(const IppsECCPPointState* pP,
const IppsBigNumState* bnPscalar,
const IppsECCPPointState* pQ,
const IppsBigNumState* bnQscalar,
IppsECCPPointState* pR,
const IppsECCPState* pECC,
BigNumNode* pList)
{
IppsECCPPointState T;
IppsECCPPointState U;
ECP_POINT_X(&T) = cpBigNumListGet(&pList);
ECP_POINT_Y(&T) = cpBigNumListGet(&pList);
ECP_POINT_Z(&T) = cpBigNumListGet(&pList);
ECP_POINT_X(&U) = cpBigNumListGet(&pList);
ECP_POINT_Y(&U) = cpBigNumListGet(&pList);
ECP_POINT_Z(&U) = cpBigNumListGet(&pList);
ECCP_MulPoint(pP, bnPscalar, &T, (IppsECCPState*)pECC, pList);
ECCP_MulPoint(pQ, bnQscalar, &U, (IppsECCPState*)pECC, pList);
ECCP_AddPoint(&T, &U, pR, pECC, pList);
}

60
sgx-jvm/linux-sgx/external/crypto_px/sources/ippcp/src/pcpeccppoint.h vendored
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@ -1,60 +0,0 @@
/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#if !defined(_PCP_ECCPPOINT_H)
#define _PCP_ECCPPOINT_H
#include "pcpeccp.h"
/*
// EC Point context
*/
struct _cpECCPPoint {
IppCtxId idCtx; /* EC Point identifier */
IppsBigNumState* pX; /* projective X */
IppsBigNumState* pY; /* Y */
IppsBigNumState* pZ; /* Z coordinates */
int affine; /* impotrant case Z=1 */
};
/*
// Contetx Access Macros
*/
#define ECP_POINT_ID(ctx) ((ctx)->idCtx)
#define ECP_POINT_X(ctx) ((ctx)->pX)
#define ECP_POINT_Y(ctx) ((ctx)->pY)
#define ECP_POINT_Z(ctx) ((ctx)->pZ)
#define ECP_POINT_AFFINE(ctx) ((ctx)->affine)
#define ECP_POINT_VALID_ID(ctx) (ECP_POINT_ID((ctx))==idCtxECCPPoint)
#endif /* _PCP_ECCPPOINT_H */

128
sgx-jvm/linux-sgx/external/crypto_px/sources/ippcp/src/pcpeccppointca.c vendored
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@ -1,128 +0,0 @@
/*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "owndefs.h"
#include "owncp.h"
#include "pcpeccppoint.h"
/*F*
// Name: ippsECCPPointGetSize
//
// Purpose: Returns size of EC Point context (bytes).
//
// Returns: Reason:
// ippStsNullPtrErr NULL == pSzie
// ippStsSizeErr 2>feBitSize
// ippStsNoErr no errors
//
// Parameters:
// feBitSize size of field element (bits)
// pSize pointer to the size of EC Point context
//
*F*/
IPPFUN(IppStatus, ippsECCPPointGetSize, (int feBitSize, int* pSize))
{
/* test size's pointer */
IPP_BAD_PTR1_RET(pSize);
/* test size of field element */
IPP_BADARG_RET((2>feBitSize), ippStsSizeErr);
{
int bnSize;
ippsBigNumGetSize(BITS2WORD32_SIZE(feBitSize), &bnSize);
*pSize = sizeof(IppsECCPPointState)
+ bnSize /* X coodinate */
+ bnSize /* Y coodinate */
+ bnSize /* Z coodinate */
+(ALIGN_VAL-1);
}
return ippStsNoErr;
}
/*F*
// Name: ippsECCPPointInit
//
// Purpose: Init EC Point context.
//
// Returns: Reason:
// ippStsNullPtrErr NULL == pPoint
// ippStsSizeErr 2>feBitSize
// ippStsNoErr no errors
//
// Parameters:
// feBitSize size of field element (bits)
// pECC pointer to ECC context
//
*F*/
IPPFUN(IppStatus, ippsECCPPointInit, (int feBitSize, IppsECCPPointState* pPoint))
{
/* test pEC pointer */
IPP_BAD_PTR1_RET(pPoint);
/* use aligned context */
pPoint = (IppsECCPPointState*)( IPP_ALIGNED_PTR(pPoint, ALIGN_VAL) );
/* test size of field element */
IPP_BADARG_RET((2>feBitSize), ippStsSizeErr);
/* context ID */
ECP_POINT_ID(pPoint) = idCtxECCPPoint;
/* meaning: point was not set */
ECP_POINT_AFFINE(pPoint) =-1;
/*
// init other context fields
*/
{
Ipp8u* ptr = (Ipp8u*)pPoint;
int bnLen = BITS2WORD32_SIZE(feBitSize);
int bnSize;
ippsBigNumGetSize(bnLen, &bnSize);
/* allocate coordinate buffers */
ptr += sizeof(IppsECCPPointState);
ECP_POINT_X(pPoint) = (IppsBigNumState*)( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
ptr += bnSize;
ECP_POINT_Y(pPoint) = (IppsBigNumState*)( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
ptr += bnSize;
ECP_POINT_Z(pPoint) = (IppsBigNumState*)( IPP_ALIGNED_PTR(ptr,ALIGN_VAL) );
/* init coordinate buffers */
ippsBigNumInit(bnLen, ECP_POINT_X(pPoint));
ippsBigNumInit(bnLen, ECP_POINT_Y(pPoint));
ippsBigNumInit(bnLen, ECP_POINT_Z(pPoint));
}
return ippStsNoErr;
}

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