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add support for more instructions to assembler
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parent
5b7372a3bb
commit
cc64668657
124
src/x86.cpp
124
src/x86.cpp
@ -894,6 +894,46 @@ addRM(Context* c, unsigned size UNUSED, Assembler::Register* a,
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encode(c, 0x01, a->low, b, true);
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encode(c, 0x01, a->low, b, true);
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}
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}
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void
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multiplyRR(Context* c, unsigned size, Assembler::Register* a,
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Assembler::Register* b)
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{
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assert(c, BytesPerWord == 8 or size == 4); // todo
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rex(c);
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c->code.append(0x0f);
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c->code.append(0xaf);
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c->code.append(0xc0 | (b->low << 3) | a->low);
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}
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void
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multiplyCR(Context* c, unsigned size, Assembler::Constant* a,
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Assembler::Register* b)
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{
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assert(c, BytesPerWord == 8 or size == 4); // todo
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int64_t v = a->value->value();
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if (v) {
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if (isInt32(v)) {
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rex(c);
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if (isInt8(v)) {
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c->code.append(0x6b);
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c->code.append(0xc0 | (b->low << 3) | b->low);
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c->code.append(v);
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} else {
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c->code.append(0x69);
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c->code.append(0xc0 | (b->low << 3) | b->low);
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c->code.append4(v);
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}
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} else {
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Assembler::Register tmp(c->client->acquireTemporary());
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moveCR(c, size, a, &tmp);
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multiplyRR(c, size, &tmp, b);
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c->client->releaseTemporary(tmp.low);
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}
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}
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}
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void
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void
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divideRR(Context* c, unsigned size, Assembler::Register* a,
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divideRR(Context* c, unsigned size, Assembler::Register* a,
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Assembler::Register* b)
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Assembler::Register* b)
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@ -958,6 +998,18 @@ divideRR(Context* c, unsigned size, Assembler::Register* a,
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}
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}
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}
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}
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void
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divideCR(Context* c, unsigned size, Assembler::Constant* a,
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Assembler::Register* b)
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{
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assert(c, BytesPerWord == 8 or size == 4); // todo
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Assembler::Register tmp(c->client->acquireTemporary());
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moveCR(c, size, a, &tmp);
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divideRR(c, size, &tmp, b);
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c->client->releaseTemporary(tmp.low);
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}
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void
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void
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remainderRR(Context* c, unsigned size, Assembler::Register* a,
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remainderRR(Context* c, unsigned size, Assembler::Register* a,
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Assembler::Register* b)
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Assembler::Register* b)
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@ -1023,25 +1075,41 @@ remainderRR(Context* c, unsigned size, Assembler::Register* a,
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}
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}
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}
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}
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void
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andRR(Context* c, unsigned size UNUSED, Assembler::Register* a,
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Assembler::Register* b)
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{
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assert(c, BytesPerWord == 8 or size == 4); // todo
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rex(c);
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c->code.append(0x21);
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c->code.append(0xc0 | (a->low << 3) | b->low);
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}
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void
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void
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andCR(Context* c, unsigned size UNUSED, Assembler::Constant* a,
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andCR(Context* c, unsigned size UNUSED, Assembler::Constant* a,
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Assembler::Register* b)
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Assembler::Register* b)
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{
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{
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assert(c, BytesPerWord == 8 or size == 4);
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assert(c, BytesPerWord == 8 or size == 4); // todo
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int64_t v = a->value->value();
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int64_t v = a->value->value();
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rex(c);
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if (isInt32(v)) {
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if (isInt8(v)) {
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rex(c);
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c->code.append(0x83);
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if (isInt8(v)) {
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c->code.append(0xe0 | b->low);
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c->code.append(0x83);
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c->code.append(v);
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c->code.append(0xe0 | b->low);
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} else if (isInt32(v)) {
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c->code.append(v);
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c->code.append(0x81);
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} else {
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c->code.append(0xe0 | b->low);
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c->code.append(0x81);
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c->code.append(v);
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c->code.append(0xe0 | b->low);
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c->code.append(v);
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}
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} else {
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} else {
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abort(c);
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Assembler::Register tmp(c->client->acquireTemporary());
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moveCR(c, size, a, &tmp);
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andRR(c, size, &tmp, b);
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c->client->releaseTemporary(tmp.low);
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}
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}
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}
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}
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@ -1074,6 +1142,34 @@ xorRR(Context* c, unsigned size UNUSED, Assembler::Register* a,
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c->code.append(0xc0 | (a->low << 3) | b->low);
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c->code.append(0xc0 | (a->low << 3) | b->low);
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}
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}
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void
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xorCR(Context* c, unsigned size UNUSED, Assembler::Constant* a,
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Assembler::Register* b)
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{
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assert(c, BytesPerWord == 8 or size == 4); // todo
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int64_t v = a->value->value();
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if (v) {
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if (isInt32(v)) {
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rex(c);
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if (isInt8(v)) {
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c->code.append(0x83);
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c->code.append(0xf0 | b->low);
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c->code.append(v);
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} else {
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c->code.append(0x81);
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c->code.append(0xf0 | b->low);
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c->code.append4(v);
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}
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} else {
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Assembler::Register tmp(c->client->acquireTemporary());
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moveCR(c, size, a, &tmp);
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xorRR(c, size, &tmp, b);
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c->client->releaseTemporary(tmp.low);
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}
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}
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}
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void
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void
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shiftLeftCR(Context* c, unsigned size UNUSED, Assembler::Constant* a,
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shiftLeftCR(Context* c, unsigned size UNUSED, Assembler::Constant* a,
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Assembler::Register* b)
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Assembler::Register* b)
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@ -1248,14 +1344,20 @@ populateTables()
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BinaryOperations[INDEX2(Add, Register, Register)] = CAST2(addRR);
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BinaryOperations[INDEX2(Add, Register, Register)] = CAST2(addRR);
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BinaryOperations[INDEX2(Add, Register, Memory)] = CAST2(addRM);
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BinaryOperations[INDEX2(Add, Register, Memory)] = CAST2(addRM);
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BinaryOperations[INDEX2(Multiply, Register, Register)] = CAST2(multiplyRR);
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BinaryOperations[INDEX2(Multiply, Constant, Register)] = CAST2(multiplyCR);
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BinaryOperations[INDEX2(Divide, Register, Register)] = CAST2(divideRR);
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BinaryOperations[INDEX2(Divide, Register, Register)] = CAST2(divideRR);
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BinaryOperations[INDEX2(Divide, Constant, Register)] = CAST2(divideCR);
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BinaryOperations[INDEX2(Remainder, Register, Register)] = CAST2(remainderRR);
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BinaryOperations[INDEX2(Remainder, Register, Register)] = CAST2(remainderRR);
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BinaryOperations[INDEX2(And, Register, Register)] = CAST2(andRR);
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BinaryOperations[INDEX2(And, Constant, Register)] = CAST2(andCR);
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BinaryOperations[INDEX2(And, Constant, Register)] = CAST2(andCR);
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BinaryOperations[INDEX2(And, Constant, Memory)] = CAST2(andCM);
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BinaryOperations[INDEX2(And, Constant, Memory)] = CAST2(andCM);
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BinaryOperations[INDEX2(Xor, Register, Register)] = CAST2(xorRR);
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BinaryOperations[INDEX2(Xor, Register, Register)] = CAST2(xorRR);
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BinaryOperations[INDEX2(Xor, Constant, Register)] = CAST2(xorCR);
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BinaryOperations[INDEX2(ShiftLeft, Constant, Register)] = CAST2(shiftLeftCR);
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BinaryOperations[INDEX2(ShiftLeft, Constant, Register)] = CAST2(shiftLeftCR);
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