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https://github.com/corda/corda.git
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Merge commit 'origin/powerpc' into powerpc
Conflicts: src/powerpc.cpp
This commit is contained in:
commit
b539d7b1e0
165
src/powerpc.cpp
165
src/powerpc.cpp
@ -73,6 +73,14 @@ inline int addis(int rt, int ra, int i) { return D(15, rt, ra, i); }
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inline int subf(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 40, 0); }
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inline int subf(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 40, 0); }
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inline int subfc(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 8, 0); }
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inline int subfc(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 8, 0); }
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inline int subfe(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 136, 0); }
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inline int subfe(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 136, 0); }
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inline int mullw(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 235, 0); }
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inline int mulhw(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 75, 0); }
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inline int mulhwu(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 11, 0); }
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inline int mulli(int rt, int ra, int i) { return D(7, rt, ra, i); }
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inline int divw(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 491, 0); }
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inline int divwu(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 459, 0); }
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inline int divd(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 489, 0); }
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inline int divdu(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 457, 0); }
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inline int and_(int rt, int ra, int rb) { return X(31, ra, rt, rb, 28, 0); }
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inline int and_(int rt, int ra, int rb) { return X(31, ra, rt, rb, 28, 0); }
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inline int andi(int rt, int ra, int i) { return D(28, ra, rt, i); }
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inline int andi(int rt, int ra, int i) { return D(28, ra, rt, i); }
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inline int andis(int rt, int ra, int i) { return D(29, ra, rt, i); }
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inline int andis(int rt, int ra, int i) { return D(29, ra, rt, i); }
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@ -105,6 +113,7 @@ inline int srwi(int rt, int ra, int i) { return rlwinm(rt, ra, 32-i, i, 31); }
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inline int sub(int rt, int ra, int rb) { return subf(rt, rb, ra); }
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inline int sub(int rt, int ra, int rb) { return subf(rt, rb, ra); }
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inline int subc(int rt, int ra, int rb) { return subfc(rt, rb, ra); }
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inline int subc(int rt, int ra, int rb) { return subfc(rt, rb, ra); }
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inline int subi(int rt, int ra, int i) { return addi(rt, ra, -i); }
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inline int subi(int rt, int ra, int i) { return addi(rt, ra, -i); }
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inline int subis(int rt, int ra, int i) { return addis(rt, ra, -i); }
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inline int mr(int rt, int ra) { return or_(rt, ra, ra); }
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inline int mr(int rt, int ra) { return or_(rt, ra, ra); }
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inline int mflr(int rx) { return mfspr(rx, 8); }
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inline int mflr(int rx) { return mfspr(rx, 8); }
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inline int mtlr(int rx) { return mtspr(8, rx); }
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inline int mtlr(int rx) { return mtspr(8, rx); }
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@ -566,6 +575,15 @@ moveRR(Context* c, unsigned srcSize, Assembler::Register* src,
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}
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}
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}
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}
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void addR(Context* con, unsigned size, Reg* a, Reg* b, Reg* t) {
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if(size == 8) {
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issue(con, addc(R(t), R(a), R(b)));
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issue(con, adde(H(t), H(a), H(b)));
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} else {
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issue(con, add(R(t), R(a), R(b)));
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}
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}
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void addC(Context* con, unsigned size, Const* a, Reg* b, Reg* t) {
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void addC(Context* con, unsigned size, Const* a, Reg* b, Reg* t) {
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assert(con, size == BytesPerWord);
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assert(con, size == BytesPerWord);
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@ -577,6 +595,84 @@ void addC(Context* con, unsigned size, Const* a, Reg* b, Reg* t) {
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}
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}
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}
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}
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void subR(Context* con, unsigned size, Reg* a, Reg* b, Reg* t) {
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if(size == 8) {
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issue(con, subfc(R(t), R(a), R(b)));
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issue(con, subfe(H(t), H(a), H(b)));
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} else {
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issue(con, subf(R(t), R(a), R(b)));
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}
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}
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void subC(Context* con, unsigned size, Const* a, Reg* b, Reg* t) {
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assert(con, size == BytesPerWord);
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int64_t i = getVal(a);
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if(i) {
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issue(con, subi(R(t), R(b), lo16(i)));
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if(not isInt16(i))
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issue(con, subis(R(t), R(t), hi16(i)));
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}
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}
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void multiplyR(Context* con, unsigned size, Reg* a, Reg* b, Reg* t) {
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if(size == 8) {
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if(BytesPerWord == 8) {
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// issue(con, mulld(R(t), R(a), R(b)));
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abort(con);
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} else {
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abort(con); // todo
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}
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} else {
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issue(con, mullw(R(t), R(a), R(b)));
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}
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}
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void multiplyC(Context* con, unsigned size, Const* a, Reg* b, Reg* t) {
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assert(con, size == BytesPerWord);
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int64_t i = getVal(a);
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issue(con, mulli(R(t), R(b), i));
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}
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void divideR(Context* con, unsigned size, Reg* a, Reg* b, Reg* t) {
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if(size == 8 && BytesPerWord == 8) {
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issue(con, divd(R(t), R(b), R(a)));
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} else {
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issue(con, divw(R(t), R(b), R(a)));
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}
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}
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void remainderR(Context* con, unsigned size, Reg* a, Reg* b, Reg* t) {
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divideR(con, size, a, b, t);
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multiplyR(con, size, b, t, t);
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subR(con, size, t, a, t);
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}
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void andC(Context* c, unsigned size, Assembler::Constant* a,
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Assembler::Register* b, Assembler::Register* dst)
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{
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int64_t v = a->value->value();
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if(size == 8) {
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ResolvedPromise high((v >> 32) & 0xFFFFFFFF);
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Assembler::Constant ah(&high);
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ResolvedPromise low(v & 0xFFFFFFFF);
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Assembler::Constant al(&low);
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Assembler::Register bh(b->high);
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Assembler::Register dh(dst->high);
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andC(c, 4, &al, b, dst);
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andC(c, 4, &ah, &bh, &dh);
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} else {
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issue(c, andi(dst->low, b->low, v));
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if (not isInt16(v)) {
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issue(c, andis(dst->low, b->low, v >> 16));
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}
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}
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}
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int
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int
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normalize(Context* c, int offset, int index, unsigned scale,
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normalize(Context* c, int offset, int index, unsigned scale,
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bool* preserveIndex)
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bool* preserveIndex)
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@ -681,75 +777,6 @@ moveRM(Context* c, unsigned srcSize, Assembler::Register* src,
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store(c, srcSize, src, dst->base, dst->offset, dst->index, dst->scale, true);
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store(c, srcSize, src, dst->base, dst->offset, dst->index, dst->scale, true);
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}
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}
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void
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loadLinkRegisterR(Context* c, unsigned dstSize, Assembler::Register* dst)
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{
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assert(c, dstSize == BytesPerWord);
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issue(c, mflr(dst->low));
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}
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void
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storeLinkRegisterR(Context* c, unsigned srcSize, Assembler::Register* src)
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{
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assert(c, srcSize == BytesPerWord);
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issue(c, mtlr(src->low));
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}
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void addR(Context* con, unsigned size, Reg* a, Reg* b, Reg* t) {
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if(size == 8) {
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issue(con, addc(R(t), R(a), R(b)));
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issue(con, adde(H(t), H(a), H(b)));
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} else {
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issue(con, add(R(t), R(a), R(b)));
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}
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}
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void subR(Context* con, unsigned size, Reg* a, Reg* b, Reg* t) {
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if(size == 8) {
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issue(con, subfc(R(t), R(a), R(b)));
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issue(con, subfe(H(t), H(a), H(b)));
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} else {
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issue(con, subf(R(t), R(a), R(b)));
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}
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}
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void subC(Context* con, unsigned size, Const* a, Reg* b, Reg* t) {
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assert(con, size == BytesPerWord);
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int64_t i = getVal(a);
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if(i) {
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issue(con, subi(R(t), R(b), lo16(i)));
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issue(con, subi(R(t), R(t), hi16(i)));
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}
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}
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void andC(Context* c, unsigned size, Assembler::Constant* a,
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Assembler::Register* b, Assembler::Register* dst)
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{
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int64_t v = a->value->value();
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if(size == 8) {
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ResolvedPromise high((v >> 32) & 0xFFFFFFFF);
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Assembler::Constant ah(&high);
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ResolvedPromise low(v & 0xFFFFFFFF);
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Assembler::Constant al(&low);
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Assembler::Register bh(b->high);
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Assembler::Register dh(dst->high);
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andC(c, 4, &al, b, dst);
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andC(c, 4, &ah, &bh, &dh);
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} else {
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issue(c, andi(dst->low, b->low, v));
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if (not isInt16(v)) {
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issue(c, andis(dst->low, b->low, v >> 16));
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}
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}
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}
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void
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void
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moveAndUpdateRM(Context* c, unsigned srcSize, Assembler::Register* src,
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moveAndUpdateRM(Context* c, unsigned srcSize, Assembler::Register* src,
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unsigned dstSize UNUSED, Assembler::Memory* dst)
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unsigned dstSize UNUSED, Assembler::Memory* dst)
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