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implement additional instructions
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parent
11c2afbf91
commit
965b83303f
54
src/x86.cpp
54
src/x86.cpp
@ -867,6 +867,22 @@ moveCM(Context* c, unsigned aSize UNUSED, Assembler::Constant* a,
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}
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}
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void
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moveZRR(Context* c, unsigned aSize, Assembler::Register* a,
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unsigned bSize UNUSED, Assembler::Register* b)
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{
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switch (aSize) {
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case 2:
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rex(c);
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c->code.append(0x0f);
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c->code.append(0xb7);
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c->code.append(0xc0 | (b->low << 3) | a->low);
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break;
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default: abort(c);
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}
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}
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void
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swapRR(Context* c, unsigned aSize UNUSED, Assembler::Register* a,
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unsigned bSize UNUSED, Assembler::Register* b)
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@ -918,6 +934,40 @@ compareCR(Context* c, unsigned aSize, Assembler::Constant* a,
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c->client->releaseTemporary(tmp.low);
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}
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}
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void
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compareRM(Context* c, unsigned aSize, Assembler::Register* a,
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unsigned bSize UNUSED, Assembler::Memory* b)
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{
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assert(c, aSize == bSize);
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assert(c, BytesPerWord == 8 or aSize == 4);
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if (BytesPerWord == 8 and aSize == 4) {
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moveRR(c, 4, a, 8, a);
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}
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encode(c, 0x39, a->low, b, true);
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}
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void
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compareCM(Context* c, unsigned aSize UNUSED, Assembler::Constant* a,
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unsigned bSize UNUSED, Assembler::Memory* b)
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{
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assert(c, aSize == bSize);
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assert(c, BytesPerWord == 8 or aSize == 4);
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int64_t v = a->value->value();
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encode(c, isInt8(v) ? 0x83 : 0x81, 7, b, true);
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if (isInt8(v)) {
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c->code.append(v);
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} else if (isInt32(v)) {
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c->code.append4(v);
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} else {
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abort(c);
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}
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}
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void
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addCarryRR(Context* c, unsigned size, Assembler::Register* a,
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Assembler::Register* b)
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@ -1236,10 +1286,14 @@ populateTables(ArchitectureContext* c)
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bo[index(Move, A, R)] = CAST2(moveAR);
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bo[index(Move, M, M)] = CAST2(moveMM);
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bo[index(MoveZ, R, R)] = CAST2(moveZRR);
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bo[index(Swap, R, R)] = CAST2(swapRR);
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bo[index(Compare, R, R)] = CAST2(compareRR);
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bo[index(Compare, C, R)] = CAST2(compareCR);
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bo[index(Compare, C, M)] = CAST2(compareCM);
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bo[index(Compare, R, M)] = CAST2(compareRM);
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bo[index(Add, R, R)] = CAST2(addRR);
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bo[index(Add, C, R)] = CAST2(addCR);
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