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encourage loads from memory directly into SSE registers where appropriate
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parent
1c61c1f421
commit
79d281f7fa
@ -3447,6 +3447,10 @@ maybeMove(Context* c, BinaryOperation type, unsigned srcSize,
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c->arch->planSource(type, dstSize, &srcTypeMask, &srcRegisterMask,
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dstSize, &thunk);
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if (src->type == ValueGeneral) {
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srcRegisterMask &= c->arch->generalRegisterMask();
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}
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assert(c, thunk == 0);
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assert(c, dstMask.typeMask & srcTypeMask & (1 << RegisterOperand));
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@ -6013,7 +6017,7 @@ class MyCompiler: public Compiler {
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virtual void push(unsigned footprint UNUSED) {
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assert(&c, footprint == 1);
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Value* v = value(&c, ValueFloat);
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Value* v = value(&c, ValueGeneral);
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Stack* s = local::stack(&c, v, c.stack);
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v->home = frameIndex(&c, s->index + c.localFootprint);
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10
src/x86.cpp
10
src/x86.cpp
@ -946,6 +946,9 @@ void
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sseMoveRR(Context* c, unsigned aSize, Assembler::Register* a,
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unsigned bSize UNUSED, Assembler::Register* b)
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{
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assert(c, aSize >= 4);
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assert(c, aSize == bSize);
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if (floatReg(a) and floatReg(b)) {
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if (aSize == 4) {
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opcode(c, 0xf3);
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@ -1090,6 +1093,9 @@ void
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sseMoveMR(Context* c, unsigned aSize, Assembler::Memory* a,
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unsigned bSize UNUSED, Assembler::Register* b)
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{
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assert(c, aSize >= 4);
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assert(c, aSize == bSize);
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if (BytesPerWord == 4 and aSize == 8) {
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opcode(c, 0xf3);
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opcode(c, 0x0f, 0x7e);
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@ -1165,6 +1171,7 @@ void
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sseMoveRM(Context* c, unsigned aSize, Assembler::Register* a,
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UNUSED unsigned bSize, Assembler::Memory* b)
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{
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assert(c, aSize >= 4);
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assert(c, aSize == bSize);
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if (BytesPerWord == 4 and aSize == 8) {
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@ -2942,8 +2949,7 @@ class MyArchitecture: public Assembler::Architecture {
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case Move:
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*aTypeMask = (1 << RegisterOperand) | (1 << MemoryOperand);
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*aRegisterMask = GeneralRegisterMask
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| (static_cast<uint64_t>(GeneralRegisterMask) << 32);
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*aRegisterMask = ~static_cast<uint64_t>(0);
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if (BytesPerWord == 4) {
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if (aSize == 4 and bSize == 8) {
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