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fix shift instruction implementations on ARM
Unlike x86, ARM does not implicitly mask the shift value, so we must do so explicitly.
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@ -1930,14 +1930,14 @@ interpret3(Thread* t, const int base)
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int32_t b = popInt(t);
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int32_t a = popInt(t);
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pushInt(t, a << b);
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pushInt(t, a << (b & 0x1F));
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} goto loop;
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case ishr: {
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int32_t b = popInt(t);
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int32_t a = popInt(t);
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pushInt(t, a >> b);
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pushInt(t, a >> (b & 0x1F));
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} goto loop;
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case istore:
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@ -1976,7 +1976,7 @@ interpret3(Thread* t, const int base)
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int32_t b = popInt(t);
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uint32_t a = popInt(t);
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pushInt(t, a >> b);
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pushInt(t, a >> (b & 0x1F));
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} goto loop;
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case ixor: {
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@ -2238,14 +2238,14 @@ interpret3(Thread* t, const int base)
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int32_t b = popInt(t);
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int64_t a = popLong(t);
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pushLong(t, a << b);
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pushLong(t, a << (b & 0x3F));
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} goto loop;
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case lshr: {
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int32_t b = popInt(t);
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int64_t a = popLong(t);
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pushLong(t, a >> b);
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pushLong(t, a >> (b & 0x3F));
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} goto loop;
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case lstore:
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@ -2284,7 +2284,7 @@ interpret3(Thread* t, const int base)
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int64_t b = popInt(t);
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uint64_t a = popLong(t);
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pushLong(t, a >> b);
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pushLong(t, a >> (b & 0x3F));
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} goto loop;
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case lxor: {
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