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support 64-bit subtracts on 32-bit systems; allow constant shift counts in MyAssembler::plan

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This commit is contained in:
Joel Dice 2008-05-18 09:43:31 -06:00
parent 392132cb0e
commit 4858972dbc
1 changed files with 22 additions and 5 deletions
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21
src/x86.cpp
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@ -1012,15 +1012,32 @@ subtractCR(Context* c, unsigned size, Assembler::Constant* a,
} }
} }
void
subtractBorrowRR(Context* c, unsigned size UNUSED, Assembler::Register* a,
Assembler::Register* b)
{
assert(c, BytesPerWord == 8 or size == 4);
if (size == 8) rex(c);
c->code.append(0x19);
c->code.append(0xc0 | (a->low << 3) | b->low);
}
void void
subtractRR(Context* c, unsigned size, Assembler::Register* a, subtractRR(Context* c, unsigned size, Assembler::Register* a,
Assembler::Register* b) Assembler::Register* b)
{ {
assert(c, BytesPerWord == 8 or size == 4); // todo if (BytesPerWord == 4 and size == 8) {
Assembler::Register ah(a->high);
Assembler::Register bh(b->high);
subtractRR(c, 4, a, b);
subtractBorrowRR(c, 4, &ah, &bh);
} else {
if (size == 8) rex(c); if (size == 8) rex(c);
c->code.append(0x29); c->code.append(0x29);
c->code.append(0xc0 | (a->low << 3) | b->low); c->code.append(0xc0 | (a->low << 3) | b->low);
}
} }
void void
@ -1962,7 +1979,7 @@ class MyAssembler: public Assembler {
case ShiftLeft: case ShiftLeft:
case ShiftRight: case ShiftRight:
case UnsignedShiftRight: { case UnsignedShiftRight: {
*aTypeMask = (1 << RegisterOperand); *aTypeMask = (1 << RegisterOperand) | (1 << ConstantOperand);
*aRegisterMask = (~static_cast<uint64_t>(0) << 32) *aRegisterMask = (~static_cast<uint64_t>(0) << 32)
| (static_cast<uint64_t>(1) << rcx); | (static_cast<uint64_t>(1) << rcx);
const uint32_t mask = ~(1 << rcx); const uint32_t mask = ~(1 << rcx);