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https://github.com/corda/corda.git
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Additional floating-point support code; passing all tests when vfpSupport() returns false.
This commit is contained in:
JET
parent
233725e232
commit
47b91f38ee
410
src/arm.cpp
410
src/arm.cpp
@ -234,6 +234,7 @@ inline int bhs(int offset) { return SETCOND(b(offset), CS); }
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bool vfpSupported() {
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return false; // TODO
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}
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}
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const uint64_t MASK_LO32 = 0xffffffff;
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@ -262,9 +263,19 @@ inline int carry16(target_intptr_t v) { return static_cast<int16_t>(v) < 0 ? 1 :
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inline bool isOfWidth(int64_t i, int size) { return static_cast<uint64_t>(i) >> size == 0; }
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inline bool isOfWidth(int i, int size) { return static_cast<unsigned>(i) >> size == 0; }
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const int N_GPRS = 16;
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const int N_FPRS = 16;
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const uint32_t GPR_MASK = 0xffff;
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const uint32_t FPR_MASK = 0xffff0000;
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inline bool isFpr(Assembler::Register* reg) {
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return reg->low >= N_GPRS;
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}
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inline int toFpr(Assembler::Register* reg) {
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return reg->low - N_GPRS;
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}
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const unsigned FrameHeaderSize = 1;
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const unsigned StackAlignmentInBytes = 8;
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@ -570,10 +581,37 @@ using namespace isa;
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// shortcut functions
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inline void emit(Context* con, int code) { con->code.append4(code); }
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inline int newTemp(Context* con) { return con->client->acquireTemporary(); }
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inline int newTemp(Context* con, unsigned mask) { return con->client->acquireTemporary(mask); }
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inline void freeTemp(Context* con, int r) { con->client->releaseTemporary(r); }
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inline int64_t getValue(Assembler::Constant* c) { return c->value->value(); }
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inline int newTemp(Context* con) {
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return con->client->acquireTemporary();
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}
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inline int newTemp(Context* con, unsigned mask) {
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return con->client->acquireTemporary(mask);
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}
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inline void freeTemp(Context* con, int r) {
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con->client->releaseTemporary(r);
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}
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inline int64_t getValue(Assembler::Constant* c) {
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return c->value->value();
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}
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inline Assembler::Register makeTemp(Context* con) {
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Assembler::Register tmp(newTemp(con));
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return tmp;
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}
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inline Assembler::Register makeTemp64(Context* con) {
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Assembler::Register tmp(newTemp(con), newTemp(con));
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return tmp;
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}
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inline void freeTemp(Context* con, const Assembler::Register& tmp) {
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if (tmp.low != NoRegister) freeTemp(con, tmp.low);
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if (tmp.high != NoRegister) freeTemp(con, tmp.high);
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}
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inline void
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write4(uint8_t* dst, uint32_t v)
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@ -879,46 +917,59 @@ swapRR(Context* c, unsigned aSize, Assembler::Register* a,
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}
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void
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moveRR(Context* c, unsigned srcSize, Assembler::Register* src,
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moveRR(Context* con, unsigned srcSize, Assembler::Register* src,
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unsigned dstSize, Assembler::Register* dst)
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{
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bool srcIsFpr = isFpr(src);
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bool dstIsFpr = isFpr(dst);
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if (srcIsFpr || dstIsFpr) { // floating-point register(s) involved
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/**/fprintf(stderr, ">>>>>>>>>>>>>>>>>>>>>>>> %d <- %d\n", dst->low, src->low);
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// FPR to FPR
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if (srcIsFpr && dstIsFpr) emit(con, fcpys(toFpr(dst), toFpr(src)));
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// FPR to GPR
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else if (srcIsFpr) emit(con, fmrs(dst->low, toFpr(src)));
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// GPR to FPR
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else emit(con, fmsr(toFpr(dst), src->low));
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return;
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}
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switch (srcSize) {
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case 1:
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emit(c, lsli(dst->low, src->low, 24));
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emit(c, asri(dst->low, dst->low, 24));
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emit(con, lsli(dst->low, src->low, 24));
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emit(con, asri(dst->low, dst->low, 24));
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break;
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case 2:
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emit(c, lsli(dst->low, src->low, 16));
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emit(c, asri(dst->low, dst->low, 16));
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emit(con, lsli(dst->low, src->low, 16));
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emit(con, asri(dst->low, dst->low, 16));
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break;
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case 4:
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case 8:
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if (srcSize == 4 and dstSize == 8) {
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moveRR(c, 4, src, 4, dst);
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emit(c, asri(dst->high, src->low, 31));
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moveRR(con, 4, src, 4, dst);
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emit(con, asri(dst->high, src->low, 31));
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} else if (srcSize == 8 and dstSize == 8) {
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Assembler::Register srcHigh(src->high);
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Assembler::Register dstHigh(dst->high);
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if (src->high == dst->low) {
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if (src->low == dst->high) {
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swapRR(c, 4, src, 4, dst);
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swapRR(con, 4, src, 4, dst);
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} else {
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moveRR(c, 4, &srcHigh, 4, &dstHigh);
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moveRR(c, 4, src, 4, dst);
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moveRR(con, 4, &srcHigh, 4, &dstHigh);
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moveRR(con, 4, src, 4, dst);
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}
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} else {
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moveRR(c, 4, src, 4, dst);
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moveRR(c, 4, &srcHigh, 4, &dstHigh);
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moveRR(con, 4, src, 4, dst);
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moveRR(con, 4, &srcHigh, 4, &dstHigh);
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}
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} else if (src->low != dst->low) {
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emit(c, mov(dst->low, src->low));
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emit(con, mov(dst->low, src->low));
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}
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break;
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default: abort(c);
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default: abort(con);
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}
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}
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@ -937,26 +988,32 @@ moveZRR(Context* c, unsigned srcSize, Assembler::Register* src,
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}
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void
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moveCR2(Context* c, unsigned, Assembler::Constant* src,
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unsigned dstSize, Assembler::Register* dst, Promise* callOffset)
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moveCR2(Context* con, unsigned size, Assembler::Constant* src,
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Assembler::Register* dst, Promise* callOffset)
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{
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if (dstSize <= 4) {
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if (isFpr(dst)) { // floating-point
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Assembler::Register tmp = makeTemp(con);
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/**/fprintf(stderr, ">>>>>>>>>>>>>>>>>>>>>>>> %d <- 0x%llx\n", tmp.low, getValue(src));
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moveCR2(con, size, src, &tmp, 0);
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moveRR(con, size, &tmp, size, dst);
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freeTemp(con, tmp);
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} else if (size <= 4) {
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if (src->value->resolved() and isOfWidth(getValue(src), 8)) {
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emit(c, movi(dst->low, lo8(getValue(src))));
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emit(con, movi(dst->low, lo8(getValue(src))));
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} else {
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appendConstantPoolEntry(c, src->value, callOffset);
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emit(c, ldri(dst->low, ProgramCounter, 0));
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appendConstantPoolEntry(con, src->value, callOffset);
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emit(con, ldri(dst->low, ProgramCounter, 0));
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}
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} else {
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abort(c); // todo
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abort(con); // todo
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}
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}
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void
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moveCR(Context* c, unsigned srcSize, Assembler::Constant* src,
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unsigned dstSize, Assembler::Register* dst)
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moveCR(Context* con, unsigned size, Assembler::Constant* src,
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unsigned, Assembler::Register* dst)
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{
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moveCR2(c, srcSize, src, dstSize, dst, 0);
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moveCR2(con, size, src, dst, 0);
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}
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void addR(Context* con, unsigned size, Assembler::Register* a, Assembler::Register* b, Assembler::Register* t) {
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@ -1096,7 +1153,8 @@ void floatAddR(Context* con, unsigned size, Assembler::Register* a, Assembler::R
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if (size == 8) {
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emit(con, faddd(t->low, a->low, b->low));
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} else {
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emit(con, fadds(t->low, a->low, b->low));
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fprintf(stderr, "$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$ %d <- %d + %d\n", toFpr(t), toFpr(a), toFpr(b));
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emit(con, fadds(toFpr(t), toFpr(a), toFpr(b)));
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}
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}
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@ -1175,71 +1233,91 @@ normalize(Context* c, int offset, int index, unsigned scale,
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}
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void
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store(Context* c, unsigned size, Assembler::Register* src,
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store(Context* con, unsigned size, Assembler::Register* src,
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int base, int offset, int index, unsigned scale, bool preserveIndex)
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{
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if (index != NoRegister) {
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bool release;
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int normalized = normalize
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(c, offset, index, scale, &preserveIndex, &release);
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(con, offset, index, scale, &preserveIndex, &release);
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switch (size) {
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case 1:
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emit(c, strb(src->low, base, normalized));
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break;
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if (isFpr(src)) { // floating-point store
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if (size == 4) {
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/**/fprintf(stderr, ">>>>>>>>>>>>>>>>>>>>>>>> fpr store base-indexed\n");
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Assembler::Register base_(base),
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normalized_(normalized),
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absAddr = makeTemp(con);
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addR(con, size, &base_, &normalized_, &absAddr);
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emit(con, fsts(toFpr(src), absAddr.low));
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freeTemp(con, absAddr);
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}
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else abort(con);
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} else {
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switch (size) {
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case 1:
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emit(con, strb(src->low, base, normalized));
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break;
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case 2:
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emit(c, strh(src->low, base, normalized));
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break;
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case 2:
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emit(con, strh(src->low, base, normalized));
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break;
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case 4:
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emit(c, str(src->low, base, normalized));
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break;
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case 4:
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emit(con, str(src->low, base, normalized));
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break;
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case 8: {
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Assembler::Register srcHigh(src->high);
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store(c, 4, &srcHigh, base, 0, normalized, 1, preserveIndex);
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store(c, 4, src, base, 4, normalized, 1, preserveIndex);
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} break;
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case 8: {
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Assembler::Register srcHigh(src->high);
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store(con, 4, &srcHigh, base, 0, normalized, 1, preserveIndex);
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store(con, 4, src, base, 4, normalized, 1, preserveIndex);
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} break;
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default: abort(c);
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default: abort(con);
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}
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}
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if (release) c->client->releaseTemporary(normalized);
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if (release) con->client->releaseTemporary(normalized);
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} else if (size == 8
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or abs(offset) == (abs(offset) & 0xFF)
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or (size != 2 and abs(offset) == (abs(offset) & 0xFFF)))
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{
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switch (size) {
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case 1:
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emit(c, strbi(src->low, base, offset));
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break;
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if (isFpr(src)) {
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/**/fprintf(stderr, ">>>>>>>>>>>>>>>>>>>>>>>> fpr store offset -> %d\n", src->low);
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if (size == 4) emit(con, fsts(toFpr(src), base, offset));
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else abort(con);
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} else {
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switch (size) {
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case 1:
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emit(con, strbi(src->low, base, offset));
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break;
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case 2:
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emit(c, strhi(src->low, base, offset));
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break;
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case 2:
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emit(con, strhi(src->low, base, offset));
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break;
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case 4:
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emit(c, stri(src->low, base, offset));
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break;
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case 4:
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emit(con, stri(src->low, base, offset));
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break;
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case 8: {
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Assembler::Register srcHigh(src->high);
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store(c, 4, &srcHigh, base, offset, NoRegister, 1, false);
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store(c, 4, src, base, offset + 4, NoRegister, 1, false);
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} break;
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case 8: {
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Assembler::Register srcHigh(src->high);
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store(con, 4, &srcHigh, base, offset, NoRegister, 1, false);
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store(con, 4, src, base, offset + 4, NoRegister, 1, false);
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} break;
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default: abort(c);
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default: abort(con);
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}
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}
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} else {
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Assembler::Register tmp(c->client->acquireTemporary());
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Assembler::Register tmp(con->client->acquireTemporary());
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ResolvedPromise offsetPromise(offset);
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Assembler::Constant offsetConstant(&offsetPromise);
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moveCR(c, TargetBytesPerWord, &offsetConstant, TargetBytesPerWord, &tmp);
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moveCR(con, TargetBytesPerWord, &offsetConstant,
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TargetBytesPerWord, &tmp);
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store(c, size, src, base, 0, tmp.low, 1, false);
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store(con, size, src, base, 0, tmp.low, 1, false);
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c->client->releaseTemporary(tmp.low);
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con->client->releaseTemporary(tmp.low);
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}
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}
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@ -1270,98 +1348,124 @@ moveAndUpdateRM(Context* c, unsigned srcSize UNUSED, Assembler::Register* src,
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}
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void
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load(Context* c, unsigned srcSize, int base, int offset, int index,
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load(Context* con, unsigned srcSize, int base, int offset, int index,
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unsigned scale, unsigned dstSize, Assembler::Register* dst,
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bool preserveIndex, bool signExtend)
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{
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if (index != NoRegister) {
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bool release;
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int normalized = normalize
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(c, offset, index, scale, &preserveIndex, &release);
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(con, offset, index, scale, &preserveIndex, &release);
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switch (srcSize) {
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case 1:
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if (signExtend) {
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emit(c, ldrsb(dst->low, base, normalized));
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} else {
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emit(c, ldrb(dst->low, base, normalized));
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if (isFpr(dst)) { // floating-point store
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if (srcSize == 4) {
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/**/fprintf(stderr, ">>>>>>>>>>>>>>>>>>>>>>>> fpr load base-indexed\n");
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Assembler::Register base_(base),
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normalized_(normalized),
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absAddr = makeTemp(con);
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addR(con, srcSize, &base_, &normalized_, &absAddr);
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emit(con, flds(toFpr(dst), absAddr.low));
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freeTemp(con, absAddr);
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}
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break;
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else abort(con);
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} else {
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switch (srcSize) {
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case 1:
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if (signExtend) {
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emit(con, ldrsb(dst->low, base, normalized));
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} else {
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emit(con, ldrb(dst->low, base, normalized));
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}
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break;
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case 2:
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if (signExtend) {
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emit(c, ldrsh(dst->low, base, normalized));
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} else {
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emit(c, ldrh(dst->low, base, normalized));
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case 2:
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if (signExtend) {
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emit(con, ldrsh(dst->low, base, normalized));
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} else {
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emit(con, ldrh(dst->low, base, normalized));
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}
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break;
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case 4:
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case 8: {
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if (srcSize == 4 and dstSize == 8) {
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load(con, 4, base, 0, normalized, 1, 4, dst, preserveIndex,
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false);
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moveRR(con, 4, dst, 8, dst);
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} else if (srcSize == 8 and dstSize == 8) {
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Assembler::Register dstHigh(dst->high);
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load(con, 4, base, 0, normalized, 1, 4, &dstHigh,
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preserveIndex, false);
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load(con, 4, base, 4, normalized, 1, 4, dst, preserveIndex,
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false);
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} else {
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emit(con, ldr(dst->low, base, normalized));
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}
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} break;
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default: abort(con);
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}
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break;
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case 4:
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case 8: {
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if (srcSize == 4 and dstSize == 8) {
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load(c, 4, base, 0, normalized, 1, 4, dst, preserveIndex, false);
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moveRR(c, 4, dst, 8, dst);
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} else if (srcSize == 8 and dstSize == 8) {
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Assembler::Register dstHigh(dst->high);
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load(c, 4, base, 0, normalized, 1, 4, &dstHigh, preserveIndex, false);
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load(c, 4, base, 4, normalized, 1, 4, dst, preserveIndex, false);
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} else {
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emit(c, ldr(dst->low, base, normalized));
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}
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} break;
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default: abort(c);
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}
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if (release) c->client->releaseTemporary(normalized);
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if (release) con->client->releaseTemporary(normalized);
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} else if ((srcSize == 8 and dstSize == 8)
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or abs(offset) == (abs(offset) & 0xFF)
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or (srcSize != 2
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and (srcSize != 1 or not signExtend)
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and abs(offset) == (abs(offset) & 0xFFF)))
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{
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switch (srcSize) {
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case 1:
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if (signExtend) {
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emit(c, ldrsbi(dst->low, base, offset));
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} else {
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emit(c, ldrbi(dst->low, base, offset));
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if (isFpr(dst)) {
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/**/fprintf(stderr, ">>>>>>>>>>>>>>>>>>>>>>>> fpr load offset <- %d\n", dst->low);
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if (srcSize == 4) emit(con, flds(toFpr(dst), base, offset));
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else abort(con);
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} else {
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switch (srcSize) {
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case 1:
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if (signExtend) {
|
||||
emit(con, ldrsbi(dst->low, base, offset));
|
||||
} else {
|
||||
emit(con, ldrbi(dst->low, base, offset));
|
||||
}
|
||||
break;
|
||||
|
||||
case 2:
|
||||
if (signExtend) {
|
||||
emit(con, ldrshi(dst->low, base, offset));
|
||||
} else {
|
||||
emit(con, ldrhi(dst->low, base, offset));
|
||||
}
|
||||
break;
|
||||
|
||||
case 4:
|
||||
emit(con, ldri(dst->low, base, offset));
|
||||
break;
|
||||
|
||||
case 8: {
|
||||
if (dstSize == 8) {
|
||||
Assembler::Register dstHigh(dst->high);
|
||||
load(con, 4, base, offset, NoRegister, 1, 4, &dstHigh, false,
|
||||
false);
|
||||
load(con, 4, base, offset + 4, NoRegister, 1, 4, dst, false,
|
||||
false);
|
||||
} else {
|
||||
emit(con, ldri(dst->low, base, offset));
|
||||
}
|
||||
} break;
|
||||
|
||||
default: abort(con);
|
||||
}
|
||||
break;
|
||||
|
||||
case 2:
|
||||
if (signExtend) {
|
||||
emit(c, ldrshi(dst->low, base, offset));
|
||||
} else {
|
||||
emit(c, ldrhi(dst->low, base, offset));
|
||||
}
|
||||
break;
|
||||
|
||||
case 4:
|
||||
emit(c, ldri(dst->low, base, offset));
|
||||
break;
|
||||
|
||||
case 8: {
|
||||
if (dstSize == 8) {
|
||||
Assembler::Register dstHigh(dst->high);
|
||||
load(c, 4, base, offset, NoRegister, 1, 4, &dstHigh, false, false);
|
||||
load(c, 4, base, offset + 4, NoRegister, 1, 4, dst, false, false);
|
||||
} else {
|
||||
emit(c, ldri(dst->low, base, offset));
|
||||
}
|
||||
} break;
|
||||
|
||||
default: abort(c);
|
||||
}
|
||||
} else {
|
||||
Assembler::Register tmp(c->client->acquireTemporary());
|
||||
Assembler::Register tmp(con->client->acquireTemporary());
|
||||
ResolvedPromise offsetPromise(offset);
|
||||
Assembler::Constant offsetConstant(&offsetPromise);
|
||||
moveCR(c, TargetBytesPerWord, &offsetConstant, TargetBytesPerWord, &tmp);
|
||||
moveCR(con, TargetBytesPerWord, &offsetConstant, TargetBytesPerWord,
|
||||
&tmp);
|
||||
|
||||
load(c, srcSize, base, 0, tmp.low, 1, dstSize, dst, false, signExtend);
|
||||
load(con, srcSize, base, 0, tmp.low, 1, dstSize, dst, false,
|
||||
signExtend);
|
||||
|
||||
c->client->releaseTemporary(tmp.low);
|
||||
con->client->releaseTemporary(tmp.low);
|
||||
}
|
||||
}
|
||||
|
||||
@ -1773,7 +1877,7 @@ longCallC(Context* c, unsigned size UNUSED, Assembler::Constant* target)
|
||||
assert(c, size == TargetBytesPerWord);
|
||||
|
||||
Assembler::Register tmp(4);
|
||||
moveCR2(c, TargetBytesPerWord, target, TargetBytesPerWord, &tmp, offset(c));
|
||||
moveCR2(c, TargetBytesPerWord, target, &tmp, offset(c));
|
||||
callR(c, TargetBytesPerWord, &tmp);
|
||||
}
|
||||
|
||||
@ -1783,7 +1887,7 @@ longJumpC(Context* c, unsigned size UNUSED, Assembler::Constant* target)
|
||||
assert(c, size == TargetBytesPerWord);
|
||||
|
||||
Assembler::Register tmp(4); // a non-arg reg that we don't mind clobbering
|
||||
moveCR2(c, TargetBytesPerWord, target, TargetBytesPerWord, &tmp, offset(c));
|
||||
moveCR2(c, TargetBytesPerWord, target, &tmp, offset(c));
|
||||
jumpR(c, TargetBytesPerWord, &tmp);
|
||||
}
|
||||
|
||||
@ -1970,7 +2074,7 @@ class MyArchitecture: public Assembler::Architecture {
|
||||
}
|
||||
|
||||
virtual unsigned floatRegisterSize() {
|
||||
return vfpSupported() ? 16 : 0;
|
||||
return vfpSupported() ? 4 : 0;
|
||||
}
|
||||
|
||||
virtual uint32_t generalRegisterMask() {
|
||||
@ -2197,19 +2301,31 @@ class MyArchitecture: public Assembler::Architecture {
|
||||
case FloatSquareRoot:
|
||||
case FloatNegate:
|
||||
case Float2Float:
|
||||
if (!vfpSupported()) {
|
||||
if (vfpSupported()) {
|
||||
*aTypeMask = (1 << RegisterOperand);
|
||||
*aRegisterMask = FPR_MASK;
|
||||
*thunk = true;
|
||||
} else {
|
||||
*thunk = true;
|
||||
}
|
||||
break;
|
||||
|
||||
case Float2Int:
|
||||
if (!vfpSupported() || bSize != 4) {
|
||||
if (vfpSupported() && bSize == 4 && aSize == 4) {
|
||||
*aTypeMask = (1 << RegisterOperand);
|
||||
*aRegisterMask = FPR_MASK;
|
||||
*thunk = true;
|
||||
} else {
|
||||
*thunk = true;
|
||||
}
|
||||
break;
|
||||
|
||||
case Int2Float:
|
||||
if (!vfpSupported() || aSize != 4) {
|
||||
if (vfpSupported() && aSize == 4 && bSize == 4) {
|
||||
*aTypeMask = (1 << RegisterOperand);
|
||||
*aRegisterMask = FPR_MASK;
|
||||
*thunk = true;
|
||||
} else {
|
||||
*thunk = true;
|
||||
}
|
||||
break;
|
||||
@ -2287,6 +2403,9 @@ class MyArchitecture: public Assembler::Architecture {
|
||||
|
||||
case Divide:
|
||||
case Remainder:
|
||||
*thunk = true;
|
||||
break;
|
||||
|
||||
case FloatAdd:
|
||||
case FloatSubtract:
|
||||
case FloatMultiply:
|
||||
@ -2302,9 +2421,8 @@ class MyArchitecture: public Assembler::Architecture {
|
||||
case JumpIfFloatGreaterOrUnordered:
|
||||
case JumpIfFloatLessOrEqualOrUnordered:
|
||||
case JumpIfFloatGreaterOrEqualOrUnordered:
|
||||
if (!vfpSupported()) {
|
||||
*thunk = true;
|
||||
}
|
||||
if (vfpSupported()) *thunk = true;
|
||||
else *thunk = true;
|
||||
break;
|
||||
|
||||
default:
|
||||
|
||||
Loading…
Reference in New Issue
Block a user