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implement negateRR

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This commit is contained in:
Joel Dice 2009-03-01 12:57:07 -07:00
parent 36196910ed
commit 28d4409b0a
1 changed files with 21 additions and 0 deletions
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21
src/powerpc.cpp
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@ -68,6 +68,7 @@ inline int stwu(int rs, int ra, int i) { return D(37, rs, ra, i); }
inline int stwx(int rs, int ra, int rb) { return X(31, rs, ra, rb, 151, 0); } inline int stwx(int rs, int ra, int rb) { return X(31, rs, ra, rb, 151, 0); }
inline int add(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 266, 0); } inline int add(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 266, 0); }
inline int addc(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 10, 0); } inline int addc(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 10, 0); }
inline int addci(int rt, int ra, int i) { return D(12, rt, ra, i); }
inline int adde(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 138, 0); } inline int adde(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 138, 0); }
inline int addi(int rt, int ra, int i) { return D(14, rt, ra, i); } inline int addi(int rt, int ra, int i) { return D(14, rt, ra, i); }
inline int addis(int rt, int ra, int i) { return D(15, rt, ra, i); } inline int addis(int rt, int ra, int i) { return D(15, rt, ra, i); }
@ -83,6 +84,7 @@ inline int divw(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 491, 0);
inline int divwu(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 459, 0); } inline int divwu(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 459, 0); }
inline int divd(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 489, 0); } inline int divd(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 489, 0); }
inline int divdu(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 457, 0); } inline int divdu(int rt, int ra, int rb) { return XO(31, rt, ra, rb, 0, 457, 0); }
inline int neg(int rt, int ra) { return XO(31, rt, ra, 0, 0, 104, 0); }
inline int and_(int rt, int ra, int rb) { return X(31, ra, rt, rb, 28, 0); } inline int and_(int rt, int ra, int rb) { return X(31, ra, rt, rb, 28, 0); }
inline int andi(int rt, int ra, int i) { return D(28, ra, rt, i); } inline int andi(int rt, int ra, int i) { return D(28, ra, rt, i); }
inline int andis(int rt, int ra, int i) { return D(29, ra, rt, i); } inline int andis(int rt, int ra, int i) { return D(29, ra, rt, i); }
@ -1342,6 +1344,23 @@ moveCM(Context* c, unsigned srcSize, Assembler::Constant* src,
} }
} }
void
negateRR(Context* c, unsigned srcSize, Assembler::Register* src,
unsigned dstSize, Assembler::Register* dst)
{
assert(c, srcSize == dstSize);
if (srcSize == 8) {
Assembler::Register dstHigh(dst->high);
negateRR(c, 4, src, 4, dst);
issue(c, addci(dst->high, dst->high, 0));
negateRR(c, 4, &dstHigh, 4, &dstHigh);
} else {
issue(c, neg(dst->low, src->low));
}
}
void void
callR(Context* c, unsigned size, Assembler::Register* target) callR(Context* c, unsigned size, Assembler::Register* target)
{ {
@ -1504,6 +1523,8 @@ populateTables(ArchitectureContext* c)
bo[index(Compare, R, M)] = CAST2(compareRM); bo[index(Compare, R, M)] = CAST2(compareRM);
bo[index(Compare, C, M)] = CAST2(compareCM); bo[index(Compare, C, M)] = CAST2(compareCM);
bo[index(Negate, R, R)] = CAST2(negateRR);
to[index(Add, R)] = CAST3(addR); to[index(Add, R)] = CAST3(addR);
to[index(Add, C)] = CAST3(addC); to[index(Add, C)] = CAST3(addC);