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All tests passing (again).

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JET
2012-01-18 12:41:51 -07:00
parent 9c58c7c936
commit 233725e232
1 changed files with 15 additions and 15 deletions
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30
src/arm.cpp
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@ -1,4 +1,4 @@
/* Copyright (c) 2010-2011, Avian Contributors /* Copyright (c) 2010-2012, Avian Contributors
Permission to use, copy, modify, and/or distribute this software Permission to use, copy, modify, and/or distribute this software
for any purpose with or without fee is hereby granted, provided for any purpose with or without fee is hereby granted, provided
@ -232,7 +232,7 @@ inline int blo(int offset) { return SETCOND(b(offset), CC); }
inline int bhs(int offset) { return SETCOND(b(offset), CS); } inline int bhs(int offset) { return SETCOND(b(offset), CS); }
// HARDWARE FLAGS // HARDWARE FLAGS
bool vfpSupported() { bool vfpSupported() {
return true; return false; // TODO
} }
} }
@ -247,10 +247,10 @@ inline unsigned lo8(int64_t i) { return (unsigned)(i&MASK_LO8); }
inline unsigned hi8(int64_t i) { return lo8(i>>8); } inline unsigned hi8(int64_t i) { return lo8(i>>8); }
inline int ha16(int32_t i) { inline int ha16(int32_t i) {
return ((i >> 16) + ((i & 0x8000) ? 1 : 0)) & 0xffff; return ((i >> 16) + ((i & 0x8000) ? 1 : 0)) & 0xffff;
} }
inline int unha16(int32_t high, int32_t low) { inline int unha16(int32_t high, int32_t low) {
return ((high - ((low & 0x8000) ? 1 : 0)) << 16) | low; return ((high - ((low & 0x8000) ? 1 : 0)) << 16) | low;
} }
inline bool isInt8(target_intptr_t v) { return v == static_cast<int8_t>(v); } inline bool isInt8(target_intptr_t v) { return v == static_cast<int8_t>(v); }
@ -2183,37 +2183,38 @@ class MyArchitecture: public Assembler::Architecture {
unsigned aSize, uint8_t* aTypeMask, uint64_t* aRegisterMask, unsigned aSize, uint8_t* aTypeMask, uint64_t* aRegisterMask,
unsigned bSize, bool* thunk) unsigned bSize, bool* thunk)
{ {
*aTypeMask = (1 << RegisterOperand); *thunk = false;
*aTypeMask = ~0;
*aRegisterMask = ~static_cast<uint64_t>(0);
switch (op) { switch (op) {
case Negate:
*aTypeMask = (1 << RegisterOperand);
break;
case Absolute: case Absolute:
case FloatAbsolute: case FloatAbsolute:
case FloatSquareRoot: case FloatSquareRoot:
case FloatNegate: case FloatNegate:
case Float2Float: case Float2Float:
if (vfpSupported()) { if (!vfpSupported()) {
} else {
*thunk = true; *thunk = true;
} }
break; break;
case Float2Int: case Float2Int:
if (vfpSupported() && bSize == 4) { if (!vfpSupported() || bSize != 4) {
} else {
*thunk = true; *thunk = true;
} }
break; break;
case Int2Float: case Int2Float:
if (vfpSupported() && aSize == 4) { if (!vfpSupported() || aSize != 4) {
} else {
*thunk = true; *thunk = true;
} }
break; break;
default: default:
*aRegisterMask = ~static_cast<uint64_t>(0);
*thunk = false;
break; break;
} }
} }
@ -2301,8 +2302,7 @@ class MyArchitecture: public Assembler::Architecture {
case JumpIfFloatGreaterOrUnordered: case JumpIfFloatGreaterOrUnordered:
case JumpIfFloatLessOrEqualOrUnordered: case JumpIfFloatLessOrEqualOrUnordered:
case JumpIfFloatGreaterOrEqualOrUnordered: case JumpIfFloatGreaterOrEqualOrUnordered:
if (vfpSupported()) { if (!vfpSupported()) {
} else {
*thunk = true; *thunk = true;
} }
break; break;