mirror of
https://github.com/corda/corda.git
synced 2025-01-23 12:58:35 +00:00
implement a few conditional and branch instructions
This commit is contained in:
Joel Dice
parent
571615a79f
commit
0832c740fc
222
src/powerpc.cpp
222
src/powerpc.cpp
@ -17,6 +17,7 @@
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using namespace vm;
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namespace {
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namespace field {
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// BITFIELD MASKS
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@ -89,9 +90,13 @@ inline int extsb(int rt, int rs) { return X(31, rs, rt, 0, 954, 0); }
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inline int extsh(int rt, int rs) { return X(31, rs, rt, 0, 922, 0); }
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inline int mfspr(int rt, int spr) { return XFX(31, rt, spr, 339); }
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inline int mtspr(int spr, int rs) { return XFX(31, rs, spr, 467); }
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inline int b(int i) { return I(18, i, 0, 0); }
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inline int bl(int i) { return I(18, i, 0, 1); }
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inline int bcctr(int bo, int bi, int lk) { return XL(19, bo, bi, 0, 528, lk); }
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inline int bclr(int bo, int bi, int lk) { return XL(19, bo, bi, 0, 16, lk); }
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inline int bc(int bo, int bi, int bd, int lk) { return B(16, bo, bi, bd, 0, lk); }
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inline int cmp(int bf, int ra, int rb) { return X(31, bf << 2, ra, rb, 0, 0); }
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inline int cmpl(int bf, int ra, int rb) { return X(31, bf << 2, ra, rb, 32, 0); }
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// PSEUDO-INSTRUCTIONS
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inline int li(int rt, int i) { return addi(rt, 0, i); }
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inline int lis(int rt, int i) { return addis(rt, 0, i); }
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@ -107,10 +112,18 @@ inline int mtctr(int rd) { return mtspr(9, rd); }
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inline int bctr() { return bcctr(20, 0, 0); }
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inline int bctrl() { return bcctr(20, 0, 1); }
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inline int blr() { return bclr(20, 0, 0); }
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inline int blt(int i) { return bc(12, 0, i, 0); }
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inline int bgt(int i) { return bc(12, 1, i, 0); }
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inline int be(int i) { return bc(12, 2, i, 0); }
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inline int cmpw(int ra, int rb) { return cmp(0, ra, rb); }
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inline int cmplw(int ra, int rb) { return cmpl(0, ra, rb); }
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}
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namespace {
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inline bool
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isInt16(intptr_t v)
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{
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return v == static_cast<int16_t>(v);
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}
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const unsigned FrameFooterSize = 6;
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@ -261,14 +274,18 @@ updateOffset(System* s, uint8_t* instruction, bool conditional, int64_t value)
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{
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int32_t v = reinterpret_cast<uint8_t*>(value) - instruction;
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int32_t mask;
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if (conditional) {
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expect(s, bounded(2, 16, v));
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*reinterpret_cast<int32_t*>(instruction) |= v & 0xFFFC;
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mask = 0xFFFC;
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} else {
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expect(s, bounded(2, 6, v));
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*reinterpret_cast<int32_t*>(instruction) |= v & 0x3FFFFFC;
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mask = 0x3FFFFFC;
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}
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int32_t* p = reinterpret_cast<int32_t*>(instruction);
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*p = (v & mask) | ((~mask) & *p);
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return instruction + 4;
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}
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@ -420,8 +437,9 @@ updateImmediate(System* s, void* dst, int64_t src, unsigned size)
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{
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switch (size) {
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case 4: {
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static_cast<int32_t*>(dst)[0] |= src >> 16;
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static_cast<int32_t*>(dst)[1] |= src & 0xFFFF;
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int32_t* p = static_cast<int32_t*>(dst);
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p[0] = (src >> 16) | ((~0xFFFF) & p[0]);
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p[1] = (src & 0xFFFF) | ((~0xFFFF) & p[1]);
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} break;
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default: abort(s);
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@ -554,7 +572,7 @@ void addC(Context* con, unsigned size, Const* a, Reg* b, Reg* t) {
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int32_t i = getVal(a);
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if(i) {
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issue(con, addi(R(t), R(b), lo16(i)));
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if(hi16(i))
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if(not isInt16(i))
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issue(con, addis(R(t), R(t), hi16(i)));
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}
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}
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@ -800,11 +818,11 @@ moveCR2(Context* c, unsigned, Assembler::Constant* src,
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if (dstSize == 4) {
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if (src->value->resolved()) {
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int32_t v = src->value->value();
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if (v >> 16) {
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if (isInt16(v)) {
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issue(c, li(dst->low, v));
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} else {
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issue(c, lis(dst->low, v >> 16));
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issue(c, ori(dst->low, dst->low, v));
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} else {
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issue(c, li(dst->low, v));
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}
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} else {
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appendImmediateTask
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@ -824,17 +842,118 @@ moveCR(Context* c, unsigned srcSize, Assembler::Constant* src,
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moveCR2(c, srcSize, src, dstSize, dst, 0);
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}
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void moveCR3(Context* con, unsigned aSize, Const* a, unsigned tSize, Reg* t) {
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int64_t i = getVal(a);
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if(tSize == 8) {
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int64_t j;
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if(aSize == 8) j = i; // 64-bit const -> load high bits into high register
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else j = 0; // 32-bit const -> clear high register
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issue(con, lis(H(t), hi16(hi32(j))));
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issue(con, ori(H(t), H(t), lo16(hi32(j))));
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}
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issue(con, lis(R(t), hi16(i)));
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issue(con, ori(R(t), R(t), lo16(i)));
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// void moveCR3(Context* con, unsigned aSize, Const* a, unsigned tSize, Reg* t) {
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// int64_t i = getVal(a);
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// if(tSize == 8) {
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// int64_t j;
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// if(aSize == 8) j = i; // 64-bit const -> load high bits into high register
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// else j = 0; // 32-bit const -> clear high register
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// issue(con, lis(H(t), hi16(hi32(j))));
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// issue(con, ori(H(t), H(t), lo16(hi32(j))));
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// }
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// issue(con, lis(R(t), hi16(i)));
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// issue(con, ori(R(t), R(t), lo16(i)));
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// }
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void
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compareRR(Context* c, unsigned aSize, Assembler::Register* a,
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unsigned bSize, Assembler::Register* b)
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{
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assert(c, aSize == 4);
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assert(c, bSize == 4);
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issue(c, cmpw(a->low, b->low));
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}
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void
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compareUnsignedRR(Context* c, unsigned aSize, Assembler::Register* a,
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unsigned bSize, Assembler::Register* b)
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{
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assert(c, aSize == 4);
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assert(c, bSize == 4);
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issue(c, cmplw(a->low, b->low));
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}
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void
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longCompare(Context* c, Assembler::Operand* al, Assembler::Operand* ah,
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Assembler::Operand* bl, Assembler::Operand* bh,
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Assembler::Register* dst, BinaryOperationType compareSigned,
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BinaryOperationType compareUnsigned)
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{
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ResolvedPromise negativePromise(-1);
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Assembler::Constant negative(&negativePromise);
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ResolvedPromise zeroPromise(0);
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Assembler::Constant zero(&zeroPromise);
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ResolvedPromise positivePromise(1);
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Assembler::Constant positive(&positivePromise);
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compareSigned(c, 4, ah, 4, bh);
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unsigned less = c->code.length();
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issue(c, blt(0));
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unsigned greater = c->code.length();
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issue(c, bgt(0));
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compareUnsigned(c, 4, al, 4, bl);
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unsigned above = c->code.length();
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issue(c, bgt(0));
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unsigned below = c->code.length();
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issue(c, blt(0));
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moveCR(c, 4, &zero, 4, dst);
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unsigned nextFirst = c->code.length();
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issue(c, b(0));
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updateOffset
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(c->s, c->code.data + less, true, reinterpret_cast<intptr_t>
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(c->code.data + c->code.length()));
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updateOffset
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(c->s, c->code.data + above, true, reinterpret_cast<intptr_t>
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(c->code.data + c->code.length()));
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moveCR(c, 4, &negative, 4, dst);
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unsigned nextSecond = c->code.length();
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issue(c, b(0));
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updateOffset
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(c->s, c->code.data + greater, true, reinterpret_cast<intptr_t>
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(c->code.data + c->code.length()));
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updateOffset
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(c->s, c->code.data + below, true, reinterpret_cast<intptr_t>
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(c->code.data + c->code.length()));
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moveCR(c, 4, &positive, 4, dst);
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updateOffset
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(c->s, c->code.data + nextFirst, false, reinterpret_cast<intptr_t>
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(c->code.data + c->code.length()));
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updateOffset
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(c->s, c->code.data + nextSecond, false, reinterpret_cast<intptr_t>
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(c->code.data + c->code.length()));
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}
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void
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longCompareR(Context* c, unsigned size UNUSED, Assembler::Register* a,
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Assembler::Register* b, Assembler::Register* dst)
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{
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assert(c, size == 8);
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Assembler::Register ah(a->high);
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Assembler::Register bh(b->high);
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longCompare(c, a, &ah, b, &bh, dst, CAST2(compareRR),
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CAST2(compareUnsignedRR));
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}
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ShiftMaskPromise*
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@ -907,14 +1026,27 @@ longJumpC(Context* c, unsigned size, Assembler::Constant* target)
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jumpR(c, BytesPerWord, &tmp);
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}
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void
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jumpC(Context* c, unsigned size UNUSED, Assembler::Constant* target)
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{
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assert(c, size == BytesPerWord);
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appendOffsetTask(c, target->value, offset(c), false);
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issue(c, b(0));
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}
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void
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jumpIfEqualC(Context* c, unsigned size UNUSED, Assembler::Constant* target)
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{
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assert(c, size == BytesPerWord);
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appendOffsetTask(c, target->value, offset(c), true);
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issue(c, be(0));
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}
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void
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return_(Context* c)
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{
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Assembler::Register returnAddress(0);
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Assembler::Memory returnAddressSrc(StackRegister, 8);
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moveMR(c, BytesPerWord, &returnAddressSrc, BytesPerWord, &returnAddress);
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issue(c, mtlr(returnAddress.low));
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issue(c, blr());
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}
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@ -941,8 +1073,12 @@ populateTables(ArchitectureContext* c)
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uo[index(LongJump, C)] = CAST1(longJumpC);
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uo[index(Jump, R)] = CAST1(jumpR);
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uo[index(Jump, C)] = CAST1(jumpC);
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uo[index(JumpIfEqual, C)] = CAST1(jumpIfEqualC);
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uo[index(Call, C)] = CAST1(callC);
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uo[index(AlignedCall, C)] = CAST1(callC);
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bo[index(Move, R, R)] = CAST2(moveRR);
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@ -951,11 +1087,15 @@ populateTables(ArchitectureContext* c)
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bo[index(Move, M, R)] = CAST2(moveMR);
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bo[index(Move, R, M)] = CAST2(moveRM);
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bo[index(Compare, R, R)] = CAST2(compareRR);
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to[index(Add, R)] = CAST3(addR);
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to[index(Add, C)] = CAST3(addC);
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to[index(Subtract, R)] = CAST3(subR);
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to[index(Subtract, C)] = CAST3(subC);
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to[index(LongCompare, R)] = CAST3(longCompareR);
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}
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class MyArchitecture: public Assembler::Architecture {
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@ -1010,17 +1150,23 @@ class MyArchitecture: public Assembler::Architecture {
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}
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virtual void updateCall(UnaryOperation op UNUSED,
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bool assertAlignment UNUSED, void* /*returnAddress*/,
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void* /*newTarget*/)
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bool assertAlignment UNUSED, void* returnAddress,
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void* newTarget)
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{
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// todo
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abort(&c);
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switch (op) {
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case Call:
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case Jump: {
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updateOffset(c.s, static_cast<uint8_t*>(returnAddress) - 4, false,
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reinterpret_cast<intptr_t>(newTarget));
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} break;
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default: abort(&c);
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}
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}
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virtual unsigned alignFrameSize(unsigned sizeInWords) {
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const unsigned alignment = 16 / BytesPerWord;
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return (ceiling(sizeInWords + FrameFooterSize, alignment) * alignment)
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- FrameFooterSize;
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return (ceiling(sizeInWords + FrameFooterSize, alignment) * alignment);
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}
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virtual void* frameIp(void* stack) {
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@ -1069,7 +1215,7 @@ class MyArchitecture: public Assembler::Architecture {
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switch (op) {
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case Compare:
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*aTypeMask = (1 << RegisterOperand) | (1 << ConstantOperand);
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*aTypeMask = (1 << RegisterOperand);
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*bTypeMask = (1 << RegisterOperand);
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break;
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@ -1106,6 +1252,10 @@ class MyArchitecture: public Assembler::Architecture {
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}
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break;
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case LongCompare:
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*aTypeMask = *bTypeMask = (1 << RegisterOperand);
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break;
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case Divide:
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if (BytesPerWord == 4 and aSize == 8) {
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*bTypeMask = ~0;
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@ -1220,6 +1370,12 @@ class MyAssembler: public Assembler {
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Register stack(StackRegister);
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Memory stackSrc(StackRegister, 0);
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moveMR(&c, BytesPerWord, &stackSrc, BytesPerWord, &stack);
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Assembler::Register returnAddress(0);
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Assembler::Memory returnAddressSrc(StackRegister, 8);
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moveMR(&c, BytesPerWord, &returnAddressSrc, BytesPerWord, &returnAddress);
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issue(&c, mtlr(returnAddress.low));
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}
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virtual void apply(Operation op) {
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