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234 lines
5.8 KiB
C
234 lines
5.8 KiB
C
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/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2016-2017 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* Contact Information:
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* Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
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* Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo
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*
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* BSD LICENSE
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*
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* Copyright(c) 2016-2017 Intel Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors:
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*
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* Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
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* Suresh Siddha <suresh.b.siddha@intel.com>
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*/
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#ifndef _ASM_X86_SGX_H
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#define _ASM_X86_SGX_H
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#include "sgx_arch.h"
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#include <asm/asm.h>
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#include <linux/bitops.h>
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#include <linux/err.h>
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#include <linux/types.h>
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#define SGX_CPUID 0x12
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enum sgx_cpuid {
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SGX_CPUID_CAPABILITIES = 0,
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SGX_CPUID_ATTRIBUTES = 1,
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SGX_CPUID_EPC_BANKS = 2,
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};
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enum sgx_commands {
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ECREATE = 0x0,
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EADD = 0x1,
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EINIT = 0x2,
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EREMOVE = 0x3,
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EDGBRD = 0x4,
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EDGBWR = 0x5,
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EEXTEND = 0x6,
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ELDU = 0x8,
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EBLOCK = 0x9,
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EPA = 0xA,
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EWB = 0xB,
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ETRACK = 0xC,
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EAUG = 0xD,
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EMODPR = 0xE,
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EMODT = 0xF,
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};
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#ifdef CONFIG_X86_64
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#define XAX "%%rax"
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#else
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#define XAX "%%eax"
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#endif
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#define __encls_ret(rax, rbx, rcx, rdx) \
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({ \
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int ret; \
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asm volatile( \
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"1: .byte 0x0f, 0x01, 0xcf;\n\t" \
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"2:\n" \
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".section .fixup,\"ax\"\n" \
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"3: mov $-14,"XAX"\n" \
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" jmp 2b\n" \
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".previous\n" \
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_ASM_EXTABLE(1b, 3b) \
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: "=a"(ret) \
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: "a"(rax), "b"(rbx), "c"(rcx), "d"(rdx) \
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: "memory"); \
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ret; \
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})
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#define __encls(rax, rbx, rcx, rdx...) \
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({ \
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int ret; \
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asm volatile( \
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"1: .byte 0x0f, 0x01, 0xcf;\n\t" \
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" xor "XAX","XAX"\n" \
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"2:\n" \
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".section .fixup,\"ax\"\n" \
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"3: mov $-14,"XAX"\n" \
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" jmp 2b\n" \
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".previous\n" \
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_ASM_EXTABLE(1b, 3b) \
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: "=a"(ret), "=b"(rbx), "=c"(rcx) \
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: "a"(rax), "b"(rbx), "c"(rcx), rdx \
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: "memory"); \
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ret; \
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})
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static inline unsigned long __ecreate(struct sgx_pageinfo *pginfo, void *secs)
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{
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return __encls(ECREATE, pginfo, secs, "d"(0));
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}
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static inline int __eextend(void *secs, void *epc)
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{
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return __encls(EEXTEND, secs, epc, "d"(0));
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}
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static inline int __eadd(struct sgx_pageinfo *pginfo, void *epc)
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{
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return __encls(EADD, pginfo, epc, "d"(0));
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}
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static inline int __einit(void *sigstruct, struct sgx_einittoken *einittoken,
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void *secs)
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{
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return __encls_ret(EINIT, sigstruct, secs, einittoken);
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}
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static inline int __eremove(void *epc)
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{
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unsigned long rbx = 0;
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unsigned long rdx = 0;
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return __encls_ret(EREMOVE, rbx, epc, rdx);
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}
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static inline int __edbgwr(void *epc, unsigned long *data)
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{
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return __encls(EDGBWR, *data, epc, "d"(0));
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}
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static inline int __edbgrd(void *epc, unsigned long *data)
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{
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unsigned long rbx = 0;
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int ret;
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ret = __encls(EDGBRD, rbx, epc, "d"(0));
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if (!ret)
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*(unsigned long *) data = rbx;
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return ret;
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}
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static inline int __etrack(void *epc)
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{
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unsigned long rbx = 0;
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unsigned long rdx = 0;
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return __encls_ret(ETRACK, rbx, epc, rdx);
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}
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static inline int __eldu(unsigned long rbx, unsigned long rcx,
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unsigned long rdx)
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{
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return __encls_ret(ELDU, rbx, rcx, rdx);
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}
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static inline int __eblock(unsigned long rcx)
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{
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unsigned long rbx = 0;
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unsigned long rdx = 0;
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return __encls_ret(EBLOCK, rbx, rcx, rdx);
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}
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static inline int __epa(void *epc)
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{
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unsigned long rbx = SGX_PAGE_TYPE_VA;
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return __encls(EPA, rbx, epc, "d"(0));
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}
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static inline int __ewb(struct sgx_pageinfo *pginfo, void *epc, void *va)
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{
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return __encls_ret(EWB, pginfo, epc, va);
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}
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static inline int __eaug(struct sgx_pageinfo *pginfo, void *epc)
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{
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return __encls(EAUG, pginfo, epc, "d"(0));
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}
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static inline int __emodpr(struct sgx_secinfo *secinfo, void *epc)
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{
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unsigned long rdx = 0;
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return __encls_ret(EMODPR, secinfo, epc, rdx);
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}
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static inline int __emodt(struct sgx_secinfo *secinfo, void *epc)
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{
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unsigned long rdx = 0;
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return __encls_ret(EMODT, secinfo, epc, rdx);
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}
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#endif /* _ASM_X86_SGX_H */
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