corda/src/avian/x86.h

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/* Copyright (c) 2008-2015, Avian Contributors
Permission to use, copy, modify, and/or distribute this software
for any purpose with or without fee is hereby granted, provided
that the above copyright notice and this permission notice appear
in all copies.
There is NO WARRANTY for this software. See license.txt for
details. */
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#ifndef X86_H
#define X86_H
#include "avian/types.h"
#include "avian/common.h"
#ifdef _MSC_VER
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#include "windows.h"
#pragma push_macro("assert")
#include "intrin.h"
#pragma pop_macro("assert")
#undef interface
#endif
#if (defined ARCH_x86_32) || (defined PLATFORM_WINDOWS)
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#define VA_LIST(x) (&(x))
#else
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#define VA_LIST(x) (x)
#endif
support stack unwinding without using a frame pointer Previously, we unwound the stack by following the chain of frame pointers for normal returns, stack trace creation, and exception unwinding. On x86, this required reserving EBP/RBP for frame pointer duties, making it unavailable for general computation and requiring that it be explicitly saved and restored on entry and exit, respectively. On PowerPC, we use an ABI that makes the stack pointer double as a frame pointer, so it doesn't cost us anything. We've been using the same convention on ARM, but it doesn't match the native calling convention, which makes it unusable when we want to call native code from Java and pass arguments on the stack. So far, the ARM calling convention mismatch hasn't been an issue because we've never passed more arguments from Java to native code than would fit in registers. However, we must now pass an extra argument (the thread pointer) to e.g. divideLong so it can throw an exception on divide by zero, which means the last argument must be passed on the stack. This will clobber the linkage area we've been using to hold the frame pointer, so we need to stop using it. One solution would be to use the same convention on ARM as we do on x86, but this would introduce the same overhead of making a register unavailable for general use and extra code at method entry and exit. Instead, this commit removes the need for a frame pointer. Unwinding involves consulting a map of instruction offsets to frame sizes which is generated at compile time. This is necessary because stack trace creation can happen at any time due to Thread.getStackTrace being called by another thread, and the frame size varies during the execution of a method. So far, only x86(_64) is working, and continuations and tail call optimization are probably broken. More to come.
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#ifdef __APPLE__
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#include "mach/mach_types.h"
#include "mach/thread_act.h"
#include "mach/thread_status.h"
#if __DARWIN_UNIX03 && defined(_STRUCT_X86_EXCEPTION_STATE32)
#define FIELD(x) __##x
#else
#define FIELD(x) x
#endif
#endif
#ifdef ARCH_x86_32
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#ifdef __APPLE__
#define THREAD_STATE x86_THREAD_STATE32
#define THREAD_STATE_TYPE x86_thread_state32_t
#define THREAD_STATE_COUNT x86_THREAD_STATE32_COUNT
#define THREAD_STATE_IP(state) ((state).FIELD(eip))
#define THREAD_STATE_STACK(state) ((state).FIELD(esp))
#define THREAD_STATE_THREAD(state) ((state).FIELD(ebx))
#define THREAD_STATE_LINK(state) ((state).FIELD(ecx))
#define THREAD_STATE_FRAME(state) ((state).FIELD(ebp))
#define IP_REGISTER(context) THREAD_STATE_IP(context->uc_mcontext->FIELD(ss))
#define STACK_REGISTER(context) \
THREAD_STATE_STACK(context->uc_mcontext->FIELD(ss))
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#define THREAD_REGISTER(context) \
THREAD_STATE_THREAD(context->uc_mcontext->FIELD(ss))
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#define LINK_REGISTER(context) \
THREAD_STATE_LINK(context->uc_mcontext->FIELD(ss))
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#define FRAME_REGISTER(context) \
THREAD_STATE_FRAME(context->uc_mcontext->FIELD(ss))
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#elif(defined __QNX__)
#define IP_REGISTER(context) (context->uc_mcontext.cpu.eip)
#define STACK_REGISTER(context) (context->uc_mcontext.cpu.esp)
#define THREAD_REGISTER(context) (context->uc_mcontext.cpu.ebx)
#define LINK_REGISTER(context) (context->uc_mcontext.cpu.ecx)
#define FRAME_REGISTER(context) (context->uc_mcontext.cpu.ebp)
#elif(defined __FreeBSD__)
#define IP_REGISTER(context) (context->uc_mcontext.mc_eip)
#define STACK_REGISTER(context) (context->uc_mcontext.mc_esp)
#define THREAD_REGISTER(context) (context->uc_mcontext.mc_ebx)
#define LINK_REGISTER(context) (context->uc_mcontext.mc_ecx)
#define FRAME_REGISTER(context) (context->uc_mcontext.mc_ebp)
#else
#define IP_REGISTER(context) (context->uc_mcontext.gregs[REG_EIP])
#define STACK_REGISTER(context) (context->uc_mcontext.gregs[REG_ESP])
#define THREAD_REGISTER(context) (context->uc_mcontext.gregs[REG_EBX])
#define LINK_REGISTER(context) (context->uc_mcontext.gregs[REG_ECX])
#define FRAME_REGISTER(context) (context->uc_mcontext.gregs[REG_EBP])
#endif
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extern "C" uint64_t vmNativeCall(void* function,
void* stack,
unsigned stackSize,
unsigned returnType);
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namespace vm {
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inline uint64_t dynamicCall(void* function,
uintptr_t* arguments,
uint8_t*,
unsigned,
unsigned argumentsSize,
unsigned returnType)
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{
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return vmNativeCall(function, arguments, argumentsSize, returnType);
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}
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} // namespace vm
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#elif defined ARCH_x86_64
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#ifdef __APPLE__
#define THREAD_STATE x86_THREAD_STATE64
#define THREAD_STATE_TYPE x86_thread_state64_t
#define THREAD_STATE_COUNT x86_THREAD_STATE64_COUNT
#define THREAD_STATE_IP(state) ((state).FIELD(rip))
#define THREAD_STATE_STACK(state) ((state).FIELD(rsp))
#define THREAD_STATE_THREAD(state) ((state).FIELD(rbx))
#define THREAD_STATE_LINK(state) ((state).FIELD(rcx))
#define THREAD_STATE_FRAME(state) ((state).FIELD(rbp))
#define IP_REGISTER(context) THREAD_STATE_IP(context->uc_mcontext->FIELD(ss))
#define STACK_REGISTER(context) \
THREAD_STATE_STACK(context->uc_mcontext->FIELD(ss))
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#define THREAD_REGISTER(context) \
THREAD_STATE_THREAD(context->uc_mcontext->FIELD(ss))
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#define LINK_REGISTER(context) \
THREAD_STATE_LINK(context->uc_mcontext->FIELD(ss))
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#define FRAME_REGISTER(context) \
THREAD_STATE_FRAME(context->uc_mcontext->FIELD(ss))
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#elif(defined __FreeBSD__)
#define IP_REGISTER(context) (context->uc_mcontext.mc_rip)
#define STACK_REGISTER(context) (context->uc_mcontext.mc_rsp)
#define THREAD_REGISTER(context) (context->uc_mcontext.mc_rbx)
#define LINK_REGISTER(context) (context->uc_mcontext.mc_rcx)
#define FRAME_REGISTER(context) (context->uc_mcontext.mc_rbp)
#else
#define IP_REGISTER(context) (context->uc_mcontext.gregs[REG_RIP])
#define STACK_REGISTER(context) (context->uc_mcontext.gregs[REG_RSP])
#define THREAD_REGISTER(context) (context->uc_mcontext.gregs[REG_RBX])
#define LINK_REGISTER(context) (context->uc_mcontext.gregs[REG_RCX])
#define FRAME_REGISTER(context) (context->uc_mcontext.gregs[REG_RBP])
#endif
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extern "C" uint64_t
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#ifdef PLATFORM_WINDOWS
vmNativeCall(void* function,
void* stack,
unsigned stackSize,
unsigned returnType);
#else
vmNativeCall(void* function,
void* stack,
unsigned stackSize,
void* gprTable,
void* sseTable,
unsigned returnType);
#endif
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namespace vm {
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#ifdef PLATFORM_WINDOWS
inline uint64_t dynamicCall(void* function,
uint64_t* arguments,
UNUSED uint8_t* argumentTypes,
unsigned argumentCount,
unsigned,
unsigned returnType)
{
return vmNativeCall(function, arguments, argumentCount, returnType);
}
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#else
inline uint64_t dynamicCall(void* function,
uintptr_t* arguments,
uint8_t* argumentTypes,
unsigned argumentCount,
unsigned,
unsigned returnType)
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{
const unsigned GprCount = 6;
uint64_t gprTable[GprCount];
unsigned gprIndex = 0;
const unsigned SseCount = 8;
uint64_t sseTable[SseCount];
unsigned sseIndex = 0;
uint64_t stack[argumentCount];
unsigned stackIndex = 0;
for (unsigned i = 0; i < argumentCount; ++i) {
switch (argumentTypes[i]) {
case FLOAT_TYPE:
case DOUBLE_TYPE: {
if (sseIndex < SseCount) {
sseTable[sseIndex++] = arguments[i];
} else {
stack[stackIndex++] = arguments[i];
}
} break;
default: {
if (gprIndex < GprCount) {
gprTable[gprIndex++] = arguments[i];
} else {
stack[stackIndex++] = arguments[i];
}
} break;
}
}
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return vmNativeCall(function,
stack,
stackIndex * BytesPerWord,
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(gprIndex ? gprTable : 0),
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(sseIndex ? sseTable : 0),
returnType);
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}
#endif
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} // namespace vm
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#else
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#error unsupported architecture
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#endif
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namespace vm {
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inline void trap()
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{
#ifdef _MSC_VER
__asm int 3
#else
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asm("int3");
#endif
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}
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inline void programOrderMemoryBarrier()
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{
compileTimeMemoryBarrier();
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}
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inline void storeStoreMemoryBarrier()
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{
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programOrderMemoryBarrier();
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}
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inline void storeLoadMemoryBarrier()
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{
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#ifdef _MSC_VER
MemoryBarrier();
#elif defined ARCH_x86_32
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__asm__ __volatile__("lock; addl $0,0(%%esp)" : : : "memory");
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#elif defined ARCH_x86_64
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__asm__ __volatile__("mfence" : : : "memory");
#endif // ARCH_x86_64
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}
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inline void loadMemoryBarrier()
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{
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programOrderMemoryBarrier();
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}
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inline void syncInstructionCache(const void*, unsigned)
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{
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programOrderMemoryBarrier();
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}
#ifdef USE_ATOMIC_OPERATIONS
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inline bool atomicCompareAndSwap32(uint32_t* p, uint32_t old, uint32_t new_)
{
#ifdef _MSC_VER
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return old
== InterlockedCompareExchange(reinterpret_cast<LONG*>(p), new_, old);
#elif(__GNUC__ >= 4) && (__GNUC_MINOR__ >= 1)
return __sync_bool_compare_and_swap(p, old, new_);
#else
uint8_t result;
__asm__ __volatile__("lock; cmpxchgl %2, %0; setz %1"
: "=m"(*p), "=q"(result)
: "r"(new_), "a"(old), "m"(*p)
: "memory");
return result != 0;
#endif
}
#define AVIAN_HAS_CAS64
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inline bool atomicCompareAndSwap64(uint64_t* p, uint64_t old, uint64_t new_)
{
#ifdef _MSC_VER
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return old == InterlockedCompareExchange64(
reinterpret_cast<LONGLONG*>(p), new_, old);
#elif(__GNUC__ >= 4) && (__GNUC_MINOR__ >= 1)
return __sync_bool_compare_and_swap(p, old, new_);
#elif defined ARCH_x86_32
uint8_t result;
__asm__ __volatile__("lock; cmpxchg8b %0; setz %1"
: "=m"(*p), "=q"(result)
: "a"(static_cast<uint32_t>(old)),
"d"(static_cast<uint32_t>(old >> 32)),
"b"(static_cast<uint32_t>(new_)),
"c"(static_cast<uint32_t>(new_ >> 32)),
"m"(*p)
: "memory");
return result != 0;
#else
uint8_t result;
__asm__ __volatile__("lock; cmpxchgq %2, %0; setz %1"
: "=m"(*p), "=q"(result)
: "r"(new_), "a"(old), "m"(*p)
: "memory");
return result != 0;
#endif
}
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inline bool atomicCompareAndSwap(uintptr_t* p, uintptr_t old, uintptr_t new_)
{
#ifdef ARCH_x86_32
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return atomicCompareAndSwap32(reinterpret_cast<uint32_t*>(p), old, new_);
#elif defined ARCH_x86_64
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return atomicCompareAndSwap64(reinterpret_cast<uint64_t*>(p), old, new_);
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#endif // ARCH_x86_64
}
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#endif // USE_ATOMIC_OPERATIONS
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} // namespace vm
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#endif // X86_H