mirror of
https://github.com/Nuand/bladeRF-wiphy.git
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71 lines
2.3 KiB
VHDL
71 lines
2.3 KiB
VHDL
-- This file is part of bladeRF-wiphy.
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--
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-- Copyright (C) 2020 Nuand, LLC.
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 2 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License along
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-- with this program; if not, write to the Free Software Foundation, Inc.,
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-- 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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library ieee ;
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use ieee.std_logic_1164.all ;
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use ieee.numeric_std.all ;
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entity wlan_dsss_plcp_crc is
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port (
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clock : in std_logic ;
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reset : in std_logic ;
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in_data : in std_logic ;
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in_valid : in std_logic ;
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crc : out std_logic_vector(15 downto 0)
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) ;
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end entity ;
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architecture arch of wlan_dsss_plcp_crc is
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signal crc_next : std_logic_vector(15 downto 0);
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begin
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process( reset, clock )
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begin
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if( reset = '1' ) then
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crc_next <= ( others => '1' ) ;
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elsif( rising_edge( clock ) ) then
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if (in_valid = '1' ) then
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crc_next(15) <= crc_next(14);
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crc_next(14) <= crc_next(13);
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crc_next(13) <= crc_next(12);
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crc_next(12) <= crc_next(11) xor crc_next(15) xor in_data;
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crc_next(11) <= crc_next(10);
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crc_next(10) <= crc_next(9);
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crc_next(9) <= crc_next(8);
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crc_next(8) <= crc_next(7);
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crc_next(7) <= crc_next(6);
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crc_next(6) <= crc_next(5);
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crc_next(5) <= crc_next(4) xor crc_next(15) xor in_data;
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crc_next(4) <= crc_next(3);
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crc_next(3) <= crc_next(2);
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crc_next(2) <= crc_next(1);
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crc_next(1) <= crc_next(0);
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crc_next(0) <= crc_next(15) xor in_data ;
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end if;
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end if;
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end process;
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crc <= crc_next xor x"FFFF";
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end architecture ;
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