mirror of
https://github.com/Nuand/bladeRF-wiphy.git
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344 lines
12 KiB
VHDL
344 lines
12 KiB
VHDL
-- This file is part of bladeRF-wiphy.
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--
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-- Copyright (C) 2020 Nuand, LLC.
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 2 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License along
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-- with this program; if not, write to the Free Software Foundation, Inc.,
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-- 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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library ieee ;
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use ieee.std_logic_1164.all ;
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use ieee.numeric_std.all ;
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use ieee.math_real.all ;
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use ieee.math_complex.all ;
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library work ;
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use work.wlan_p.all ;
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entity wlan_modulator is
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port (
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clock : in std_logic ;
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reset : in std_logic ;
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init : in std_logic ;
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data : in std_logic_vector(287 downto 0) ;
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modulation : in wlan_modulation_t ;
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in_valid : in std_logic ;
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ifft_ready : in std_logic ;
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symbol_start : out std_logic ;
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symbol_end : out std_logic ;
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symbol_sample : out wlan_sample_t
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) ;
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end entity ;
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architecture arch of wlan_modulator is
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function to_sample( x : complex ) return wlan_sample_t is
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variable rv : wlan_sample_t ;
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begin
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rv.i := to_signed(integer(round(4096.0*x.re)), rv.i'length) ;
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rv.q := to_signed(integer(round(4096.0*x.im)), rv.q'length) ;
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rv.valid := '1' ;
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return rv ;
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end function ;
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-- Table 18-8
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function make_bpsk_table return sample_array_t is
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variable rv : sample_array_t(1 downto 0) ;
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begin
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rv(0) := to_sample( (-1.0, 0.0) ) ;
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rv(1) := to_sample( ( 1.0, 0.0) ) ;
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return rv ;
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end function ;
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-- Table 18-9
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function make_qpsk_table return sample_array_t is
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constant SCALE : real := 1.0/sqrt(2.0) ;
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variable rv : sample_array_t(3 downto 0) ;
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begin
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rv(0) := to_sample( (SCALE*(-1.0), SCALE*(-1.0)) ) ;
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rv(1) := to_sample( (SCALE*( 1.0), SCALE*(-1.0)) ) ;
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rv(2) := to_sample( (SCALE*(-1.0), SCALE*( 1.0)) ) ;
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rv(3) := to_sample( (SCALE*( 1.0), SCALE*( 1.0)) ) ;
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return rv ;
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end function ;
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-- Table 18-10
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function make_16qam_table return sample_array_t is
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constant SCALE : real := 1.0/sqrt(10.0) ;
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variable bits : unsigned(3 downto 0) ;
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variable sample : complex ;
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variable rv : sample_array_t(15 downto 0) ;
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begin
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for i in rv'range loop
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bits := to_unsigned(i,bits'length) ;
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-- I bits
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case bits(1 downto 0) is
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when "00" => sample.re := SCALE*(-3.0) ;
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when "01" => sample.re := SCALE*( 3.0) ;
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when "10" => sample.re := SCALE*(-1.0) ;
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when "11" => sample.re := SCALE*( 1.0) ;
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when others => report "Weird" severity failure ;
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end case ;
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-- Q bits
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case bits(3 downto 2) is
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when "00" => sample.im := SCALE*(-3.0) ;
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when "01" => sample.im := SCALE*( 3.0) ;
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when "10" => sample.im := SCALE*(-1.0) ;
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when "11" => sample.im := SCALE*( 1.0) ;
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when others => report "Ack" severity failure ;
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end case ;
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rv(i) := to_sample( sample ) ;
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end loop ;
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return rv ;
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end function ;
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-- Table 18-11
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function make_64qam_table return sample_array_t is
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constant SCALE : real := 1.0/sqrt(42.0) ;
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variable bits : unsigned(5 downto 0) ;
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variable sample : complex ;
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variable rv : sample_array_t(63 downto 0) ;
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begin
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for i in rv'range loop
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bits := to_unsigned(i, bits'length) ;
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-- I bits
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case bits(2 downto 0) is
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when "000" => sample.re := SCALE*(-7.0) ;
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when "001" => sample.re := SCALE*( 7.0) ;
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when "010" => sample.re := SCALE*(-1.0) ;
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when "011" => sample.re := SCALE*( 1.0) ;
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when "100" => sample.re := SCALE*(-5.0) ;
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when "101" => sample.re := SCALE*( 5.0) ;
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when "110" => sample.re := SCALE*(-3.0) ;
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when "111" => sample.re := SCALE*( 3.0) ;
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when others => report "Ugh!" severity failure ;
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end case ;
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-- Q bits
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case bits(5 downto 3) is
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when "000" => sample.im := SCALE*(-7.0) ;
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when "001" => sample.im := SCALE*( 7.0) ;
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when "010" => sample.im := SCALE*(-1.0) ;
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when "011" => sample.im := SCALE*( 1.0) ;
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when "100" => sample.im := SCALE*(-5.0) ;
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when "101" => sample.im := SCALE*( 5.0) ;
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when "110" => sample.im := SCALE*(-3.0) ;
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when "111" => sample.im := SCALE*( 3.0) ;
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when others => report "Blah" severity failure ;
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end case ;
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rv(i) := to_sample( sample ) ;
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end loop ;
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return rv ;
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end function ;
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-- Modulation tables
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constant MOD_BPSK : sample_array_t := make_bpsk_table ;
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constant MOD_QPSK : sample_array_t := make_qpsk_table ;
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constant MOD_16QAM : sample_array_t := make_16qam_table ;
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constant MOD_64QAM : sample_array_t := make_64qam_table ;
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type fsm_t is (IDLE, WAIT_IFFT_READY, MODULATING) ;
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type state_t is record
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fsm : fsm_t ;
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data : unsigned(287 downto 0) ;
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byt : natural range 0 to 630 ;
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index : natural range 0 to 63 ;
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modulation : wlan_modulation_t ;
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symbol : wlan_sample_t ;
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symbol_start : std_logic ;
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symbol_end : std_logic ;
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pilot_polarity : std_logic ;
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lfsr_advance : std_logic ;
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end record ;
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function NULL_STATE return state_t is
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variable rv : state_t ;
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begin
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rv.fsm := IDLE ;
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rv.data := (others =>'0') ;
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rv.byt := 0 ;
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rv.index := 0 ;
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rv.modulation := WLAN_BPSK ;
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rv.symbol := NULL_SAMPLE ;
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rv.symbol_start := '0' ;
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rv.symbol_end := '0' ;
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rv.pilot_polarity := '1' ;
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rv.lfsr_advance := '0' ;
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return rv ;
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end function ;
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function reorder_data( x : std_logic_vector(287 downto 0) ; modulation : wlan_modulation_t ) return unsigned is
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variable rv : std_logic_vector(287 downto 0) ;
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begin
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-- Swap locations of positive and negative frequencies in the vector
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case modulation is
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when WLAN_BPSK =>
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rv(24*1-1 downto 0) := x(48*1-1 downto 24*1) ;
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rv(48*1-1 downto 24*1) := x(24*1-1 downto 0) ;
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when WLAN_QPSK =>
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rv(24*2-1 downto 0) := x(48*2-1 downto 24*2) ;
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rv(48*2-1 downto 24*2) := x(24*2-1 downto 0) ;
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when WLAN_16QAM =>
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rv(24*4-1 downto 0) := x(48*4-1 downto 24*4) ;
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rv(48*4-1 downto 24*4) := x(24*4-1 downto 0) ;
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when WLAN_64QAM =>
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rv(24*6-1 downto 0) := x(48*6-1 downto 24*6) ;
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rv(48*6-1 downto 24*6) := x(24*6-1 downto 0) ;
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when others =>
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end case ;
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return unsigned(rv) ;
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end function ;
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signal lfsr_advance : std_logic ;
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signal lfsr_data : std_logic_vector(0 downto 0) ;
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signal current, future : state_t := NULL_STATE ;
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begin
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symbol_start <= current.symbol_start ;
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symbol_end <= current.symbol_end ;
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symbol_sample <= current.symbol ;
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lfsr_advance <= current.lfsr_advance ;
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U_lfsr : entity work.wlan_lfsr
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generic map (
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WIDTH => lfsr_data'length
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) port map (
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clock => clock,
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reset => reset,
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init => (others =>'1'),
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init_valid => init,
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advance => lfsr_advance,
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data => lfsr_data,
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data_valid => open
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) ;
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sync : process(clock, reset)
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begin
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if( reset = '1' ) then
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current <= NULL_STATE ;
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elsif( rising_edge(clock) ) then
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current <= future ;
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end if ;
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end process ;
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comb : process(all)
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begin
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future <= current ;
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future.lfsr_advance <= '0' ;
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future.symbol.valid <= '0' ;
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future.symbol_start <= '0' ;
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future.symbol_end <= '0' ;
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future.pilot_polarity <= lfsr_data(0) ;
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case current.fsm is
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when IDLE =>
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future.symbol <= NULL_SAMPLE ;
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future.symbol_start <= '0' ;
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future.symbol_end <= '0' ;
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if( init = '1' ) then
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-- Reset the pilot polarity LFSR here
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end if ;
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if( in_valid = '1' ) then
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future.modulation <= modulation ;
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future.data <= reorder_data(data, modulation) ;
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if( ifft_ready = '1' ) then
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future.fsm <= MODULATING ;
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else
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future.fsm <= WAIT_IFFT_READY ;
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end if;
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end if ;
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when WAIT_IFFT_READY =>
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if( ifft_ready = '1' ) then
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future.fsm <= MODULATING ;
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end if;
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when MODULATING =>
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future.symbol_start <= '0' ;
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future.symbol_end <= '0' ;
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case current.index is
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-- Check for DC null
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when 0 =>
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future.symbol <= NULL_SAMPLE ;
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future.symbol.valid <= '1' ;
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future.symbol_start <= '1' ;
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-- Check for outside nulls
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when 27 to 37 =>
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future.symbol <= NULL_SAMPLE ;
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future.symbol.valid <= '1' ;
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-- Check for 3 positive pilots
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when 7|43|57 =>
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if( current.pilot_polarity = '1' ) then
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future.symbol <= MOD_BPSK(0) ;
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else
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future.symbol <= MOD_BPSK(1) ;
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end if ;
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-- Check for 1 negative pilot
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when 21 =>
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if( current.pilot_polarity = '1' ) then
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future.symbol <= MOD_BPSK(1) ;
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else
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future.symbol <= MOD_BPSK(0) ;
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end if ;
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-- Otherwise data
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when others =>
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case current.modulation is
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when WLAN_BPSK =>
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future.symbol <= MOD_BPSK(to_integer(current.data(0 downto 0))) ;
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future.data <= shift_right(current.data,1) ;
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when WLAN_QPSK =>
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future.symbol <= MOD_QPSK(to_integer(current.data(1 downto 0))) ;
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future.data <= shift_right(current.data,2) ;
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when WLAN_16QAM =>
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future.symbol <= MOD_16QAM(to_integer(current.data(3 downto 0))) ;
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future.data <= shift_right(current.data,4) ;
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when WLAN_64QAM =>
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future.symbol <= MOD_64QAM(to_integer(current.data(5 downto 0))) ;
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future.data <= shift_right(current.data,6) ;
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when others =>
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end case ;
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end case ;
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-- Check if we've reached a full symbol length
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if( current.index < 63 ) then
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future.index <= current.index + 1 ;
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else
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future.lfsr_advance <= '1' ;
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future.symbol_end <= '1' ;
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future.byt <= current.byt + 1;
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future.index <= 0 ;
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future.fsm <= IDLE ;
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end if ;
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end case ;
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end process ;
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end architecture ;
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