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https://github.com/Nuand/bladeRF-wiphy.git
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73 lines
1.9 KiB
VHDL
73 lines
1.9 KiB
VHDL
-- This file is part of bladeRF-wiphy.
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--
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-- Copyright (C) 2020 Nuand, LLC.
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 2 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License along
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-- with this program; if not, write to the Free Software Foundation, Inc.,
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-- 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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library ieee ;
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use ieee.std_logic_1164.all ;
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use ieee.numeric_std.all ;
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library work ;
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use work.wlan_p.all ;
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use work.wlan_tx_p.all ;
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entity wlan_tx_long_tb is
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end entity ;
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architecture arch of wlan_tx_long_tb is
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signal clock : std_logic := '1' ;
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signal reset : std_logic := '1' ;
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signal start : std_logic := '0' ;
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signal done : std_logic ;
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signal sample : wlan_sample_t ;
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signal valid_cp : std_logic ;
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begin
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clock <= not clock after 1 ns ;
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U_tx_long : entity work.wlan_tx_long
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port map (
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clock => clock,
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reset => reset,
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start => start,
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done => done,
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out_sample => sample,
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out_valid_cp => valid_cp
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) ;
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tb : process
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begin
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reset <= '1' ;
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nop(clock, 100) ;
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reset <= '0' ;
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nop(clock, 100) ;
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start <= '1' ;
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nop(clock, 1) ;
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start <= '0' ;
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nop(clock, 1) ;
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nop(clock, 1000 ) ;
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report "-- End of Simulation --" severity failure ;
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end process ;
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end architecture ;
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