mirror of
https://github.com/Nuand/bladeRF-wiphy.git
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77 lines
2.3 KiB
VHDL
77 lines
2.3 KiB
VHDL
-- This file is part of bladeRF-wiphy.
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--
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-- Copyright (C) 2020 Nuand, LLC.
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 2 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License along
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-- with this program; if not, write to the Free Software Foundation, Inc.,
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-- 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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library ieee ;
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use ieee.std_logic_1164.all ;
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use ieee.numeric_std.all ;
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library work ;
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use work.wlan_p.all ;
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use work.wlan_tables_p.all ;
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entity wlan_peak_finder_tb is
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end entity ;
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architecture arch of wlan_peak_finder_tb is
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signal clock : std_logic := '1' ;
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signal reset : std_logic := '1' ;
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signal init : unsigned(6 downto 0) := (others =>'1') ;
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signal init_valid : std_logic := '0' ;
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signal advance : std_logic := '0' ;
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signal data : std_logic_vector(7 downto 0) ;
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signal data_valid : std_logic ;
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signal sample : unsigned( 127 downto 0 ) ;
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signal inc : std_logic := '1';
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begin
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clock <= not clock after 0.5 ns ;
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reset <= '1', '0' after 10 ns;
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U_peak_finder : entity work.wlan_peak_finder
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port map (
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clock => clock,
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reset => reset,
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sample => sample,
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sample_valid=> '1',
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peak => open
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) ;
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process(clock)
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begin
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if( reset = '1' ) then
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sample <= (others => '0') ;
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elsif( rising_edge( clock ) ) then
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if( inc = '1' ) then
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sample <= sample + 1 ;
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if (sample = 45) then
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inc <= '0';
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end if;
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else
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sample <= sample - 1 ;
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end if;
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end if;
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end process;
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end architecture ;
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